公开(公告)号：US20150351224A1

公开(公告)日：2015-12-03

申请号：US14728144

申请日：2015-06-02

Applicant: SUMITOMO BAKELITE CO., LTD.

Inventor： Yoshihide Nii ,  Toshio Komiyatani ,  Yukiharu Yuzuriha

IPC: H05K1/02 ,  H05K1/18

CPC classification number: H05K1/05 ,  H05K2201/09745 ,  H05K2201/10166

Abstract: A metal-based mounting board according to the present invention includes: a metal-based circuit board including a metal substrate having a first surface and a second surface opposite to the first surface, an insulating film provided on the first surface of the metal substrate and a metal film provided on the insulating film; and an electronic component provided on the metal film of the metal-based circuit board, wherein in the case where within the metal substrate, a region which overlaps with a collection of a plurality of lines each having an angle of 45° or less with respect to a normal line of the metal-based mounting board, the lines each passing through a surface of the electronic component facing the metal film, is defined as a first region, and a region other than the first region is defined as a second region, a groove is provided within the second region, but is not provided within the first region.

Abstract translation: 根据本发明的金属基安装板包括：金属基电路板，包括具有第一表面和与第一表面相对的第二表面的金属基板，设置在金属基板的第一表面上的绝缘膜和 设置在绝缘膜上的金属膜; 以及设置在所述金属基电路板的金属膜上的电子部件，其中，在所述金属基板内的情况下，与所述多个线的集合重叠的区域各自具有45°以下的角度， 在金属基安装基板的法线上，将各电子元件的面向金属膜的表面的线定义为第一区域，将第一区域以外的区域定义为第二区域， 在第二区域内设置槽，但不设置在第一区域内。

公开(公告)号：US20150282314A1

公开(公告)日：2015-10-01

申请号：US14674301

申请日：2015-03-31

Applicant: IBIDEN CO., LTD.

Inventor： Toru FURUTA ,  Takeshi FURUSAWA ,  Tomoya TERAKURA

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/40 ,  H05K1/09 ,  H05K3/06

CPC classification number: H05K3/4007 ,  H05K1/0271 ,  H05K1/111 ,  H05K3/0097 ,  H05K3/282 ,  H05K3/3436 ,  H05K2201/0355 ,  H05K2201/0376 ,  H05K2201/09745 ,  H05K2201/09772 ,  H05K2203/0369 ,  H05K2203/1536 ,  Y02P70/611 ,  Y10T29/49165

Abstract: A method for manufacturing a printed wiring board with conductive posts includes forming on a first foil provided on carrier a first conductive layer including mounting pattern to connect electronic component via conductive posts, forming on the first foil a laminate including an insulating layer and a second foil to form the laminate on the first conductive layer, removing the carrier, forming a metal film on the laminate and first film, forming resist on the metal film to have pattern exposing portion of the metal film corresponding to the mounting pattern and portion of the second foil for a second conductive layer, forming an electroplating layer on the portion of the metal film not covered by the resist, removing the resist, and applying etching to remove the first and second foils below the metal film exposed by the removing the resist and to form the posts on the mounting pattern.

Abstract translation: 一种用于制造具有导电柱的印刷线路板的方法，包括在载体上形成第一导电层，第一导电层包括安装图案，以经由导电柱连接电子部件，在第一箔上形成包括绝缘层和第二箔 在第一导电层上形成层压体，去除载体，在层压体上形成金属膜和第一膜，在金属膜上形成抗蚀剂，使金属膜的图案曝光部分对应于安装图案和第二导电层的部分 箔片用于第二导电层，在未被抗蚀剂覆盖的金属膜的部分上形成电镀层，去除抗蚀剂，并施加蚀刻以除去通过除去抗蚀剂暴露的金属膜下面的第一和第二箔，并且 形成安装模式上的柱。

公开(公告)号：US09107313B2

公开(公告)日：2015-08-11

申请号：US14133157

申请日：2013-12-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Hyun Lim ,  Jung Eun Kang ,  Heung Soo Park ,  Seog Moon Choi ,  Kwang Soo Kim ,  Joon Seok Chae ,  Sung Keun Park

IPC: H05K7/06 ,  H05K3/10 ,  H05K1/02 ,  H05K3/44 ,  H05K1/05

CPC classification number: H05K3/10 ,  H05K1/0203 ,  H05K1/053 ,  H05K3/108 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/062 ,  H05K2201/09745 ,  H05K2201/10166 ,  H05K2203/0315 ,  Y10T29/4913

Abstract: Disclosed herein are a hybrid heat-radiating substrate including a metal core layer; an oxide insulating core layer that is formed in a thickness direction of the metal core layer to have a shape where the oxide insulating core layer is integrally formed with the metal core layer, an oxide insulating layer that is formed on one surface or both surfaces of the metal core layer, and a circuit layer that is configured to include first circuit patterns formed on the oxide insulating core layer and second circuit patterns formed on the oxide insulating layer, and a method of manufacturing the same.

Abstract translation: 本文公开了包括金属芯层的混合散热基板; 氧化物绝缘芯层，其形成在所述金属芯层的厚度方向上，以形成所述氧化物绝缘芯层与所述金属芯层一体形成的形状;氧化物绝缘层，其形成在所述金属芯层的一个表面或两个表面上 金属芯层，以及被配置为包括形成在氧化物绝缘芯层上的第一电路图案和形成在氧化物绝缘层上的第二电路图案的电路层及其制造方法。

公开(公告)号：US20150163916A1

公开(公告)日：2015-06-11

申请号：US14452785

申请日：2014-08-06

Applicant: Mitsubishi Electric Corporation

Inventor： Taichi OBARA ,  Rei YONEYAMA ,  Takami OTSUKI ,  Eiju SHITAMA

IPC: H05K1/18 ,  H05K1/11

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/15 ,  H01L23/3735 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49844 ,  H01L2224/32225 ,  H01L2924/19105 ,  H05K1/11 ,  H05K1/111 ,  H05K1/186 ,  H05K1/188 ,  H05K3/3442 ,  H05K2201/09072 ,  H05K2201/09745 ,  H05K2201/10 ,  H05K2201/10174 ,  H05K2201/1059 ,  H05K2201/10636 ,  H05K2201/10651 ,  H05K2201/10674 ,  H05K2201/10689 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic component mounting device includes an insulating substrate having a metal pattern formed thereon and a MELF electronic component. The MELF electronic component is fitted into a first receiving portion configured with the metal pattern and the insulating substrate exposed from a lacking portion of the metal pattern. The electronic component mounting device further includes a conductive member formed between the MELF electronic component and the metal pattern, and the conductive member is not formed between the MELF electronic component and the insulating substrate.

Abstract translation: 电子部件安装装置包括其上形成有金属图案的绝缘基板和MELF电子部件。 MELF电子部件装配到由金属图案构成的第一接收部分和从金属图案的缺少部分露出的绝缘基板。 电子部件安装装置还包括形成在MELF电子部件和金属图案之间的导电部件，并且在MELF电子部件和绝缘基板之间不形成导电部件。

公开(公告)号：US20150156863A1

公开(公告)日：2015-06-04

申请号：US14555227

申请日：2014-11-26

Applicant: Dell Products L.P.

Inventor： Joel R. Goergen ,  Yi Zheng

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/00

CPC classification number: H05K1/0216 ,  B32B2305/076 ,  B32B2309/08 ,  B32B2457/08 ,  H01P3/081 ,  H05K1/024 ,  H05K1/0242 ,  H05K1/0245 ,  H05K1/0298 ,  H05K1/0366 ,  H05K3/0091 ,  H05K3/46 ,  H05K3/4611 ,  H05K2201/0187 ,  H05K2201/029 ,  H05K2201/09236 ,  H05K2201/09745 ,  H05K2201/098 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.

Abstract translation: 公开了电路板及其制造方法。 电路板使用形成为包括纵向通道的导体承载高速信号。 通道增加了导体的表面积，从而增强了导体承载高速信号的能力。 在至少一些实施例中，通道内的介电常数和通道之外的介质常数之间也存在不连续性，这被认为可减少信号损耗。

公开(公告)号：US09012787B2

公开(公告)日：2015-04-21

申请号：US13626229

申请日：2012-09-25

Applicant: STMicroelectronics S.r.l.

Inventor： Cristiano Gianluca Stella ,  Rosalba Cacciola

IPC: H05K1/16 ,  H05K3/34 ,  H05K1/11 ,  H05K3/30

CPC classification number: H05K3/3468 ,  H01L2224/73203 ,  H01L2924/13091 ,  H05K1/111 ,  H05K3/305 ,  H05K2201/09381 ,  H05K2201/09472 ,  H05K2201/09745 ,  H05K2203/044 ,  H01L2924/00012 ,  H01L2924/00

Abstract: An electronic board includes conducting traces having an upper surface at least partially sunken with respect to a gluing surface of the board. A surface mount technology electronic device for mounting to the board includes insulating windows that define gluing sites within one or more pins. An electronic system is formed by one or more of such surface mount technology electronic devices mounted to electronic board. The devices are attached using a wave soldering technique that flows through channels formed by the sunken conductive traces.

Abstract translation: 电子板包括具有相对于板的胶合表面至少部分凹陷的上表面的导电迹线。 用于安装到板上的表面贴装技术电子器件包括限定一个或多个引脚内的胶合位置的绝缘窗。 电子系统由安装到电子板的一种或多种这样的表面贴装技术电子装置形成。 这些装置使用波峰焊技术连接，该技术流过由凹陷的导电迹线形成的通道。

公开(公告)号：US08963672B2

公开(公告)日：2015-02-24

申请号：US14129148

申请日：2012-06-21

Applicant: Hiroaki Asano ,  Yasuhiro Koike ,  Kiminori Ozaki ,  Hitoshi Shimadu ,  Tetsuya Furuta ,  Masao Miyake ,  Takahiro Hayakawa ,  Tomoaki Asai ,  Ryou Yamauchi

Inventor： Hiroaki Asano ,  Yasuhiro Koike ,  Kiminori Ozaki ,  Hitoshi Shimadu ,  Tetsuya Furuta ,  Masao Miyake ,  Takahiro Hayakawa ,  Tomoaki Asai ,  Ryou Yamauchi

IPC: H01F27/29 ,  H01F27/28 ,  H05K1/11 ,  H05K3/20 ,  H05K1/16 ,  H05K1/02

CPC classification number: H05K1/115 ,  H01F27/2804 ,  H05K1/0265 ,  H05K1/0268 ,  H05K1/0298 ,  H05K1/118 ,  H05K1/165 ,  H05K3/20 ,  H05K2201/0305 ,  H05K2201/0391 ,  H05K2201/09036 ,  H05K2201/0969 ,  H05K2201/09736 ,  H05K2201/09745

Abstract: This wiring board is provided with an insulating core substrate, a first conductor pattern, a second conductor pattern, and a conductive material. The first conductor pattern and the second conductor pattern are adhered to the insulating core substrate. The second conductor pattern has a first surface and a second surface. The second conductor pattern has a concavity and a through-hole. The opening of the concavity that opens to the first surface and the opening of the through hole that opens to the first surface are interconnected to each other. The first conductor pattern is positioned at the opening of the concavity. The first conductor pattern and the second conductor pattern are electrically connected by means of the conductive material, which fills from the opening of the through hole that opens to the second surface.

Abstract translation: 该布线板设置有绝缘芯基板，第一导体图案，第二导体图案和导电材料。 第一导体图案和第二导体图案粘附到绝缘芯基板。 第二导体图案具有第一表面和第二表面。 第二导体图案具有凹部和通孔。 通向第一表面的凹部的开口和通向第一表面的通孔的开口相互连接。 第一导体图案位于凹部的开口处。 第一导体图案和第二导体图案通过导电材料电连接，导电材料从通孔的开口填充到第二表面。

公开(公告)号：US20150016122A1

公开(公告)日：2015-01-15

申请号：US14502169

申请日：2014-09-30

Applicant: E I DU PONT DE NEMOURS AND COMPANY

Inventor： KURT DOUGLAS ROBERTS

IPC: F21V29/00 ,  F21K99/00

CPC classification number: F21K9/23 ,  F21K9/27 ,  F21S4/24 ,  F21V29/70 ,  F21V29/74 ,  F21Y2103/10 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L33/642 ,  H01L2924/0002 ,  H05K1/0278 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/09745 ,  H05K2201/10106 ,  H01L2924/00

Abstract: A flexible layered structure is disclosed having a flexible top conductive layer, a flexible bottom heat sink layer and a flexible dielectric middle layer. The combination has a longitudinal axis and a plurality of defined positions spaced along the longitudinal axis. The defined positions can be used for aligning a circuit and/or for the placement of LED lights. The flexible layered structure can be easily bent to form a LED substrate for shining light in more than one direction while efficiently removing heat arising from the LEDs.

公开(公告)号：US08853728B2

公开(公告)日：2014-10-07

申请号：US13919874

申请日：2013-06-17

Applicant: Toyoda Gosei Co., Ltd.

Inventor： Yosuke Tsuchiya ,  Shota Shimonishi ,  Hiroyuki Tajima ,  Akira Sengoku

IPC: H01L33/00 ,  H01L33/60 ,  H05K1/02

CPC classification number: H01L33/60 ,  H01L2224/13 ,  H05K1/0274 ,  H05K2201/09745 ,  H05K2201/2054

Abstract: An LED mounting substrate includes a base substrate, a conductive pattern formed on the base substrate and including a recessed portion on an upper surface thereof, and a light reflecting film formed in an inter-pattern gap of the conductive pattern on the base substrate and in the recessed portion of the conductive pattern.

Abstract translation: LED安装基板包括基底基板，形成在基底基板上的导电图案，并且在其上表面上包括凹部，以及形成在基底基板上的导电图案的图案间间隙中的光反射膜， 导电图案的凹陷部分。

公开(公告)号：US20140291701A1

公开(公告)日：2014-10-02

申请号：US14353990

申请日：2012-03-05

Applicant: Yukimasa Hayashida

Inventor： Yukimasa Hayashida

IPC: H01L49/02 ,  H01L29/16 ,  H01L23/498

CPC classification number: H01L28/22 ,  H01L23/49838 ,  H01L25/16 ,  H01L29/1608 ,  H01L2924/0002 ,  H01L2924/10272 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/0306 ,  H05K1/111 ,  H05K3/3442 ,  H05K2201/09045 ,  H05K2201/09745 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: An object of the present invention is to provide a semiconductor device that allows the life of solder joint parts of electronic components to be increased. The semiconductor device according to the present invention includes ceramic, an upper pattern formed on the ceramic, and a resistor connected onto the upper pattern via solder. The upper pattern has a portion formed in a recess shape, the portion being connected to the resistor via the solder.

Abstract translation: 本发明的一个目的是提供一种能够增加电子部件的焊接部件的寿命的半导体装置。 根据本发明的半导体器件包括陶瓷，形成在陶瓷上的上部图案，以及通过焊料连接到上部图案上的电阻器。 上部图案具有形成为凹部形状的部分，该部分通过焊料连接到电阻器。