Integrated semiconductor chip with lateral thermal insulation
    31.
    发明授权
    Integrated semiconductor chip with lateral thermal insulation 有权
    集成半导体芯片具有侧向保温

    公开(公告)号:US07781828B2

    公开(公告)日:2010-08-24

    申请号:US11774051

    申请日:2007-07-06

    Inventor: Matthias Stecher

    CPC classification number: H01L23/36 H01L23/367 H01L2924/0002 H01L2924/00

    Abstract: An integrated semiconductor with lateral thermal insulation is disclosed. In one embodiment, the chip has, on a common substrate, at least one power semiconductor circuit region and, laterally adjacent to the power semiconductor circuit region, at least one further temperature-sensitive semiconductor circuit region, interspaces being maintained between the circuit regions. At least one thermally insulating trench is provided at least in each interspace in each case between power semiconductor circuit region(s) and temperature-sensitive semiconductor circuit region(s), which at least one thermally insulating trench extends into the depth of the chip right into the substrate and in the longitudinal direction of the chip at least over a lateral side of the at least one power semiconductor circuit region and/or the temperature-sensitive semiconductor circuit region and is either unfilled or filled with a thermally insulating filling material.

    Abstract translation: 公开了具有横向热绝缘的集成半导体。 在一个实施例中,芯片在公共衬底上具有至少一个功率半导体电路区域,并且与功率半导体电路区域横向相邻,至少一个另外的温度敏感半导体电路区域,维持在电路区域之间的间隙。 在功率半导体电路区域和温度敏感半导体电路区域之间的至少一个间隔中至少提供至少一个隔热沟槽,该至少一个绝热沟槽延伸到芯片的深度右侧 至少在所述至少一个功率半导体电路区域和/或所述温度敏感半导体电路区域的横向侧上进入所述衬底和所述芯片的纵向方向,并且未填充或填充有绝热填充材料。

    INTEGRATED SEMICONDUCTOR CHIP WITH LATERAL THERMAL INSULATION
    34.
    发明申请
    INTEGRATED SEMICONDUCTOR CHIP WITH LATERAL THERMAL INSULATION 有权
    集成半导体芯片与侧向热绝缘

    公开(公告)号:US20080006913A1

    公开(公告)日:2008-01-10

    申请号:US11774051

    申请日:2007-07-06

    Inventor: Matthias Stecher

    CPC classification number: H01L23/36 H01L23/367 H01L2924/0002 H01L2924/00

    Abstract: An integrated semiconductor with lateral thermal insulation is disclosed. In one embodiment, the chip has, on a common substrate, at least one power semiconductor circuit region and, laterally adjacent to the power semiconductor circuit region, at least one further temperature-sensitive semiconductor circuit region, interspaces being maintained between the circuit regions. At least one thermally insulating trench is provided at least in each interspace in each case between power semiconductor circuit region(s) and temperature-sensitive semiconductor circuit region(s), which at least one thermally insulating trench extends into the depth of the chip right into the substrate and in the longitudinal direction of the chip at least over a lateral side of the at least one power semiconductor circuit region and/or the temperature-sensitive semiconductor circuit region and is either unfilled or filled with a thermally insulating filling material.

    Abstract translation: 公开了具有横向热绝缘的集成半导体。 在一个实施例中,芯片在公共衬底上具有至少一个功率半导体电路区域,并且与功率半导体电路区域横向相邻,至少一个另外的温度敏感半导体电路区域,维持在电路区域之间的间隙。 在功率半导体电路区域和温度敏感半导体电路区域之间的至少一个间隔中至少提供至少一个隔热沟槽,该至少一个绝热沟槽延伸到芯片的深度右侧 至少在所述至少一个功率半导体电路区域和/或所述温度敏感半导体电路区域的横向侧上进入所述衬底并且在所述芯片的纵向方向上,并且未填充或填充有绝热填充材料。

    Integrated semiconductor device having an insulating structure and a manufacturing method
    37.
    发明授权
    Integrated semiconductor device having an insulating structure and a manufacturing method 有权
    具有绝缘结构的集成半导体器件和制造方法

    公开(公告)号:US08749018B2

    公开(公告)日:2014-06-10

    申请号:US12819856

    申请日:2010-06-21

    Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.

    Abstract translation: 提供集成半导体器件。 集成半导体器件具有第二导电类型的第一半导体区域,与第一半导体区域形成pn结的第一导电类型的第二半导体区域,布置在第二导电类型的第二导电类型的非单晶半导体层 半导体区域,布置在非单晶半导体层上的第一导电类型的第一阱和至少一个第二阱以及使第一阱与至少一个第二阱和非单晶半导体层绝缘的绝缘结构。 此外,提供了一种用于形成半导体器件的方法。

    Semiconductor component with coreless transformer
    38.
    发明授权
    Semiconductor component with coreless transformer 有权
    具有无芯变压器的半导体元件

    公开(公告)号:US08665054B2

    公开(公告)日:2014-03-04

    申请号:US13452075

    申请日:2012-04-20

    Abstract: A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.

    Abstract translation: 半导体部件集成了无芯变压器与第一连接触点,第二连接触点,导电螺旋第一线圈,导电第一环和导电第二环。 导电螺旋第一线圈电连接在第一连接触点和第二连接触点之间。 导电的第一环围绕第一线圈和第一连接触点和第二连接触点中的一个或两个。 导电的第二环被布置在第一线圈和第一环之间,电连接到第一线圈,并且包围第一线圈以及第一连接触点和第二连接触点中的一个或两者。

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