利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

103 条记录 (耗时 0.038 秒)

    Seal ring structure with improved cracking protection and reduced problems
    31.
    发明授权
    Seal ring structure with improved cracking protection and reduced problems 有权
    密封环结构具有改进的开裂保护和减少的问题

    公开(公告)号：US08643147B2

    公开(公告)日：2014-02-04

    申请号：US11933931

    申请日：2007-11-01

    申请人： Shin-Puu Jeng ,  Shih-Hsun Hsu ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Chen-Hua Yu

    发明人： Shin-Puu Jeng ,  Shih-Hsun Hsu ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Chen-Hua Yu

    IPC分类号： H01L23/544

    CPC分类号： H01L23/562 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit structure includes a lower dielectric layer; an upper dielectric layer over the lower dielectric layer; and a seal ring. The seal ring includes an upper metal line in the upper dielectric layer; a continuous via bar underlying and abutting the upper metal line, wherein the continuous via bar has a width greater than about 70 percent of a width of the upper metal line; a lower metal line in the lower dielectric layer; and a via bar underlying and abutting the lower metal line. The via bar has a width substantially less than a half of a width of the lower metal line.

    摘要翻译： 集成电路结构包括下介电层; 在下介电层上的上电介质层; 和密封环。 密封环包括在上介电层中的上金属线; 连续的通孔条，其下面并邻接上部金属线，其中所述连续通孔条具有大于所述上部金属线宽度的约70％的宽度; 下介电层中的下金属线; 以及位于下金属线下方并邻接的通孔条。 通孔棒具有基本上小于下金属线宽度的一半的宽度。

    Protective seal ring for preventing die-saw induced stress
    32.
    发明授权
    Protective seal ring for preventing die-saw induced stress 有权
    用于防止模锯引起的应力的保护密封环

    公开(公告)号：US08334582B2

    公开(公告)日：2012-12-18

    申请号：US12347026

    申请日：2008-12-31

    申请人： Shin-Puu Jeng ,  Hsien-Wei Chen ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Anbiarshy N. F. Wu ,  Yu-Wen Liu

    发明人： Shin-Puu Jeng ,  Hsien-Wei Chen ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Anbiarshy N. F. Wu ,  Yu-Wen Liu

    IPC分类号： H01L23/544

    CPC分类号： H01L21/78 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor chip includes a semiconductor substrate; a plurality of low-k dielectric layers over the semiconductor substrate; a first passivation layer over the plurality of low-k dielectric layers; and a second passivation layer over the first passivation layer. A first seal ring is adjacent to an edge of the semiconductor chip, wherein the first seal ring has an upper surface substantially level to a bottom surface of the first passivation layer. A second seal ring is adjacent to the first seal ring and on an inner side of the semiconductor chip than the first seal ring. The second seal ring includes a pad ring in the first passivation layer and the second passivation layer. A trench ring includes at least a portion directly over the first seal ring. The trench ring extends from a top surface of the second passivation layer down to at least an interface between the first passivation layer and the second passivation layer.

    摘要翻译： 半导体芯片包括半导体衬底; 半导体衬底上的多个低k电介质层; 在所述多个低k电介质层上的第一钝化层; 以及在所述第一钝化层上的第二钝化层。 第一密封环邻近半导体芯片的边缘，其中第一密封环具有基本上平坦于第一钝化层的底表面的上表面。 第二密封环与第一密封环相邻，并且在半导体芯片的内侧与第一密封环相邻。 第二密封环包括在第一钝化层和第二钝化层中的焊盘环。 沟槽环包括直接在第一密封环上的至少一部分。 沟槽环从第二钝化层的顶表面延伸到至少第一钝化层和第二钝化层之间的界面。

    Scribe line layout design
    34.
    发明授权
    Scribe line layout design 有权
    划线设计

    公开(公告)号：US07952167B2

    公开(公告)日：2011-05-31

    申请号：US11796202

    申请日：2007-04-27

    申请人： Hsin-Hui Lee ,  Mirng-Ji Lii ,  Shin-Puu Jeng ,  Shang-Yun Hou

    发明人： Hsin-Hui Lee ,  Mirng-Ji Lii ,  Shin-Puu Jeng ,  Shang-Yun Hou

    IPC分类号： H01L29/06

    CPC分类号： H01L23/544 ,  H01L23/585 ,  H01L2223/5442 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A scribe line layout design to reduce the damage caused by sawing the wafer is presented. An embodiment comprises metal plates located within the scribe lines and at least partially within the junctions of the scribe lines. Each of these metal plates has one or more slots to help relieve the pressure. Alternatively, instead of metal plates, grooves that may be filled with metal could be placed into the scribe lines. These metal plates could also be used concurrently with a seal ring for better protection during sawing.

    摘要翻译： 提出了一种划线设计，以减少锯切锯片造成的损坏。 一个实施例包括位于划线内且至少部分地位于划线内的金属板。 这些金属板中的每一个具有一个或多个槽以帮助减轻压力。 或者，代替金属板，可以将填充有金属的凹槽放置在划线中。 这些金属板也可以与密封环同时使用，以便在锯切期间更好地保护。

    Flexible Structures for Interconnect Reliability Test
    35.
    发明申请
    Flexible Structures for Interconnect Reliability Test 有权
    互连可靠性测试的灵活结构

    公开(公告)号：US20090011539A1

    公开(公告)日：2009-01-08

    申请号：US11971072

    申请日：2008-01-08

    申请人： Shin-Puu Jeng ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Anbiarshy N.F. Wu

    发明人： Shin-Puu Jeng ,  Shang-Yun Hou ,  Hao-Yi Tsai ,  Anbiarshy N.F. Wu

    IPC分类号： H01L21/00

    CPC分类号： H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for forming an integrated circuit structure includes forming a test wafer. The step of forming the test wafer includes providing a first semiconductor substrate; and forming a first plurality of unit blocks over the first semiconductor substrate. Each of the first plurality of unit blocks includes a plurality of connection block cells arranged as an array. Each of the connection block cells includes two connection blocks, and a metal line connecting the two connection blocks. The method further includes forming a plurality of unit block boundary lines separating the first plurality of unit blocks from each other; and forming a first plurality of metal lines connecting a portion of the first plurality of unit blocks.

    摘要翻译： 一种用于形成集成电路结构的方法包括形成测试晶片。 形成测试晶片的步骤包括提供第一半导体衬底; 以及在所述第一半导体衬底上形成第一多个单元块。 第一多个单元块中的每一个包括被排列成阵列的多个连接块单元。 每个连接块单元包括两个连接块和连接两个连接块的金属线。 该方法还包括形成将第一多个单元块彼此分开的多个单位块边界线; 以及形成连接所述第一多个单元块的一部分的第一多个金属线。

    Laser fuse with efficient heat dissipation
    37.
    发明申请
    Laser fuse with efficient heat dissipation 有权
    激光熔丝具有高效散热

    公开(公告)号：US20070132059A1

    公开(公告)日：2007-06-14

    申请号：US11299999

    申请日：2005-12-12

    申请人： Hao-Yi Tsai ,  Chao-Hsiang Yang ,  Shang-Yun Hou ,  Chia-Lun Tsai ,  Shin-Puu Jeng

    发明人： Hao-Yi Tsai ,  Chao-Hsiang Yang ,  Shang-Yun Hou ,  Chia-Lun Tsai ,  Shin-Puu Jeng

    IPC分类号： H01L29/00

    CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor structure having an efficient thermal path and a method for forming the same are provided. The semiconductor structure includes a protection ring over a semiconductor substrate and substantially encloses a laser fuse structure. The laser fuse structure includes a laser fuse and a connection structure connecting the fuse to integrated circuits. The protection ring is thermally coupled to the semiconductor substrate by contacts. The semiconductor structure further includes a metal plate conducting heat generated by a laser beam to the protection ring.

    摘要翻译： 提供了具有有效的热路径的半导体结构及其形成方法。 半导体结构包括半导体衬底上的保护环，并且基本上包围激光熔丝结构。 激光熔丝结构包括激光熔丝和将熔丝连接到集成电路的连接结构。 保护环通过触点热耦合到半导体衬底。 半导体结构还包括将由激光束产生的热量传导到保护环的金属板。