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公开(公告)号：US08664760B2
公开(公告)日：2014-03-04
申请号：US13343582
申请日：2012-01-04
申请人： Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Cheng-Chieh Hsieh , Kuo-Ching Hsu , Ying-Ching Shih , Po-Hao Tsai , Chin-Fu Kao , Cheng-Lin Huang , Jing-Cheng Lin
发明人： Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Cheng-Chieh Hsieh , Kuo-Ching Hsu , Ying-Ching Shih , Po-Hao Tsai , Chin-Fu Kao , Cheng-Lin Huang , Jing-Cheng Lin
CPC分类号： H01L24/11 , H01L23/147 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/04 , H01L25/50 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05073 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05184 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/10145 , H01L2224/10156 , H01L2224/1146 , H01L2224/1147 , H01L2224/1182 , H01L2224/11831 , H01L2224/13017 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13578 , H01L2224/13686 , H01L2224/16058 , H01L2224/16145 , H01L2224/81193 , H01L2224/81815 , H01L2924/01322 , H01L2924/01327 , H01L2924/3651 , H01L2924/3841 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/01047 , H01L2924/049 , H01L2924/053 , H01L2924/00
摘要： A device includes a top dielectric layer having a top surface. A metal pillar has a portion over the top surface of the top dielectric layer. A non-wetting layer is formed on a sidewall of the metal pillar, wherein the non-wetting layer is not wettable to the molten solder. A solder region is disposed over and electrically coupled to the metal pillar.
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公开(公告)号：US08610285B2
公开(公告)日：2013-12-17
申请号：US13298046
申请日：2011-11-16
申请人： Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Kuo-Ching Hsu , Cheng-Chieh Hsieh , Ying-Ching Shih , Po-Hao Tsai , Cheng-Lin Huang , Jing-Cheng Lin
发明人： Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Kuo-Ching Hsu , Cheng-Chieh Hsieh , Ying-Ching Shih , Po-Hao Tsai , Cheng-Lin Huang , Jing-Cheng Lin
IPC分类号： H01L23/498 , H01L21/768 , H01L23/48 , H01L29/40
CPC分类号： H01L24/11 , H01L23/147 , H01L23/49827 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/04 , H01L25/50 , H01L2224/0361 , H01L2224/03912 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05073 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05184 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/10145 , H01L2224/10156 , H01L2224/1146 , H01L2224/1147 , H01L2224/1182 , H01L2224/11831 , H01L2224/13017 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13565 , H01L2224/13578 , H01L2224/13686 , H01L2224/16058 , H01L2224/16145 , H01L2224/81193 , H01L2224/81815 , H01L2924/01322 , H01L2924/01327 , H01L2924/3651 , H01L2924/3841 , H01L2924/00014 , H01L2924/01029 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/01047 , H01L2924/049 , H01L2924/053 , H01L2924/00
摘要： A package component is free from active devices therein. The package component includes a substrate, a through-via in the substrate, a top dielectric layer over the substrate, and a metal pillar having a top surface over a top surface of the top dielectric layer. The metal pillar is electrically coupled to the through-via. A diffusion barrier is over the top surface of the metal pillar. A solder cap is disposed over the diffusion barrier.
摘要翻译： 封装组件不含其中的有源器件。 封装部件包括衬底，衬底中的通孔，衬底上的顶部电介质层，以及在顶部电介质层的顶表面上方具有顶表面的金属柱。 金属柱电连接到通孔。 扩散阻挡层在金属支柱的上表面之上。 焊料帽设置在扩散阻挡层上。
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公开(公告)号：US08896136B2
公开(公告)日：2014-11-25
申请号：US12827563
申请日：2010-06-30
申请人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Chen-Yu Tsai , Shih-Hui Wang , Chien-Ming Chiu , Chia-Ho Chen , Fang Wen Tsai , Weng-Jin Wu , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/544 , H01L29/40 , H01L23/48 , H01L23/52 , H01L21/76 , H01L21/00 , H01L21/4763 , H01L21/44 , H01L21/683
CPC分类号： H01L23/481 , H01L21/30604 , H01L21/6835 , H01L21/76831 , H01L21/76877 , H01L21/76898 , H01L23/544 , H01L2221/68327 , H01L2223/54426 , H01L2224/13
摘要： In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.
摘要翻译： 根据实施例，结构包括具有第一区域和第二区域的基板; 穿过基板的第一区域的贯穿基板通孔（TSV）; 在所述衬底的所述第二区域上方的隔离层，所述隔离层具有凹部; 以及在所述隔离层的所述凹部中的导电材料，所述隔离层设置在所述凹部中的所述导电材料和所述基板之间。
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公开(公告)号：US08962392B2
公开(公告)日：2015-02-24
申请号：US13418868
申请日：2012-03-13
申请人： Chin-Fu Kao , Jing-Cheng Lin , Jui-Pin Hung , Szu Wei Lu
发明人： Chin-Fu Kao , Jing-Cheng Lin , Jui-Pin Hung , Szu Wei Lu
CPC分类号： H01L21/563 , H01L21/568 , H01L23/562 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/92 , H01L25/0655 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/16225 , H01L2224/2929 , H01L2224/29386 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/12042 , H01L2924/157 , H01L2924/3511 , H01L2924/00012 , H01L2924/00
摘要： A method includes bonding a carrier over a top die. The method further includes curing an underfill disposed between a substrate and the top die. The method further includes applying a force over the carrier during the curing. The method further includes removing the carrier from the top die.
摘要翻译： 一种方法包括将载体粘合在顶模上。 该方法还包括固化设置在基底和顶模之间的底部填充物。 该方法还包括在固化期间在载体上施加力。 该方法还包括从顶模移除载体。
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公开(公告)号：US08105875B1
公开(公告)日：2012-01-31
申请号：US12904835
申请日：2010-10-14
申请人： Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人： Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号： H01L21/50
CPC分类号： H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要： A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
摘要翻译： 一种方法包括提供包括衬底的中介层晶片，以及从衬底的前表面延伸到衬底中的多个贯通衬底通孔（TSV）。 多个管芯结合到插入件晶片的前表面上。 在结合多个模具的步骤之后，在基板的背面进行研磨以暴露多个TSV。 多个金属凸块形成在插入器晶片的背面并电耦合到多个TSV。
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公开(公告)号：US08567837B2
公开(公告)日：2013-10-29
申请号：US12954180
申请日：2010-11-24
申请人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： B66F19/00
CPC分类号： H01L21/6875 , B65G47/90 , H01L21/68707 , Y10T74/20305
摘要： An apparatus includes a robot arm, and a plurality of guide pins mounted on the robot arm. Each of the plurality of guide pins includes a plurality of wafer supports at different levels, with each of the plurality of wafer supports configured to support and center a wafer having a size different from wafers configured to be supported and centered by remaining ones of the plurality of wafer supports.
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公开(公告)号：US08540506B2
公开(公告)日：2013-09-24
申请号：US12857245
申请日：2010-08-16
申请人： Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L21/56
CPC分类号： H01L21/56 , H01L21/561 , H01L21/565 , H01L21/67126 , H01L23/3121 , H01L24/94 , H01L2224/16145 , H01L2224/81191 , H01L2224/81192 , H01L2224/94 , H01L2924/181 , H01L2224/81 , H01L2924/00
摘要： A system and method for a semiconductor molding chamber is disclosed. An embodiment comprises a top molding portion and a bottom molding portion that form a cavity between them into which a semiconductor wafer is placed. The semiconductor molding chamber has a first set of vacuum tubes which hold and fix the position of the semiconductor wafer and a second set of vacuum tubes which evacuate the cavity of extraneous ambient gasses. The encapsulant may then be placed over the semiconductor wafer in order to encapsulate the semiconductor wafer.
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公开(公告)号：US08319349B2
公开(公告)日：2012-11-27
申请号：US13342583
申请日：2012-01-03
申请人： Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
发明人： Hsien-Pin Hu , Chen-Hua Yu , Shin-Puu Jeng , Shang-Yun Hou , Jing-Cheng Lin , Wen-Chih Chiou , Hung-Jung Tu
IPC分类号： H01L23/48
CPC分类号： H01L21/561 , H01L21/486 , H01L23/147 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/97 , H01L25/0655 , H01L2224/05001 , H01L2224/05027 , H01L2224/05571 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2224/81 , H01L2924/00012 , H01L2924/00 , H01L2224/05541 , H01L2224/05005 , H01L2224/05599 , H01L2224/05099
摘要： A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
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39.发明申请公开(公告)号：US20120128457A1
公开(公告)日：2012-05-24
申请号：US12954180
申请日：2010-11-24
申请人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Hsin Chang , Hsin-Yu Chen , Fang Wen Tsai , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
CPC分类号： H01L21/6875 , B65G47/90 , H01L21/68707 , Y10T74/20305
摘要： An apparatus includes a robot arm, and a plurality of guide pins mounted on the robot arm. Each of the plurality of guide pins includes a plurality of wafer supports at different levels, with each of the plurality of wafer supports configured to support and center a wafer having a size different from wafers configured to be supported and centered by remaining ones of the plurality of wafer supports
摘要翻译： 一种装置包括机器人臂和安装在机器人手臂上的多个引导销。 多个引导销中的每一个包括多个不同级别的晶片支架，其中多个晶片支撑件中的每一个被配置为支撑和定心具有不同晶圆尺寸的晶片，所述晶片被配置为被多个晶圆支撑的中心部分支撑并居中 的晶片支架
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公开(公告)号：US20120025368A1
公开(公告)日：2012-02-02
申请号：US12847802
申请日：2010-07-30
申请人： Yan-Fu Lin , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
发明人： Yan-Fu Lin , Jing-Cheng Lin , Wen-Chih Chiou , Shin-Puu Jeng , Chen-Hua Yu
IPC分类号： H01L23/544 , H01L21/56 , H01L23/498
CPC分类号： H01L21/563 , H01L23/49838 , H01L23/544 , H01L24/11 , H01L24/81 , H01L2223/54413 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2223/5448 , H01L2223/54486 , H01L2224/1132 , H01L2224/11334 , H01L2224/1145 , H01L2224/11462 , H01L2224/11849 , H01L2224/131 , H01L2224/13111 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/73204 , H01L2224/8113 , H01L2224/81132 , H01L2224/81191 , H01L2224/81815 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/351 , H01L2924/00014 , H01L2224/13099 , H01L2924/00
摘要： A system and method for determining underfill expansion is provided. An embodiment comprises forming cover marks along a top surface of a substrate, attaching a semiconductor substrate to the top surface of the substrate, placing an underfill material between the semiconductor substrate and the substrate, and then using the cover marks to determine the expansion of the underfill over the top surface of the substrate. Additionally, cover marks may also be formed along a top surface of the semiconductor substrate, and the cover marks on both the substrate and the semiconductor substrate may be used together as alignment marks during the alignment of the substrate and the semiconductor substrate.
摘要翻译： 提供了一种用于确定底部填充膨胀的系统和方法。 一个实施例包括沿着衬底的顶表面形成覆盖标记，将半导体衬底附接到衬底的顶表面，将底部填充材料放置在半导体衬底和衬底之间，然后使用覆盖标记来确定 底部填充在基材的顶表面上。 此外，也可以沿着半导体衬底的顶表面形成覆盖标记，并且衬底和半导体衬底上的覆盖标记可以在衬底和半导体衬底的对准期间一起用作对准标记。
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