公开(公告)号：US09041212B2

公开(公告)日：2015-05-26

申请号：US13787476

申请日：2013-03-06

Applicant: QUALCOMM Incorporated

Inventor： Dong Wook Kim ,  Victor Adrian Chiriac ,  Kyu-Pyung Hwang ,  Changhan Hobie Yun ,  Young Kyu Song

IPC: H01L23/48 ,  H01L23/34 ,  H01L23/367 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L25/0652 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06565 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: Some implementations provide a semiconductor package structure that includes a package substrate, a first package, an interposer coupled to the first package, and a first set of through via insert (TVI). The first set of TVI is coupled to the interposer and the package substrate. The first set of TVI is configured to provide heat dissipation from the first package. In some implementations, the semiconductor package structure further includes a heat spreader coupled to the interposer. The heat spreader is configured to dissipate heat from the first package. In some implementations, the first set of TVI is further configured to provide an electrical path between the first package and the package substrate. In some implementations, the first package is electrically coupled to the package substrate through the interposer and the first set of TVI. In some implementations, the first set of TVI includes a dielectric layer and a metal layer.

Abstract translation: 一些实施方案提供半导体封装结构，其包括封装衬底，第一封装，耦合到第一封装的插入器和第一组通孔插入件（TVI）。 第一组TVI耦合到插入器和封装衬底。 第一组TVI被配置为提供第一包装的散热。 在一些实施方案中，半导体封装结构还包括耦合到插入件的散热器。 散热器被配置为从第一包装散发热量。 在一些实施方式中，第一组TVI被进一步配置成在第一封装和封装衬底之间提供电路径。 在一些实施方案中，第一封装通过插入器和第一组TVI电耦合到封装衬底。 在一些实施方案中，第一组TVI包括电介质层和金属层。

公开(公告)号：US20140167273A1

公开(公告)日：2014-06-19

申请号：US13719984

申请日：2012-12-19

Applicant: QUALCOMM INCORPORATED

Inventor： Jonghae Kim ,  Chengjie Zuo ,  Changhan Yun ,  Mario Francisco Velez ,  Ravindra V. Shenoy ,  Matthew M. Nowak ,  Francesco Carobolante ,  Kyu-Pyung Hwang ,  Dong Wook Kim ,  Young K. Song

IPC: H01L23/482 ,  H01L23/00

CPC classification number: H01L21/6836 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/1517 ,  H01L2924/181 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10015 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: One feature pertains to a multi-layer package substrate of an integrated circuit package that comprises a discrete circuit component (DCC) having at least one electrode. The DCC is embedded within an insulator layer, and a via coupling component electrically couples to the electrode. A first portion of the via coupling component extends beyond a first edge of the electrode, and a plurality of vias each having a first end couple to the first via coupling component. At least a first via of the plurality of vias couples to the first portion of the via coupling component that extends beyond the first edge of the electrode. Moreover, the plurality of vias each have a second end that electrically couple to a first outer metal layer, and at least a second portion of the via coupling component is positioned within a first inner metal layer.

Abstract translation: 一个特征涉及集成电路封装的多层封装衬底，其包括具有至少一个电极的分立电路部件（DCC）。 DCC嵌入在绝缘体层内，并且通孔耦合部件电耦合到电极。 通孔耦合部件的第一部分延伸超过电极的第一边缘，并且多个通孔各自具有耦合到第一通路耦合部件的第一端。 多个通孔中的至少第一通孔耦合到延伸超出电极的第一边缘的通孔连接部件的第一部分。 此外，多个通孔各自具有电耦合到第一外部金属层的第二端，并且通孔连接部件的至少第二部分位于第一内部金属层内。

公开(公告)号：US20140139969A1

公开(公告)日：2014-05-22

申请号：US13684072

申请日：2012-11-21

Applicant: QUALCOMM INCORPORATED

Inventor： Kyu-Pyung Hwang ,  Youngsville K. Song ,  Changhan Yun ,  Dong Wook Kim

IPC: H01G4/002

CPC classification number: H01G4/002 ,  H01G4/012 ,  H01G4/33 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19105 ,  Y10T29/417 ,  H01L2924/00

Abstract: Some novel features pertain to a capacitor structure that includes a first conductive layer, a second conductive layer and a non-conductive layer. The first conductive layer has a first overlapping portion and a second overlapping portion. The second conductive layer has a third overlapping portion, a fourth overlapping portion, and a non-overlapping portion. The third overlapping portion overlaps with the first overlapping portion of the first conductive layer. The fourth overlapping portion overlaps with the second overlapping portion of the first conductive layer. The non-overlapping portion is free of any overlap (e.g., vertical overlap) with the first conductive layer. The non-conductive layer separates the first and second conductive layers. The non-conductive layer electrically insulates the third overlapping portion and the fourth overlapping portion from the first conductive layer.

Abstract translation: 一些新颖的特征涉及包括第一导电层，第二导电层和非导电层的电容器结构。 第一导电层具有第一重叠部分和第二重叠部分。 第二导电层具有第三重叠部分，第四重叠部分和非重叠部分。 第三重叠部分与第一导电层的第一重叠部分重叠。 第四重叠部分与第一导电层的第二重叠部分重叠。 非重叠部分与第一导电层没有任何重叠（例如，垂直重叠）。 非导电层分离第一和第二导电层。 非导电层将第三重叠部分和第四重叠部分与第一导电层电绝缘。

公开(公告)号：US20140132297A1

公开(公告)日：2014-05-15

申请号：US13675673

申请日：2012-11-13

Applicant: QUALCOMM INCORPORATED

Inventor： Kyu-Pyung Hwang ,  Young K. Song ,  Changhan Hobie Yun ,  Dong Wook Kim

IPC: G01R1/07

CPC classification number: G01R1/07 ,  G01R31/002

Abstract: Systems and methods for EMC, EMI and ESD testing are described. A probe comprises a center conductor extending along an axis of the probe, a probe tip, and a shield coaxially aligned with the center conductor and configured to provide electromagnetic screening for the probe tip. One or more actuators may change the relative positions of the probe tip and shield with respect to a device under test, thereby enabling control of sensitivity and resolution of the probe.

Abstract translation: 描述了用于EMC，EMI和ESD测试的系统和方法。 探针包括沿着探针的轴线延伸的中心导体，探针尖端和与中心导体同轴对准的屏蔽并且被配置为为探针尖端提供电磁屏蔽。 一个或多个致动器可以相对于被测器件改变探头尖端和屏蔽件的相对位置，从而能够控制探头的灵敏度和分辨率。

公开(公告)号：US10049977B2

公开(公告)日：2018-08-14

申请号：US14450201

申请日：2014-08-01

Applicant: QUALCOMM Incorporated

Inventor： Hong Bok We ,  Dong Wook Kim ,  Jae Sik Lee ,  Kyu-Pyung Hwang ,  Young Kyu Song

IPC: H01L23/495 ,  H01L23/498 ,  H01L25/10 ,  H01L21/48 ,  H01L23/31 ,  H01L25/065 ,  H01L23/538

Abstract: A package on package structure may be formed by fabricating or providing a bottom package having a substrate, at least one die on top of the substrate, and bonding pads on the top of the substrate. Next, a frame is formed on the bonding pads and connected to the bonding pads. Next, a package material is molded over the top of the substrate to encapsulate the frame, the die, and the pads or substantially encapsulates these components. Next, a portion of the molded package material is removed to expose at least a portion of the frame. The exposed frame portions are formed such that a desired fan in or fan out configuration is obtained. Next, a non-conductive layer is formed on the exposed frame. Last, a second package having a die or chip is connected to the exposed portion of the frame to form a package on package structure.

公开(公告)号：US09875997B2

公开(公告)日：2018-01-23

申请号：US14572753

申请日：2014-12-16

Applicant: QUALCOMM Incorporated

Inventor： Hong Bok We ,  Dong Wook Kim ,  Kyu-Pyung Hwang ,  Young Kyu Song

IPC: H01L25/10 ,  H01L23/14 ,  H01L25/00 ,  H01L23/13 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/105 ,  H01L23/13 ,  H01L23/142 ,  H01L23/3128 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24247 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/83192 ,  H01L2224/92244 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/15153 ,  H01L2924/15155 ,  H01L2924/15311 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/3511

Abstract: The present disclosure provides semiconductor packages and methods for fabricating PoP semiconductor packages. The PoP semiconductor package may comprise a first semiconductor package, the first semiconductor package comprising an anodized metal lid structure comprising (i) a central cavity having a central cavity opening direction and (ii) at least one perimeter cavity having a perimeter cavity opening direction facing in an opposite direction of the central cavity opening direction, a first semiconductor device arranged in the central cavity of the anodized metal lid structure, a redistribution layer electrically coupled to the first semiconductor device, wherein a conductive trace formed in the redistribution layer is exposed to the at least one perimeter cavity, and solder material arranged in the at least one perimeter cavity, and a second semiconductor package, the second semiconductor package comprising at least one conductive post, wherein the at least one conductive post is electrically coupled to the solder material arranged in the at least one perimeter cavity.

公开(公告)号：US20170125332A1

公开(公告)日：2017-05-04

申请号：US14634547

申请日：2015-02-27

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Kyu-Pyung Hwang ,  Hong Bok We

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L21/4857 ,  H01G4/12 ,  H01G4/224 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/13 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1183 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13101 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/27312 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/9211 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014

Abstract: Many aspects of an improved IC package are disclosed herein. The improved IC package exhibits low-impedance and high power and signal integrity. The improved IC package comprises an IC die mounted on a multilayer coreless substrate. The thicknesses of prepreg layers of the coreless substrate are specific chosen to minimize warpage and to provide good mechanical performance. Each of the prepreg layers may have different coefficient of thermal expansion (CTE) and/or thickness to enable better control of the coreless substrate mechanical properties. The improved IC package also includes a vertically mounted die side capacitor and a conductive layer formed on the solder resist layer of the substrate. The conductive layer is formed such that it also encapsulates the vertically mounted capacitor while being electrically coupled to one of the capacitor's electrode.

公开(公告)号：US09502491B2

公开(公告)日：2016-11-22

申请号：US14791164

申请日：2015-07-02

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Kyu-Pyung Hwang ,  Dong Wook Kim ,  Changhan Hobie Yun

IPC: H01L21/00 ,  H01L23/00 ,  H01L49/02 ,  H01L23/64 ,  H01L23/498 ,  H01L27/08 ,  H01L25/16 ,  H01G4/30 ,  H01G2/06 ,  H01G4/012 ,  H01L21/48 ,  H01L23/522 ,  H01G4/12

CPC classification number: H01L28/40 ,  H01G2/06 ,  H01G4/012 ,  H01G4/12 ,  H01G4/1227 ,  H01G4/30 ,  H01G4/306 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5223 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/16 ,  H01L27/0805 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16267 ,  H01L2224/81815 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/014

Abstract: A multilayer capacitor is provided that includes a plurality of vias configured to receive interconnects from a die.

公开(公告)号：US20160322300A1

公开(公告)日：2016-11-03

申请号：US15210538

申请日：2016-07-14

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Kyu-Pyung Hwang

IPC: H01L23/522 ,  H01L23/00 ,  H01L21/683 ,  H01L23/31 ,  H01L21/56 ,  H01L23/552

CPC classification number: H01L23/5227 ,  H01F17/0006 ,  H01F27/2804 ,  H01F27/292 ,  H01F27/362 ,  H01F2017/002 ,  H01F2017/008 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/552 ,  H01L23/645 ,  H01L24/13 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/0237 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025

Abstract: Some novel features pertain to an integrated device package that includes a die, an electromagnetic (EM) passive device, an encapsulation layer covering the die and the EM passive device, and a redistribution portion coupling the die and the EM passive device. In some implementations, the EM passive device includes an electromagnetic (EM) passive device. The EM passive device includes a base layer, a via traversing the base layer, a pad coupled to the via, and at least redistribution layer configured to operate as electromagnetic (EM) passive component, where the redistribution layer is coupled to the pad. The redistribution portion of the EM passive device includes at least one redistribution layer that is configured to electrically couple the die to the EM passive device. The redistribution portion includes at least one redistribution layer that is configured as an electromagnetic (EM) shield.

Abstract translation: 一些新颖的特征涉及包括管芯，电磁（EM）无源器件，覆盖管芯和EM无源器件的封装层以及耦合管芯和EM无源器件的再分配部分的集成器件封装。 在一些实施方案中，EM无源器件包括电磁（EM）无源器件。 EM无源器件包括基极层，穿过基极层的通孔，耦合到通孔的焊盘以及被配置为作为电磁（EM）无源部件工作的至少再分布层，其中再分配层耦合到焊盘。 EM无源器件的再分配部分包括至少一个再分配层，其被配置为将管芯电耦合到EM无源器件。 再分配部分包括被配置为电磁（EM）屏蔽的至少一个再分配层。

公开(公告)号：US09425143B2

公开(公告)日：2016-08-23

申请号：US14543575

申请日：2014-11-17

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Kyu-Pyung Hwang

IPC: H01L23/522 ,  H01L23/28 ,  H01L23/50 ,  H01L23/552 ,  H01L21/56 ,  H01F27/29 ,  H01L23/64 ,  H01L23/00 ,  H01L25/16 ,  H01F17/00

CPC classification number: H01L23/5227 ,  H01F17/0006 ,  H01F27/2804 ,  H01F27/292 ,  H01F27/362 ,  H01F2017/002 ,  H01F2017/008 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/50 ,  H01L23/5226 ,  H01L23/552 ,  H01L23/645 ,  H01L24/13 ,  H01L24/18 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L25/16 ,  H01L2224/0231 ,  H01L2224/0237 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24195 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/3025

Abstract: Some novel features pertain to an integrated device package that includes a die, an electromagnetic (EM) passive device, an encapsulation layer covering the die and the EM passive device, and a redistribution portion coupling the die and the EM passive device. In some implementations, the EM passive device includes an electromagnetic (EM) passive device. The EM passive device includes a base layer, a via traversing the base layer, a pad coupled to the via, and at least redistribution layer configured to operate as electromagnetic (EM) passive component, where the redistribution layer is coupled to the pad. The redistribution portion of the EM passive device includes at least one redistribution layer that is configured to electrically couple the die to the EM passive device. The redistribution portion includes at least one redistribution layer that is configured as an electromagnetic (EM) shield.

Abstract translation: 一些新颖的特征涉及包括管芯，电磁（EM）无源器件，覆盖管芯和EM无源器件的封装层以及耦合管芯和EM无源器件的再分配部分的集成器件封装。 在一些实施方案中，EM无源器件包括电磁（EM）无源器件。 EM无源器件包括基极层，穿过基极层的通孔，耦合到通孔的焊盘以及被配置为作为电磁（EM）无源部件工作的至少再分布层，其中再分配层耦合到焊盘。 EM无源器件的再分配部分包括至少一个再分配层，其被配置为将管芯电耦合到EM无源器件。 再分配部分包括被配置为电磁（EM）屏蔽的至少一个再分配层。