公开(公告)号：US20120068359A1

公开(公告)日：2012-03-22

申请号：US13320798

申请日：2010-05-18

申请人： Kentaro Mori ,  Yoshiki Nakashima ,  Daisuke Ohshima ,  Katsumi Kikuchi ,  Shintaro Yamamichi

发明人： Kentaro Mori ,  Yoshiki Nakashima ,  Daisuke Ohshima ,  Katsumi Kikuchi ,  Shintaro Yamamichi

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L23/5389 ,  H01L23/49827 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/24051 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/10674 ,  H01L2924/00

摘要： A semiconductor device comprises: a core substrate; at least one insulating layer and at least one wiring layer which are disposed on each of a first surface of the core substrate and a second surface opposite to the first surface; a via(s) which is disposed in each of the insulating layer and the core substrate, and connects the wiring layers to each other; a semiconductor element, mounted on the first surface of the core substrate, with a surface for forming an electrode terminal(s) facing up; and a connecting portion(s) which penetrates the insulating layer disposed on the first surface and directly connects the electrode terminal of the semiconductor element and the wiring layer disposed on the first surface. A minimum wiring pitch of the wiring layer directly connected to the connecting portion is smaller than that of any of the wiring layer(s) disposed on the second surface.

摘要翻译： 半导体器件包括：芯基板; 至少一个绝缘层和至少一个布线层，其布置在所述芯基板的第一表面和与所述第一表面相对的第二表面中的每一个上; 布置在所述绝缘层和所述芯基板的每一个中的通孔，并且将所述布线层彼此连接; 半导体元件，安装在所述芯基板的第一表面上，具有用于形成面向上的电极端子的表面; 以及穿过设置在第一表面上的绝缘层的直接连接半导体元件的电极端子和布置在第一表面上的布线层的连接部分。 直接连接到连接部分的布线层的最小布线间距小于布置在第二表面上的布线层中的布线层的最小布线间距。

公开(公告)号：US08072073B2

公开(公告)日：2011-12-06

申请号：US12210702

申请日：2008-09-15

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima

IPC分类号： H01L29/40 ,  H01L21/44

CPC分类号： H01L23/5283 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/5329 ,  H01L24/05 ,  H01L2924/00013 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12044 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/29099 ,  H01L2924/00

摘要： A highly reliable semiconductor device in which connection reliability is assured at very small vias comprises: a semiconductor substrate; a first wiring structure placed on the semiconductor substrate and having one or more first wiring layers, one or more insulating layers and a first via; a second wiring structure placed on the first wiring structure and having one or more second wiring layers, one or more second insulating layers, a second via and a third via; and an external terminal provided on the second wiring structure. The second via, which is connected to the second wiring layer of the second wiring structure and to the external terminal, has a connection interface disposed at an end of the via that is on the side of the external terminal.

摘要翻译： 在非常小的通孔中确保连接可靠性的高度可靠的半导体器件包括：半导体衬底; 放置在半导体衬底上并具有一个或多个第一布线层，一个或多个绝缘层和第一通孔的第一布线结构; 放置在第一布线结构上并具有一个或多个第二布线层，一个或多个第二绝缘层，第二通孔和第三通孔的第二布线结构; 以及设置在第二布线结构上的外部端子。 连接到第二布线结构的第二布线层和外部端子的第二通孔具有布置在位于外部端子一侧的通孔的端部处的连接接口。

公开(公告)号：US08004074B2

公开(公告)日：2011-08-23

申请号：US12102414

申请日：2008-04-14

申请人： Kentaro Mori ,  Katsumi Kikuchi ,  Shintaro Yamamichi

发明人： Kentaro Mori ,  Katsumi Kikuchi ,  Shintaro Yamamichi

IPC分类号： H01L23/02

CPC分类号： H01L21/6835 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/85 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device, in which a semiconductor element is mounted on one side of a circuit board that is made up from an insulating layer and a wiring layer, includes metal posts provided on the side of the circuit board on which the semiconductor element is mounted; and a sealing layer provided on the side of the circuit board on which the semiconductor element is mounted such that the semiconductor element is covered and such that only portions of the metal posts are exposed.

摘要翻译： 一种半导体器件，其中半导体元件安装在由绝缘层和布线层构成的电路板的一侧上，包括设置在其上安装有半导体元件的电路板侧的金属柱; 以及密封层，设置在电路板的安装半导体元件的侧面上，使得半导体元件被覆盖，并且仅使金属柱的一部分露出。

公开(公告)号：US07791186B2

公开(公告)日：2010-09-07

申请号：US11542261

申请日：2006-10-04

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

IPC分类号： H01L23/12

CPC分类号： H01L25/0657 ,  H01L21/6835 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K3/20 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09881 ,  H05K2201/0989 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board comprising a first surface on which a first electrode is disposed and a second surface on which a second electrode is disposed; at least a single insulation layer and at least a single wiring layer; and one or a plurality of mounted semiconductor elements, wherein the second electrode disposed on the second surface is embedded in the insulation layer, the surface on the opposite side of the exposed surface on the second surface side of the second electrode is connected to the wiring layer, and all or part of the side surface of the second electrode does not make contact with the insulation layer.

摘要翻译： 一种布线板，包括：第一表面，其上设置有第一电极;第二表面，其上设置有第二电极; 至少单个绝缘层和至少一个布线层; 以及一个或多个安装的半导体元件，其中设置在第二表面上的第二电极嵌入在绝缘层中，在第二电极的第二表面侧上的暴露表面的相对侧上的表面连接到布线 层，并且第二电极的全部或部分侧面不与绝缘层接触。

公开(公告)号：US20070079986A1

公开(公告)日：2007-04-12

申请号：US11542309

申请日：2006-10-04

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Yoichiro Kurita ,  Koji Soejima

IPC分类号： H05K1/11 ,  H05K3/30

CPC分类号： H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4644 ,  H05K2201/0367 ,  H05K2203/0733 ,  Y10T29/49128 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00

摘要： A multilayered wiring board has electrodes disposed on a first surface and a second surface, alternately layered insulation layers and wiring layers, and vias that are disposed in the insulation layer and electrically connect the wiring layers. The second electrode disposed on the second surface is embedded in the insulation layer exposed on said second surface, and the second wiring layer covered by the insulation layer exposed on said second surface does not have a layer for improving adhesion to the insulation layer.

摘要翻译： 多层布线基板具有设置在第一表面和第二表面上的电极，交替层叠的绝缘层和布线层以及布置在绝缘层中并且电连接布线层的通孔。 设置在第二表面上的第二电极嵌入在暴露在所述第二表面上的绝缘层中，并且由暴露在所述第二表面上的绝缘层覆盖的第二布线层不具有用于改善与绝缘层的粘附性的层。

公开(公告)号：US08872334B2

公开(公告)日：2014-10-28

申请号：US13636324

申请日：2011-03-22

申请人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Yoshiki Nakashima ,  Kentaro Mori

发明人： Shintaro Yamamichi ,  Katsumi Kikuchi ,  Yoshiki Nakashima ,  Kentaro Mori

IPC分类号： H01L23/48 ,  H01L23/538 ,  H05K3/46 ,  H05K1/18 ,  H01L23/00 ,  H01L23/66 ,  H01L23/498

CPC分类号： H05K1/185 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L23/66 ,  H01L24/18 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K3/4605 ,  H05K2201/09581 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2924/00

摘要： In a manufacturing method of a semiconductor device incorporating a semiconductor element in a multilayered wiring structure including a plurality of wiring layers and insulating layers, a semiconductor element is mounted on a silicon support body whose thickness is reduced to a desired thickness and which are equipped with a plurality of through-vias running through in the thickness direction; an insulating layer is formed to embed the semiconductor element; then, a plurality of wiring layers is formed on the opposite surfaces of the silicon support body in connection with the semiconductor element. Thus, it is possible to reduce warping which occurs in proximity to the semiconductor element in manufacturing, thus improving a warping profile in the entirety of a semiconductor device. Additionally, it is possible to prevent semiconductor elements from becoming useless, improve a yield rate, and produce a thin-type semiconductor device with high-density packaging property.

摘要翻译： 在包括多个布线层和绝缘层的多层布线结构中的包含半导体元件的半导体器件的制造方法中，将半导体元件安装在硅支撑体上，该硅支撑体的厚度减小到期望的厚度并且配备有 多个穿过厚度方向的通孔; 形成绝缘层以嵌入半导体元件; 那么在与硅半导体元件相连的硅支撑体的相对表面上形成多个布线层。 因此，可以减少在制造中在半导体元件附近发生的翘曲，从而改善整个半导体器件的翘曲轮廓。 此外，可以防止半导体元件变得无用，提高成品率，并且可以生产具有高密度封装性能的薄型半导体器件。

公开(公告)号：US08552570B2

公开(公告)日：2013-10-08

申请号：US12811733

申请日：2009-01-06

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima ,  Yoichiro Kurita

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Masaya Kawano ,  Kouji Soejima ,  Yoichiro Kurita

IPC分类号： H01L29/40

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/48 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/113 ,  H05K3/108 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/096 ,  H05K2203/0733 ,  Y10T29/49117 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In the wiring board, insulating layers and wiring layers are alternately laminated, and the wiring layers are electrically connected by the vias. The wiring board includes first terminals arranged in a first surface and embedded in an insulating layer, second terminals arranged in a second surface opposite to the first surface and embedded in an insulating layer, and lands arranged in an insulating layer and in contact with the first terminals. The vias electrically connect the lands and the wiring layers laminated alternately with the insulating layers. No connecting interface is formed at an end of each of the vias on the land side but a connecting interface is formed at an end of each of the vias on the wiring layer side.

摘要翻译： 在布线板中，绝缘层和布线层交替层叠，并且布线层通过通孔电连接。 布线基板包括布置在第一表面中并嵌入绝缘层中的第一端子，布置在与第一表面相对的第二表面中并嵌入绝缘层中的第二端子，以及布置在绝缘层中并与第一端子接触的焊盘 终端。 通孔将焊盘和与绝缘层交替层压的布线层电连接。 在接地侧的每个通孔的端部没有形成连接接口，但是在布线层侧的每个通孔的端部形成有连接接口。

公开(公告)号：US08536691B2

公开(公告)日：2013-09-17

申请号：US12446899

申请日：2007-10-09

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Masaya Kawano ,  Yuuji Kayashima

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Masaya Kawano ,  Yuuji Kayashima

IPC分类号： H01L23/02

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L2223/54486 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/24227 ,  H01L2224/73267 ,  H01L2224/76155 ,  H01L2224/82102 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2224/83 ,  H01L2224/82

摘要： A semiconductor device including a metal frame having a penetrating opening; a semiconductor chip provided in the opening; an insulating layer provided on the upper surface of the metal frame such that the insulating layer covers the upper surface, which is the circuit-formed surface of the semiconductor chip; an interconnect layer provided only on the upper-surface side of the metal frame with intervention of the insulating material and electrically connected to a circuit of the semiconductor chip; a via conductor provided on the upper surface of said semiconductor chip to electrically connect the circuit of the semiconductor chip and the interconnect layer; and a resin layer provided on the lower surface of the metal frame.

摘要翻译： 一种半导体器件，包括具有穿透开口的金属框架; 设置在开口内的半导体芯片; 绝缘层，设置在金属框架的上表面上，使得绝缘层覆盖作为半导体芯片的电路形成表面的上表面; 互连层，其仅在金属框架的上表面侧设置，并且绝缘材料的介入并且电连接到半导体芯片的电路; 设置在所述半导体芯片的上表面上的通孔导体，以电连接半导体芯片的电路和互连层; 以及设置在金属框架的下表面上的树脂层。

公开(公告)号：US20110175213A1

公开(公告)日：2011-07-21

申请号：US13062262

申请日：2009-10-05

申请人： Kentaro Mori ,  Daisuke Ohshima ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoshiki Nakashima

发明人： Kentaro Mori ,  Daisuke Ohshima ,  Shintaro Yamamichi ,  Hideya Murai ,  Katsumi Maeda ,  Katsumi Kikuchi ,  Yoshiki Nakashima

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L24/85 ,  H01L23/13 ,  H01L23/142 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/24 ,  H01L24/28 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L24/92 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/2402 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes: at least one semiconductor element having electrode terminals; a metal plate supporting the semiconductor element; and a wiring board covering the semiconductor element and including a plurality of insulating layers and wiring layers alternately stacked and external connection terminals on a surface, the wiring layers being electrically connected to each other by vias. The electrode terminals and the external connection terminals are electrically connected via at least one of the wiring layers and the vias. At least one of the electrode terminals, the is wiring layers, and the vias is electrically connected to the metal plate.

摘要翻译： 半导体器件包括：至少一个具有电极端子的半导体元件; 支撑半导体元件的金属板; 以及覆盖半导体元件并且在表面上交替堆叠的多个绝缘层和布线层以及外部连接端子的布线板，布线层通过通孔彼此电连接。 电极端子和外部连接端子经由布线层和通孔中的至少一个电连接。 至少一个电极端子，即布线层和通孔，电连接到金属板。

公开(公告)号：US07911038B2

公开(公告)日：2011-03-22

申请号：US12306987

申请日：2007-06-29

申请人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

发明人： Katsumi Kikuchi ,  Shintaro Yamamichi ,  Hideya Murai ,  Takuo Funaya ,  Kentaro Mori ,  Takehiko Maeda ,  Hirokazu Honda ,  Kenta Ogawa ,  Jun Tsukano

IPC分类号： H01L23/495

CPC分类号： H05K3/205 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48472 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12044 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/244 ,  H05K3/423 ,  H05K2201/0338 ,  H05K2201/098 ,  H05K2201/09845 ,  H05K2203/0376 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1476 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

摘要翻译： 布线基板具有绝缘层，多个布线层以通过绝缘层彼此绝缘的方式形成，以及形成在绝缘层中以连接布线层的多个通孔。 在布线层中，形成在绝缘层的一个表面上的表面布线层包括从一个表面露出的第一金属膜和嵌入在绝缘层中并叠放在第一金属膜上的第二金属膜。 第一金属膜的边缘沿着第二金属膜扩展的方向从第二金属膜的边缘突出。 通过以这种方式设计嵌入在绝缘层中的布线层的形状，可以获得在制造过程中可以有效地防止侧蚀刻的高可靠性布线板，并且可以适应电线的小型化和高密度封装 。