公开(公告)号：US20170140978A1

公开(公告)日：2017-05-18

申请号：US15421472

申请日：2017-02-01

申请人： Infineon Technologies Dresden GmbH

发明人： Steffen Bieselt

IPC分类号： H01L21/764

CPC分类号： H01L21/764 ,  B23Q3/18 ,  H01L21/4803 ,  H01L21/481 ,  H01L23/053 ,  H01L23/08 ,  H01L23/13 ,  H01L23/147 ,  H01L23/34 ,  H01L23/498 ,  H01L2924/0002 ,  Y10T29/49155 ,  H01L2924/00

摘要： According to various embodiments, a carrier may be provided, the carrier including: a hollow chamber spaced apart from a surface of the carrier; a trench structure extending from the surface of the carrier to the hollow chamber and laterally surrounding a first region of the carrier, the trench structure including one or more trenches extending from the surface of the carrier to the hollow chamber, and one or more support structures intersecting the one or more trenches and connecting the first region of the carrier with a second region of the carrier outside the trench structure, wherein the one or more support structures including an electrically insulating material.

公开(公告)号：US20170103960A1

公开(公告)日：2017-04-13

申请号：US15173742

申请日：2016-06-06

申请人： Mitsubishi Electric Corporation

发明人： Daisuke MURATA ,  Yuji IMOTO

IPC分类号： H01L23/00

CPC分类号： H01L24/29 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/492 ,  H01L23/498 ,  H01L23/562 ,  H01L24/27 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L25/072 ,  H01L2224/27013 ,  H01L2224/2746 ,  H01L2224/29082 ,  H01L2224/29101 ,  H01L2224/29144 ,  H01L2224/29155 ,  H01L2224/3003 ,  H01L2224/32245 ,  H01L2224/33 ,  H01L2224/33181 ,  H01L2224/37099 ,  H01L2224/40137 ,  H01L2224/83385 ,  H01L2224/83444 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/10254 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/15724 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/3656 ,  H01L2924/00012

摘要： A semiconductor device includes: an insulating substrate; an aluminum pattern made of a pure aluminum or alloy aluminum material and formed on the insulating substrate; a plating formed on a surface of the aluminum pattern; and a semiconductor element joined to the plating, wherein a thickness of the plating is 10 μm or more.

公开(公告)号：US09613878B2

公开(公告)日：2017-04-04

申请号：US14098570

申请日：2013-12-06

申请人： Infineon Technologies Dresden GmbH

发明人： Steffen Bieselt

IPC分类号： H05K1/00 ,  H01L23/053 ,  B23Q3/18 ,  H01L21/48 ,  H01L23/08 ,  H01L23/498 ,  H01L23/13 ,  H01L23/14 ,  H01L23/34

CPC分类号： H01L21/764 ,  B23Q3/18 ,  H01L21/4803 ,  H01L21/481 ,  H01L23/053 ,  H01L23/08 ,  H01L23/13 ,  H01L23/147 ,  H01L23/34 ,  H01L23/498 ,  H01L2924/0002 ,  Y10T29/49155 ,  H01L2924/00

摘要： According to various embodiments, a carrier may be provided, the carrier including: a hollow chamber spaced apart from a surface of the carrier; a trench structure extending from the surface of the carrier to the hollow chamber and laterally surrounding a first region of the carrier, the trench structure including one or more trenches extending from the surface of the carrier to the hollow chamber, and one or more support structures intersecting the one or more trenches and connecting the first region of the carrier with a second region of the carrier outside the trench structure, wherein the one or more support structures including an electrically insulating material.

公开(公告)号：US09601447B2

公开(公告)日：2017-03-21

申请号：US14713229

申请日：2015-05-15

申请人： Micron Technology, Inc.

发明人： Sensho Usami

IPC分类号： H01L23/498 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L24/06 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/97 ,  H01L25/065 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06586 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor chip at least includes a row of first electrode pad group, which includes at least one first independent electrode pad and multiple first common electrode pads. The interval between the first independent electrode pad and an electrode pad adjacent thereto is defined as “first pitch”, and the interval between adjacent electrode pads making up the multiple first common electrode pads is defined as “second pitch”. The first pitch is determined to be larger than the second pitch.

公开(公告)号：US20170076974A1

公开(公告)日：2017-03-16

申请号：US15343712

申请日：2016-11-04

申请人： Samsung Electronics Co., Ltd.

发明人： Byoungdeog Choi ,  JungWoo Seo ,  Sangyeon Han ,  Hyun-Woo Chung ,  Hongrae Kim ,  Yoosang Hwang

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L27/22 ,  H01L27/108 ,  H01L27/24 ,  H01L23/528 ,  H01L23/522

CPC分类号： H01L21/7682 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76897 ,  H01L23/498 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5329 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a pair of line patterns disposed on a substrate. A contact plug is disposed between the pair of line patterns and an air gap is disposed between the contact plug and the line patterns. A landing pad extends from a top end of the contact plug to cover a first part of the air gap and an insulating layer is disposed on a second part of the air gap, which is not covered by the landing pad.

摘要翻译： 半导体器件包括设置在衬底上的一对线图案。 接触插头设置在一对线路图案之间，并且气隙设置在接触插塞和线路图案之间。 着陆垫从接触塞的顶端延伸以覆盖气隙的第一部分，并且绝缘层设置在气隙的第二部分上，其未被着陆垫覆盖。

公开(公告)号：US20170069593A1

公开(公告)日：2017-03-09

申请号：US15356887

申请日：2016-11-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Bruce C.S. Chou ,  Chen-Jong Wang ,  Ping-Yin Liu ,  Jung-Kuo Tu ,  Tsung-Te Chou ,  Xin-Hua Huang ,  Hsun-Chung Kuang ,  Lan-Lin Chao ,  Chia-Shiung Tsai ,  Xiaomeng Chen

IPC分类号： H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC分类号： H01L24/80 ,  H01L21/3081 ,  H01L21/764 ,  H01L23/498 ,  H01L23/5226 ,  H01L23/53204 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/53295 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/09 ,  H01L24/83 ,  H01L24/93 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03845 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/0601 ,  H01L2224/08147 ,  H01L2224/0901 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06524 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/81805

摘要： A package component includes a surface dielectric layer including a planar top surface, a metal pad in the surface dielectric layer and including a second planar top surface level with the planar top surface, and an air trench on a side of the metal pad. The sidewall of the metal pad is exposed to the air trench.

摘要翻译： 封装部件包括表面电介质层，其包括平面顶表面，表面电介质层中的金属焊盘，并且包括具有平坦顶表面的第二平面顶表面水平面和在金属焊盘一侧的空气沟槽。 金属垫的侧壁暴露于空气沟槽。

公开(公告)号：US09583408B1

公开(公告)日：2017-02-28

申请号：US14832156

申请日：2015-08-21

申请人： International Business Machines Corporation

发明人： Marcus E. Interrante ,  Yi Pan ,  Hilton T. Toy ,  Jeffrey A. Zitz

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/34 ,  H01L23/16 ,  H01L23/373 ,  H01L23/498 ,  H01L21/50 ,  H01L21/48

CPC分类号： H01L23/16 ,  H01L21/4882 ,  H01L21/50 ,  H01L23/36 ,  H01L23/373 ,  H01L23/3737 ,  H01L23/498 ,  H01L23/562

摘要： Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.

摘要翻译： 用于减小电子封装的正交各向异性包封构件中的方向应力的方法和装置可包括将加强框架附接到载体上，加强框架包括中心开口以接纳半导体芯片和多个相对的侧壁，电连接半导体芯片 与所述载体同心地布置在所述中心开口内，并且使所述定向散热器与所述半导体芯片热接触，所述定向散热器从所述半导体芯片传递热量，其中所述定向散热器被成形为沿着所述相对双向器方向减小方向应力 。

公开(公告)号：US20170053845A1

公开(公告)日：2017-02-23

申请号：US14832156

申请日：2015-08-21

申请人： International Business Machines Corporation

发明人： Marcus E. INTERRANTE ,  Yi PAN ,  Hilton T. TOY ,  Jeffrey A. ZITZ

IPC分类号： H01L23/16 ,  H01L21/48 ,  H01L21/50 ,  H01L23/373 ,  H01L23/498

CPC分类号： H01L23/16 ,  H01L21/4882 ,  H01L21/50 ,  H01L23/36 ,  H01L23/373 ,  H01L23/3737 ,  H01L23/498 ,  H01L23/562

摘要： Methods and apparatuses for reducing directional stress in an orthotropic encapsulation member of an electronic package may include attaching a stiffening frame to a carrier, the stiffening frame comprising a central opening to accept a semiconductor chip and a plurality of opposing sidewalls, electronically coupling the semiconductor chip to the carrier concentrically arranged within the central opening, and thermally contacting a directional heat spreader to the semiconductor chip, the directional heat spreader transferring heat from the semiconductor chip, wherein the directional heat spreader is shaped to reduce a directional stress along the opposing bivector direction.

摘要翻译： 用于减小电子封装的正交各向异性包封构件中的方向应力的方法和装置可包括将加强框架附接到载体上，加强框架包括中心开口以接纳半导体芯片和多个相对的侧壁，电连接半导体芯片 与所述载体同心地布置在所述中心开口内，并且使所述定向散热器与所述半导体芯片热接触，所述定向散热器从所述半导体芯片传递热量，其中所述定向散热器被成形为沿着所述相对双向器方向减小方向应力 。

公开(公告)号：US09570633B2

公开(公告)日：2017-02-14

申请号：US14570949

申请日：2014-12-15

申请人： XINTEC INC.

发明人： Chien-Hung Liu

IPC分类号： H01L31/0203 ,  H01L31/18 ,  H01L31/02 ,  H01L35/34 ,  H01L35/02 ,  H01L23/31 ,  H01L23/498 ,  H01L23/053 ,  H01L23/00

CPC分类号： H01L35/08 ,  G01J5/024 ,  G01J5/045 ,  G01J5/20 ,  H01L21/78 ,  H01L23/053 ,  H01L23/3178 ,  H01L23/3185 ,  H01L23/498 ,  H01L24/33 ,  H01L24/94 ,  H01L27/14618 ,  H01L27/1462 ,  H01L27/14636 ,  H01L27/14685 ,  H01L27/14687 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/1876 ,  H01L35/02 ,  H01L35/10 ,  H01L35/34 ,  H01L2224/11

摘要： A semiconductor package includes a substrate, at least one support, a cover, and a plate. The substrate has at least one light sensor or thermal sensor, a first surface, and a second surface opposite to the first surface. The light sensor or the thermal sensor is disposed on the first surface. The second surface has an opening to expose the light sensor (or the thermal sensor). The support is disposed on the first surface. The cover is disposed on the support, such that the cover is above the light sensor (or the thermal sensor) to form a first space between the cover and the light sensor (or the thermal sensor). The plate is placed on the second surface to cover the opening, such that a second space is formed between the plate and the light sensor (or the thermal sensor).

摘要翻译： 半导体封装包括基板，至少一个支撑件，盖板和板。 衬底具有至少一个光传感器或热传感器，第一表面和与第一表面相对的第二表面。 光传感器或热传感器设置在第一表面上。 第二表面具有露出光传感器（或热传感器）的开口。 支撑件设置在第一表面上。 盖子设置在支撑件上，使得盖子在光传感器（或热传感器）上方，以在盖和光传感器（或热传感器）之间形成第一空间。 板被放置在第二表面上以覆盖开口，使得在板和光传感器（或热传感器）之间形成第二空间。

公开(公告)号：US20170018542A1

公开(公告)日：2017-01-19

申请号：US14812846

申请日：2015-07-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Michael J. SEDDON ,  Francis J. CARNEY

IPC分类号： H01L25/00 ,  H01L23/00 ,  H01L23/495 ,  H01L23/498 ,  H01L25/065 ,  H01L21/48

CPC分类号： H01L25/50 ,  H01L21/4825 ,  H01L21/4853 ,  H01L23/4827 ,  H01L23/495 ,  H01L23/498 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/97 ,  H01L25/065 ,  H01L25/0655 ,  H01L2224/27849 ,  H01L2224/29082 ,  H01L2224/29083 ,  H01L2224/291 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/29294 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/32503 ,  H01L2224/83048 ,  H01L2224/83211 ,  H01L2224/83411 ,  H01L2224/83439 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/8381 ,  H01L2224/83815 ,  H01L2224/83825 ,  H01L2224/8383 ,  H01L2224/97 ,  H01L2224/83 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method of bonding a plurality of die having first and second metal layers on a die surface to a board, comprising placing a first die onto a board comprising one of a ceramic or substrate board or metal lead frame having a solderable surface and placing the first die and the board into a reflow oven. The method includes reflowing at a first reflow temperature for a first period until the first metal board layer and at least one of the first and second metal die layers of the first die form an alloy to adhere the first die to the board. The alloy has a melting temperature higher than the first reflow temperature. Accordingly, additional die may be added at a later time and reflowed to attach to the board without causing the bonding of the first die to the board to fail.

摘要翻译： 一种将在模具表面上具有第一和第二金属层的多个模具结合到板上的方法，包括将第一管芯放置在包括具有可焊接表面的陶瓷或衬底板或金属引线框架之一的板上，并将第一 模具和板子进入回流炉。 该方法包括以第一回流温度回流第一时间段，直到第一金属板层和第一模具的第一和第二金属管芯层中的至少一个形成合金以将第一管芯附着到板上。 该合金的熔化温度高于第一回流温度。 因此，可以在稍后的时间添加附加的管芯，并且回流以附接到板，而不会导致第一管芯与板的结合失效。