公开(公告)号：US20070151758A1

公开(公告)日：2007-07-05

申请号：US11323515

申请日：2005-12-30

Applicant: Gregory Dunn ,  Jaroslaw Magera ,  Jovica Savic

Inventor： Gregory Dunn ,  Jaroslaw Magera ,  Jovica Savic

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/162 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0175 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/09718

Abstract: A method is for fabricating an embedded capacitance printed circuit board assembly (400, 1100). The embedded capacitance printed circuit board assembly includes two embedded capacitance structures (110). Each capacitance structure (110) includes a crystallized dielectric oxide layer (115) sandwiched between an outer electrode layer (120) and an inner electrode layer (125) in which the two inner electrode layers are electrically connected together. A rivet via (1315) and a stacked via (1110) formed from a button via (910) and a stacked blind via (1111) may be used to electrically connect the two inner electrode layers together. A spindle via (525) may be formed through the inner and outer layers. The multi-layer printed circuit board may be formed from a capacitive laminate (100) that includes two capacitance structures.

Abstract translation: 一种用于制造嵌入式电容印刷电路板组件（400,1100）的方法。 嵌入式电容印刷电路板组件包括两个嵌入式电容结构（110）。 每个电容结构（110）包括夹在两个内部电极层电连接在一起的外部电极层（120）和内部电极层（125）之间的结晶化电介质氧化物层（115）。 可以使用铆钉通孔（1315）和由按钮通孔（910）和堆叠的通孔（1111）形成的堆叠通孔（1110）将两个内部电极层电连接在一起。 主轴通孔（525）可以通过内层和外层形成。 多层印刷电路板可以由包括两个电容结构的电容层压板（100）形成。

公开(公告)号：US07237334B2

公开(公告)日：2007-07-03

申请号：US11207330

申请日：2005-08-18

Applicant: Islam A. Salama

Inventor： Islam A. Salama

IPC: H01R3/10

CPC classification number: H05K1/115 ,  H05K1/0296 ,  H05K1/09 ,  H05K1/181 ,  H05K3/0026 ,  H05K3/185 ,  H05K3/421 ,  H05K3/422 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2201/10159 ,  H05K2203/107 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of providing a printed circuit board, a printed circuit board formed according to the method, and a system comprising the printed circuit board. The method comprises: providing a microelectronic substrate; providing a via-defining substrate by providing via openings in the substrate using laser irradiation; providing a laser activatable film on the via-defining substrate; and providing interconnects on the via-defining substrate. Providing interconnects comprises providing a patterned build-up layer on the via-defining substrate comprising exposing the laser activatable film to laser irradiation to selectively activate portions of the film according to a predetermined interconnect pattern; and metallizing the patterned build-up layer according to the predetermined interconnect pattern to yield the interconnects to provide the printed circuit board.

Abstract translation: 一种提供印刷电路板的方法，根据该方法形成的印刷电路板以及包括印刷电路板的系统。 该方法包括：提供微电子衬底; 通过使用激光照射在所述衬底中提供通路孔来提供通孔限定衬底; 在通孔限定衬底上提供激光可激活膜; 并在通孔限定衬底上提供互连。 提供互连包括在通孔限定衬底上提供图案化的构建层，包括将激光可激活膜暴露于激光照射以根据预定的互连图案选择性地激活膜的部分; 以及根据预定的互连图案对图案化的堆积层进行金属化以产生互连以提供印刷电路板。

公开(公告)号：US20070144775A1

公开(公告)日：2007-06-28

申请号：US11635407

申请日：2006-12-06

Applicant: Kenji Hasegawa

Inventor： Kenji Hasegawa

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/421 ,  H05K3/3494 ,  H05K2201/091 ,  H05K2201/09509 ,  H05K2203/1178 ,  H05K2203/1394 ,  H05K2203/162

Abstract: According to one embodiment, there is provided a substrate inspection method including forming a film over an opening portion of a blind via hole formed in a printed-wiring board, and heating the printed-wiring board. Based on a variation in the shape of the film, it is possible to determine a defective blind via hole.

Abstract translation: 根据一个实施例，提供了一种基板检查方法，包括在形成在印刷电路板上的盲通孔的开口部分上形成膜，并加热印刷电路板。 基于薄膜形状的变化，可以确定有缺陷的盲孔。

公开(公告)号：US20070139294A1

公开(公告)日：2007-06-21

申请号：US11312286

申请日：2005-12-20

Applicant: Gregory Dunn ,  Robert Croswell ,  George Kumpf ,  John Svigelj

Inventor： Gregory Dunn ,  Robert Croswell ,  George Kumpf ,  John Svigelj

IPC: H01Q15/24

CPC classification number: H01Q15/006 ,  H05K1/116 ,  H05K1/162 ,  H05K1/165 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/0715 ,  H05K2201/09509 ,  H05K2201/09609

Abstract: A high impedance surface (300) has a printed circuit board (302) with a first surface (314) and a second surface (316), and a continuous electrically conductive plate (319) disposed on the second surface (316) of the printed circuit board (302). A plurality of electrically conductive plates (318) is disposed on the first surface (314) of the printed circuit board (302), while a plurality of elements are also provided. Each element comprises at least one of (1) at least one multi-layer inductor (330, 331) electrically coupled between at least two of the electrically conductive plates (318) and embedded within the printed circuit board (302), and (2) at least one capacitor (320) electrically coupled between at least two of the electrically conductive plates (318). The capacitor (320) comprises at least one of (a) a dielectric material (328) disposed between adjacent electrically conductive plates , wherein the dielectric material (328) has a relative dielectric constant greater than 6, and (b) a mezzanine capacitor embedded within the printed circuit board (302).

Abstract translation: 高阻抗表面（300）具有带有第一表面（314）和第二表面（316）的印刷电路板（302）和设置在印刷的第二表面（316）上的连续导电板（319） 电路板（302）。 多个导电板（318）设置在印刷电路板（302）的第一表面（314）上，同时还提供多个元件。 每个元件包括（1）至少一个电耦合在至少两个导电板（318）之间并嵌入印刷电路板（302）内的多层电感器（330,331）中的至少一个，和（2 ）至少一个电耦合在至少两个导电板（318）之间的电容器（320）。 电容器（320）包括设置在相邻导电板之间的（a）介电材料（328）中的至少一个，其中介电材料（328）具有大于6的相对介电常数，以及（b）嵌入的夹层电容器 在印刷电路板（302）内。

公开(公告)号：US20070111380A1

公开(公告)日：2007-05-17

申请号：US11598141

申请日：2006-11-13

Applicant: Suk-Hyeon Cho ,  Chang-Sup Ryu ,  Han-Seo Cho ,  Han Kim

Inventor： Suk-Hyeon Cho ,  Chang-Sup Ryu ,  Han-Seo Cho ,  Han Kim

IPC: H01L21/00

CPC classification number: H05K1/162 ,  H01F17/0033 ,  H01F41/046 ,  H05K1/165 ,  H05K1/167 ,  H05K2201/0355 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09881 ,  H05K2203/0361

Abstract: A method of fabricating a printed circuit board having embedded components is disclosed. The method of fabricating a printed circuit board having embedded components according to an embodiment of the present invention comprises stacking a first conductive layer and a second conductive layer on a substrate in order, forming a hole in the second conductive layer and filling with dielectric material, stacking a third conductive layer on the second conductive layer and removing portions to form an upper electrode located on the dielectric material and a pad electrically connected with the first conductive layer, and stacking an insulation layer on the third conductive layer and forming a via hole and an outer layer circuit electrically connected with the upper electrode and the pad, so that it is easy to process the dielectric material to have a uniform thickness, and the capacitor and the resistor can be implemented simultaneously.

Abstract translation: 公开了一种制造具有嵌入式部件的印刷电路板的方法。 根据本发明的实施例的制造具有嵌入部件的印刷电路板的方法包括在基板上层叠第一导电层和第二导电层，以在第二导电层中形成孔并填充电介质材料， 在所述第二导电层上堆叠第三导电层并去除部分以形成位于所述电介质材料上的上电极和与所述第一导电层电连接的焊盘，以及在所述第三导电层上堆叠绝缘层并形成通孔，以及 与上电极和焊盘电连接的外层电路，使得容易将电介质材料加工成具有均匀的厚度，并且可以同时实现电容器和电阻器。

公开(公告)号：US07218530B2

公开(公告)日：2007-05-15

申请号：US11179097

申请日：2005-07-12

Applicant: Scott Keith Mickievicz ,  John Edward Knaub

Inventor： Scott Keith Mickievicz ,  John Edward Knaub

IPC: H05K1/11 ,  H05K1/14

CPC classification number: H05K1/112 ,  H05K3/3421 ,  H05K3/4614 ,  H05K3/4623 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/10704 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165

Abstract: Tails (20) projecting from an electrical component (12) that lies on a circuit board surface, are terminated to traces on a multi-layer circuit board (14) in a manner that minimizes the disadvantages of long through hole soldering and of surface mount techniques. A blind hole is drilled and plated to form a shallow well (70). The well is filled with a soldering composition (130). A tail (20) is projected downward into the soldering composition with the extreme tip of the tail lying above the bottom of the hole, and the soldering composition is heated to solder the tail to the hole plating.

Abstract translation: 从位于电路板表面的电气部件（12）突出的尾部（20）以多层电路板（14）的迹线端接，以最小化长通孔焊接和表面安装的缺点 技术 钻孔并镀上盲孔以形成浅井（70）。 该井装有焊接组合物（130）。 尾部（20）向下突出到焊接组合物中，尾部的最末端位于孔的底部之上，并且焊接组合物被加热以将尾部焊接到孔镀层。

公开(公告)号：US20070105278A1

公开(公告)日：2007-05-10

申请号：US11615495

申请日：2006-12-22

Applicant: Takashi Kariya ,  Akira Mochida

Inventor： Takashi Kariya ,  Akira Mochida

IPC: H01L21/00 ,  H01L23/02

CPC classification number: H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2221/68363 ,  H01L2224/05001 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/0102 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/0175 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09718 ,  H05K2203/0353 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: In a printed wiring board 10, an upper electrode connecting portion 52 penetrates through a capacitor portion 40 in top to bottom direction so that an upper electrode connecting portion first part 52a is not in contact with the capacitor portion 40, passes through an upper electrode connecting portion third part 52c provided at the upper portion of the capacitor portion 40, and then connects from the upper electrode connecting portion second part 52b to an upper electrode 42. Furthermore, a lower electrode connecting portion 51 penetrates through the capacitor portion 40 in top to bottom direction so that it is not in contact with the upper electrode 42 of the capacitor portion 40, but is in contact with a lower electrode 41. Therefore, the upper electrode connecting portion 52 and the lower electrode connecting portion 51 can be formed even after in process of build-up, the whole surface is covered by a high dielectric capacitor sheet that has a structure that a high dielectric layer is sandwiched between two metal foils and will afterwards serve as the capacitor portion 40.

Abstract translation: 在印刷布线板10中，上部电极连接部52从上下方向贯穿电容器部40，使上部电极连接部第一部分52a不与电容器部40接触，通过上部电极 连接部分第三部分52c设置在电容器部分40的上部，然后从上电极连接部分第二部分52b连接到上电极42。 此外，下电极连接部51从上下方向贯通电容器部40，使其不与电容器部40的上部电极42接触，而与下部电极41接触。 因此，上部电极连接部52和下部电极连接部51即使在积聚的过程中也可以形成，整个表面被高介电电容器片覆盖，该介电电容片具有将介电层夹在高介电层之间的结构 两个金属箔，然后用作电容器部分40。

公开(公告)号：US20070072129A1

公开(公告)日：2007-03-29

申请号：US11309363

申请日：2006-08-01

Applicant: CHIA-CHUN LIAO ,  POR-YANN JIANG

Inventor： CHIA-CHUN LIAO ,  POR-YANN JIANG

IPC: G03C5/00

CPC classification number: H05K3/064 ,  H05K1/0393 ,  H05K3/002 ,  H05K3/421 ,  H05K3/427 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2203/0554 ,  H05K2203/0759

Abstract: The present invention provides a method for forming flexible printed circuit boards. The method includes the following steps: providing a substrate with a copper film formed on at least one surface of the substrate; and forming a number of copper holes in the copper film through a photolithography process. The photolithography process includes a step of coating a liquid photoresist onto the copper film.

Abstract translation: 本发明提供一种形成柔性印刷电路板的方法。 该方法包括以下步骤：在衬底的至少一个表面上提供形成有铜膜的衬底; 并通过光刻工艺在铜膜中形成多个铜孔。 光刻工艺包括将液体光致抗蚀剂涂覆到铜膜上的步骤。

公开(公告)号：US20070039753A1

公开(公告)日：2007-02-22

申请号：US11490312

申请日：2006-07-21

Applicant: Bong-Suck Kim ,  Gye-Soo Kim ,  Jong-Hyung Kim ,  Il-Woon Shin

Inventor： Bong-Suck Kim ,  Gye-Soo Kim ,  Jong-Hyung Kim ,  Il-Woon Shin

IPC: H05K1/03

CPC classification number: H05K3/421 ,  H05K1/115 ,  H05K3/0035 ,  H05K2201/0215 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/025 ,  H05K2203/0554 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49167

Abstract: A built-up printed circuit board includes stacked micro via-holes, each of which is provided for interconnection between layers in the printed circuit board, and in each of which a filling material, such as liquefied resin or conductive paste, is filled using a poly screen of a general screen printing machine.

Abstract translation: 积层印刷电路板包括堆叠的微通孔，每个微通孔被设置用于印刷电路板中的层之间的互连，并且其中每个通孔使用诸如液化树脂或导电浆料填充材料 一般丝网印刷机的多屏。

公开(公告)号：US07178234B2

公开(公告)日：2007-02-20

申请号：US11106642

申请日：2005-04-15

Applicant: Yogo Kawasaki ,  Hiroaki Satake ,  Yutaka Iwata ,  Tetsuya Tanabe

Inventor： Yogo Kawasaki ,  Hiroaki Satake ,  Yutaka Iwata ,  Tetsuya Tanabe

IPC: H01R3/10

CPC classification number: H05K1/113 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15312 ,  H05K3/0055 ,  H05K3/0094 ,  H05K3/3457 ,  H05K3/381 ,  H05K3/382 ,  H05K3/426 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2203/0796 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00 ,  H01L2224/05599

Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.

Abstract translation: 通孔36形成为穿透芯基板30和下层层间树脂绝缘层50，并且通孔66分别形成在通孔36上。 由此，通孔36和通路孔66线性配置，能够缩短布线长度，加速信号传输速度。 此外，由于分别连接到焊料凸块76（导电连接销78）的通孔36和通孔66彼此直接连接，所以确保了良好的连接可靠性。