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59 条记录 (耗时 0.029 秒)

    Stacked package structure and fabrication method thereof
    51.
    发明申请
    Stacked package structure and fabrication method thereof 审中-公开
    堆叠封装结构及其制造方法

    公开(公告)号：US20080283994A1

    公开(公告)日：2008-11-20

    申请号：US12152687

    申请日：2008-05-16

    申请人： Ho-Yi Tsai ,  Chien-Ping Huang ,  Jung-Pin Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

    发明人： Ho-Yi Tsai ,  Chien-Ping Huang ,  Jung-Pin Huang ,  Chin-Huang Chang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/49 ,  H01L21/56

    CPC分类号： H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/1134 ,  H01L2224/1308 ,  H01L2224/1411 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K3/3436 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A stacked package structure and fabrication method thereof are disclosed, including providing a substrate having a plurality of stackable solder pads formed on surface thereof for allowing at least one semiconductor chip to be electrically connected to the substrate; forming an encapsulant for encapsulating the semiconductor chip and further exposing the stackable solder pads from the encapsulant, thus forming a lower-layer semiconductor package; forming conductive bumps on at least one stackable solder pad by means of wire bonding such that at least one upper-layer semiconductor package can be mounted via solder balls on the conductive bumps and the stackable solder pads of the lower-layer semiconductor package to form a stacked package structure, wherein, stacking height of the solder balls and the conductive bumps is greater than height of the encapsulant of the lower-layer semiconductor package, thus, when stacking fine pitch semiconductor packages or when warps occur to the upper-layer semiconductor package or the lower-layer semiconductor package, the conductive bumps can compensate for inadequate height caused by solder ball collapse or fill up gaps between the solder balls and the stackable solder pads caused by warps, thereby allowing the solder balls to be able to effectively contact and wet on the substrate of the lower-layer semiconductor package.

    摘要翻译： 公开了一种堆叠封装结构及其制造方法，包括提供一种具有形成在其表面上的多个可叠置焊料焊盘的衬底，用于允许至少一个半导体芯片电连接到衬底; 形成用于封装半导体芯片的密封剂，并进一步从可密封剂暴露可堆叠的焊盘，从而形成下层半导体封装; 通过引线接合在至少一个可堆叠的焊盘上形成导电凸块，使得至少一个上层半导体封装可以经由焊球安装在导电凸块和下层半导体封装的可堆叠焊盘上，以形成 堆叠的封装结构，其中，焊球和导电凸块的堆叠高度大于下层半导体封装的密封剂的高度，因此，当堆叠精细间距半导体封装时或当上行半导体封装发生翘曲时 或下层半导体封装，导电凸块可以补偿由焊球塌陷引起的不适当的高度，或填充由经线引起的焊球和可堆叠焊盘之间的间隙，从而允许焊球能够有效地接触和 在下层半导体封装的衬底上湿润。

    Heat dissipation semiconductor package
    52.
    发明申请
    Heat dissipation semiconductor package 有权
    散热半导体封装

    公开(公告)号：US20080277777A1

    公开(公告)日：2008-11-13

    申请号：US12151902

    申请日：2008-05-08

    申请人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    发明人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/36

    CPC分类号： H01L23/4334 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

    摘要： A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.

    摘要翻译： 散热半导体封装包括芯片载体，半导体芯片，导热粘合剂，散热构件和密封剂。 半导体芯片倒装芯片安装在芯片载体上，并用导热粘合剂安装区域限定。 热粘合剂安装区域的周边与半导体芯片的边缘间隔开。 散热构件安装在形成在导热粘合剂安装区域中的导热粘合剂上。 形成在芯片载体和散热构件之间的密封剂封装半导体芯片和导热粘合剂，并且嵌入半导体芯片的有源表面和非有源表面和侧边缘的边缘，从而增加密封剂和 半导体芯片。 导热粘合剂和半导体芯片的侧边缘彼此不齐平，从而防止分层的蔓延。

    Method for fabricating semiconductor packages, and structure and method for positioning semiconductor components
    55.
    发明申请
    Method for fabricating semiconductor packages, and structure and method for positioning semiconductor components 审中-公开
    制造半导体封装的方法以及用于定位半导体元件的结构和方法

    公开(公告)号：US20070141761A1

    公开(公告)日：2007-06-21

    申请号：US11703517

    申请日：2007-02-06

    申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/00

    CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A method for fabricating semiconductor packages includes the steps of: providing a plurality of substrates and a carrier having a plurality of openings, wherein, each of the substrates has at least one chip (die) disposed thereon, length and width of the substrates are approximately equal to the predefined length and width of semiconductor packages, and length and width of the openings of the carrier are bigger than length and width of the substrates; respectively positioning the substrates in the openings of the carrier and blocking the gaps between the substrates and the carrier so as to prevent the gaps from penetrating through the carrier; performing a mold press process so as to form an encapsulant on each of the openings for encapsulating the chip, wherein length and width of the area covered by the encapsulant are bigger than length and width of the opening; performing a mold releasing process; and cutting along edges of the substrates according to the predefined length and width of semiconductor packages, thereby obtaining a plurality of semiconductor packages. The present invention also discloses a structure and method for positioning the substrates.

    摘要翻译： 一种制造半导体封装的方法包括以下步骤：提供多个基板和具有多个开口的载体，其中每个基板具有设置在其上的至少一个芯片（芯片），基板的长度和宽度大致为 等于半导体封装的预定长度和宽度，载体的开口的长度和宽度大于基板的长度和宽度; 分别将基板定位在载体的开口中并阻挡基板和载体之间的间隙，以防止间隙穿透载体; 进行模压加工，以在封装芯片的每个开口上形成密封剂，其中由密封剂覆盖的区域的长度和宽度大于开口的长度和宽度; 执行脱模工艺; 并且根据半导体封装的预定长度和宽度切割基板的边缘，从而获得多个半导体封装。 本发明还公开了一种用于定位基板的结构和方法。