公开(公告)号：US07863745B2

公开(公告)日：2011-01-04

申请号：US11595854

申请日：2006-11-13

申请人： Ryuji Nomoto ,  Hirohisa Matsuki

发明人： Ryuji Nomoto ,  Hirohisa Matsuki

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/3114 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/94 ,  H01L2224/0231 ,  H01L2224/0236 ,  H01L2224/024 ,  H01L2224/0401 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/2908 ,  H01L2224/29111 ,  H01L2224/73203 ,  H01L2224/83104 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/1579 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11

摘要： A semiconductor device, including a semiconductor substrate where a plurality of functional elements is formed; and a multilayer interconnection layer provided over the semiconductor substrate, the multilayer interconnection layer including a wiring layer mutually connecting the plural functional elements and including an interlayer insulation layer, wherein a region where the wiring layer is formed is surrounded by a groove forming part, the groove forming part piercing the multilayer interconnection layer; and the groove forming part is filled with an organic insulation material.

摘要翻译： 一种半导体器件，包括其中形成有多个功能元件的半导体衬底; 以及设置在所述半导体衬底上的多层布线层，所述多层布线层包括相互连接所述多个功能元件并且包括层间绝缘层的布线层，其中所述布线层形成的区域被沟槽形成部分包围， 沟槽形成部分刺穿多层互连层; 并且槽形成部分填充有机绝缘材料。

公开(公告)号：US07405137B2

公开(公告)日：2008-07-29

申请号：US11157855

申请日：2005-06-22

申请人： Satoshi Terayama ,  Hirohisa Matsuki

发明人： Satoshi Terayama ,  Hirohisa Matsuki

IPC分类号： H01L21/8258

CPC分类号： H01L21/6836 ,  H01L21/78 ,  H01L23/585 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a manufacturing method of a semiconductor device, a semiconductor substrate having a plurality of semiconductor chips formed on one of principal surfaces of the substrate is cut into the plurality of semiconductor chips through dicing. A first cutting process is formed on one of the principal surfaces of the substrate to produce two cutting grooves between two neighboring ones of the plurality of semiconductor chips, each cutting groove being adjacent to one of the neighboring ones of the plurality of semiconductor chips. A second cutting process is performed on the other of the principal surfaces of the substrate to produce a cutting groove overlapping the two cutting grooves produced by the first cutting process.

摘要翻译： 在半导体器件的制造方法中，通过切割将具有形成在基板的主表面之一上的多个半导体芯片的半导体基板切割成多个半导体芯片。 第一切割工艺形成在基板的一个主表面上，以在多个半导体芯片中的两个相邻的半导体芯片之间产生两个切割槽，每个切割凹槽与多个半导体芯片中的相邻半导体芯片中的一个相邻。 在基板的另一个主表面上执行第二切割工艺，以产生与通过第一切割工艺制造的两个切割槽重叠的切割凹槽。

公开(公告)号：US07112889B1

公开(公告)日：2006-09-26

申请号：US09577932

申请日：2000-05-25

申请人： Shigeyuki Maruyama ,  Yasuyuki Itoh ,  Tetsurou Honda ,  Kazuhiro Tashiro ,  Makoto Haseyama ,  Kenichi Nagashige ,  Yoshiyuki Yoneda ,  Hirohisa Matsuki

发明人： Shigeyuki Maruyama ,  Yasuyuki Itoh ,  Tetsurou Honda ,  Kazuhiro Tashiro ,  Makoto Haseyama ,  Kenichi Nagashige ,  Yoshiyuki Yoneda ,  Hirohisa Matsuki

IPC分类号： H01L23/544

CPC分类号： H01L22/12 ,  G01R31/2891 ,  H01L21/67282 ,  H01L21/6838 ,  H01L22/32 ,  H01L23/544 ,  H01L24/97 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5448 ,  H01L2223/54493 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  Y10T29/49998 ,  Y10T279/11 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor device has an alignment mark which can be recognized by a conventional wafer prober. A redistribution layer connects electrodes of the semiconductor device to electrode pads located in predetermined positions of the redistribution layer. Metal posts configured to be provided with external connection electrodes are formed on the electrode pads of the redistribution layer. A mark member made of the same material as the metal posts is formed on the redistribution layer. The mark member serves as an alignment mark located in a predetermined positional relationship with the metal posts.

公开(公告)号：US07084513B2

公开(公告)日：2006-08-01

申请号：US10860657

申请日：2004-06-04

申请人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

发明人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/02 ,  H01L23/34

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/03

摘要： A semiconductor device includes a first semiconductor chip (5) having a first terminal (7) on one surface, a second semiconductor chip (1a) which is larger than the first semiconductor chip (5) and on which the first semiconductor chip (5) is stacked and which has a second terminal (3) on one surface, an insulating layer (10) formed on a second semiconductor chip (1a) to cover the first semiconductor chip (5), a plurality of holes (10a) formed in the insulating layer (10) on at least a peripheral area of the first semiconductor chip (5), a via (11a) formed like a film on inner peripheral surfaces and bottom surfaces of the holes (10a) and connected electrically to the second terminal (3) of the second semiconductor chip (1a), a wiring pattern (11b) formed on an upper surface of the insulating layer (10), and an external terminal (14) formed on the wiring pattern (11b).

摘要翻译： 半导体器件包括在一个表面上具有第一端子（7）的第一半导体芯片（5），大于第一半导体芯片（5）的第二半导体芯片（1a），并且第一半导体芯片（5） ），并且在一个表面上具有第二端子（3），形成在第二半导体芯片（1a）上以覆盖第一半导体芯片（5）的绝缘层（10），多个孔（10a） 形成在第一半导体芯片（5）的至少周边区域上的绝缘层（10）中，在孔（10a）的内周表面和底表面上形成为类似于膜的通孔（11a），并且电连接 到第二半导体芯片（1a）的第二端子（3），形成在绝缘层（10）的上表面上的布线图案（11b）和形成在布线图案上的外部端子（14） 11 b）。

公开(公告)号：US20050225342A1

公开(公告)日：2005-10-13

申请号：US11147167

申请日：2005-06-08

申请人： Shigeyuki Maruyama ,  Hirohisa Matsuki

发明人： Shigeyuki Maruyama ,  Hirohisa Matsuki

IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R1/073 ,  H01L21/66 ,  H01R11/01 ,  H01R33/76 ,  H01R43/00 ,  H05K3/32 ,  H01L21/302

CPC分类号： G01R1/0408 ,  G01R1/073 ,  H05K3/326 ,  Y10T29/49151 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49217 ,  Y10T29/49218

摘要： A contactor is placed between a semiconductor device and a test board. A contact electrode of the contactor electrically connects the semiconductor device to the test board. The contact electrode is formed of a conductive layer provided on an insulating substrate. The contact electrode comprises a first contact piece which contacts a terminal of the semiconductor device, a second contact piece which contacts an electrode of the test board, and a connecting portion which electrically connects the first contact piece and the second contact piece.

摘要翻译： 接触器放置在半导体器件和测试板之间。 接触器的接触电极将半导体器件电连接到测试板。 接触电极由设置在绝缘基板上的导电层形成。 接触电极包括接触半导体器件的端子的第一接触片，与测试板的电极接触的第二接触片和电连接第一接触片和第二接触片的连接部。

公开(公告)号：US06939142B2

公开(公告)日：2005-09-06

申请号：US09739288

申请日：2000-12-19

申请人： Shigeyuki Maruyama ,  Hirohisa Matsuki

发明人： Shigeyuki Maruyama ,  Hirohisa Matsuki

IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R1/073 ,  H01L21/66 ,  H01R11/01 ,  H01R33/76 ,  H01R43/00 ,  H05K3/32 ,  H01R12/00

CPC分类号： G01R1/0408 ,  G01R1/073 ,  H05K3/326 ,  Y10T29/49151 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49217 ,  Y10T29/49218

摘要： A contactor is placed between a semiconductor device and a test board. A contact electrode of the contactor electrically connects the semiconductor device to the test board. The contact electrode is formed of a conductive layer provided on an insulating substrate. The contact electrode includes a first contact piece which contacts a terminal of the semiconductor device, a second contact piece which contacts an electrode of the test board, and a connecting portion which electrically connects the first contact piece and the second contact piece.

摘要翻译： 接触器放置在半导体器件和测试板之间。 接触器的接触电极将半导体器件电连接到测试板。 接触电极由设置在绝缘基板上的导电层形成。 接触电极包括与半导体器件的端子接触的第一接触片，与测试板的电极接触的第二接触片和将第一接触片和第二接触片电连接的连接部。

公开(公告)号：US06732911B2

公开(公告)日：2004-05-11

申请号：US09970802

申请日：2001-10-05

申请人： Hirohisa Matsuki ,  Hiroyuki Matsui ,  Eiji Yoshida ,  Takao Ohno ,  Koki Otake ,  Akiyo Mizutani ,  Motoshu Miyajima ,  Masataka Mizukoshi ,  Eiji Watanabe

发明人： Hirohisa Matsuki ,  Hiroyuki Matsui ,  Eiji Yoshida ,  Takao Ohno ,  Koki Otake ,  Akiyo Mizutani ,  Motoshu Miyajima ,  Masataka Mizukoshi ,  Eiji Watanabe

IPC分类号： B23K3538

CPC分类号： B23K1/008 ,  B23K2101/36 ,  H05K3/3489

摘要： There is provided a chamber open to the outside through openings through which a solder-adhered object is passed and the chamber having a heating/melting area, a carrying mechanism for carrying the solder-adhered object into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to create a lower pressure area in the heating/melting area as compared to the pressure of outside the chamber, heating means for heating directly or indirectly the solder-adhered object in the heating/melting area, and an air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas. Accordingly, there can be provided a solder jointing system for jointing solder layers of a semiconductor device, an electronic device, or the like to the wirings or the pads, which is capable of having a high processing ability and preventing re-oxidation.

摘要翻译： 设置有通过开口穿过焊料粘附物体的开口的室，并且具有加热/熔化区域的室，用于将焊料粘附物携带到加热/熔融区域中的承载机构， 用于将甲酸供应到加热/熔化区域的酸供应装置，用于从加热/熔化区域及其相邻区域排出气体的排气装置，以在加热/熔化区域中产生较低压力区域， 在室外，用于在加热/熔化区域中直接或间接加热焊接物体的加热装置，以及用于扰乱加热/熔化区域和承载区域之间的气流的气流抑制装置。 因此，可以提供一种用于将半导体器件，电子器件等的焊料层接合到布线或焊盘上的焊接接合系统，其能够具有高处理能力并防止再氧化。

公开(公告)号：US06657282B2

公开(公告)日：2003-12-02

申请号：US10097816

申请日：2002-03-15

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L23544

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06566239B2

公开(公告)日：2003-05-20

申请号：US09867545

申请日：2001-05-31

申请人： Yutaka Makino ,  Eiji Watanabe ,  Hirohisa Matsuki ,  Tetsuya Fujisawa

发明人： Yutaka Makino ,  Eiji Watanabe ,  Hirohisa Matsuki ,  Tetsuya Fujisawa

IPC分类号： H01L2144

CPC分类号： H01L21/288 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/1147 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00014

摘要： A method of manufacturing a semiconductor device is provided. The method includes the steps of forming a wiring layer on an underlying metal film formed on a substrate, the wiring layer being electrically connected to an electrode pad formed on a substrate, removing a part of the wiring layer so as to form a wiring on the substrate, a part of the underlying metal film being exposed other than a part where the wiring is formed, removing the exposed part of the underlying metal film by using the wiring as a mask, forming a barrier metal film on the wiring so as to cover the wiring and the underlying metal film underneath the wiring, forming a post terminal by electroless plating so that the post terminal is electrically connected to said wiring and providing a sealing resin so as to cover said substrate except a position at which said post terminal is formed.

摘要翻译： 提供一种制造半导体器件的方法。 该方法包括以下步骤：在形成在基板上的下面的金属膜上形成布线层，该布线层与形成在基板上的电极焊盘电连接，去除一部分布线层，以形成布线层 基板，除了形成布线的部分之外，一部分下面的金属膜被露出，通过使用布线作为掩模去除下面的金属膜的暴露部分，在布线上形成阻挡金属膜以覆盖 布线和下面的金属膜，通过无电镀形成后端子，使得端子端子与所述布线电连接并提供密封树脂，以便覆盖所述基板，除了形成所述柱端子的位置 。

公开(公告)号：US06472744B2

公开(公告)日：2002-10-29

申请号：US09084097

申请日：1998-05-26

申请人： Mitsutaka Sato ,  Tetsuya Fujisawa ,  Shigeyuki Maruyama ,  Junichi Kasai ,  Toshimi Kawahara ,  Toshio Hamano ,  Yoshihiro Kubota ,  Mitsunada Osawa ,  Yoshiyuki Yoneda ,  Kazuto Tsuji ,  Hirohisa Matsuki

发明人： Mitsutaka Sato ,  Tetsuya Fujisawa ,  Shigeyuki Maruyama ,  Junichi Kasai ,  Toshimi Kawahara ,  Toshio Hamano ,  Yoshihiro Kubota ,  Mitsunada Osawa ,  Yoshiyuki Yoneda ,  Kazuto Tsuji ,  Hirohisa Matsuki

IPC分类号： H01L2500

CPC分类号： H01L25/105 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2924/09701 ,  H01L2924/1533 ,  H01L2924/3025 ,  H01R12/82 ,  H05K7/1431 ,  H01L2924/00

摘要： A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.

摘要翻译： 半导体模块包括多个半导体器件，每个半导体器件包括承载有单个存储器半导体芯片的电路衬底和用于可分离地保持半导体器件的插座。