公开(公告)号：US5675122A

公开(公告)日：1997-10-07

申请号：US492153

申请日：1995-06-19

申请人： Edward A. Taylor

发明人： Edward A. Taylor

IPC分类号： H01L23/047 ,  H01L23/10 ,  H01L23/492 ,  H01J5/32

CPC分类号： H01L23/4928 ,  H01L23/047 ,  H01L23/10 ,  H01L23/4922 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/09701

摘要： Apparatus for hermetically sealing materials that cannot be satisfactorily sealed directly to one another using conventional techniques are disclosed. A laminar sheet material having adjacent bonded dissimilar metallic layers is interposed between elements being sealed. One of the metallic layers bonds metallurgically to one of the elements, while the other metallic layer is hermetically sealed to the other element using conventional techniques such as welding. The apparatus of the present invention are especially suitable for hermetically sealing metal matrix composite electronics packages.

摘要翻译： 公开了用常规技术密封材料不能令人满意地彼此直接密封的装置。 具有相邻接合的异种金属层的层状片材被插入被密封的元件之间。 金属层中的一个金属结合到一个元件上，而另一个金属层使用诸如焊接的常规技术与另一个元件气密密封。 本发明的装置特别适用于密封金属基复合电子封装。

公开(公告)号：US5437921A

公开(公告)日：1995-08-01

申请号：US773818

申请日：1991-10-09

申请人： Yasuo Kogo ,  Takefumi Ito ,  Mitsuhiro Okumura ,  Kiyoshi Yoshizaki ,  Takeji Fujihara ,  Hirofumi Yamashita

发明人： Yasuo Kogo ,  Takefumi Ito ,  Mitsuhiro Okumura ,  Kiyoshi Yoshizaki ,  Takeji Fujihara ,  Hirofumi Yamashita

IPC分类号： C22C49/00 ,  C22C47/00 ,  C22C49/06 ,  C22C49/14 ,  H01L23/14 ,  H01L23/373 ,  H01L23/492 ,  H05K1/05 ,  B32B5/06

CPC分类号： H01L24/29 ,  C22C49/14 ,  H01L23/3733 ,  H01L23/4922 ,  H01L2224/29298 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01094 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/10253 ,  H01L2924/351 ,  H05K1/05 ,  Y10T442/624 ,  Y10T442/654

摘要： A base material for mounting electronic components is provided which has a low density and a coefficient of thermal expansion close to that of aluminum and can be processed with ease. The base material essentially consists of aluminum or an aluminum alloy reinforced with carbon fibers with a volume fraction ranging from 0.15 to 0.55, the carbon fibers in the base material being arranged at random on a surface for mounting an electronic component and being arranged in layer in a direction vertical to the above-described surface.

摘要翻译： 提供了一种用于安装电子部件的基材，其具有接近于铝的低密度和热膨胀系数，并且可以容易地加工。 基体材料基本上由铝或铝合金组成，其体积分数为0.15-0.55的碳纤维增强，基材中的碳纤维被随机地布置在用于安装电子部件的表面上并且被布置在 垂直于上述表面的方向。

公开(公告)号：US5433260A

公开(公告)日：1995-07-18

申请号：US253240

申请日：1994-06-02

申请人： Edward A. Taylor

发明人： Edward A. Taylor

IPC分类号： H01L23/047 ,  H01L23/10 ,  H01L23/492 ,  B22D19/14 ,  B22D19/04

CPC分类号： H01L23/4928 ,  H01L23/047 ,  H01L23/10 ,  H01L23/4922 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/09701

摘要： Apparatus and methods for hermetically sealing materials that cannot be satisfactorily sealed directly to one another using conventional techniques are disclosed. A laminar sheet material having adjacent bonded dissimilar metallic layers is interposed between elements being sealed. One of the metallic layers bonds metallurgically to one of the elements, while the other metallic layer is hermetically sealed to the other element using conventional techniques such as welding. The methods and apparatus of the present inventions are especially suitable for hermetically sealing metal matrix composite electronics packages.

摘要翻译： 公开了使用常规技术密封不能令人满意地彼此密封的材料的装置和方法。 具有相邻接合的异种金属层的层状片材被插入被密封的元件之间。 金属层中的一个金属结合到一个元件上，而另一个金属层使用诸如焊接的常规技术与另一个元件气密密封。 本发明的方法和装置特别适用于气密密封金属基复合电子封装。

公开(公告)号：US4574299A

公开(公告)日：1986-03-04

申请号：US540739

申请日：1983-10-11

申请人： Homer H. Glascock, II ,  Constantine A. Neugebauer ,  Harold F. Webster

发明人： Homer H. Glascock, II ,  Constantine A. Neugebauer ,  Harold F. Webster

IPC分类号： H01L23/492 ,  H01L25/07 ,  H01H23/14

CPC分类号： H01L23/4922 ,  H01L25/072 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/1301 ,  H01L2924/207 ,  H01L2924/3011

摘要： A thyristor packaging system utilizes structured metal, strain buffers to provide paths of high electrical and thermal conductivity from the anode and cathode of a thyristor to power conductors connected to the anode and the cathode, such strain buffers each comprising a bundle of substantially parallel, closely packed strands of metal wire.

摘要翻译： 晶闸管封装系统利用结构化金属应变缓冲器来提供从晶闸管的阳极和阴极到连接到阳极和阴极的电力的导电的高电导和导热的路径，这些应变缓冲器各自包括基本上平行的紧密的 金属线的绞合线。

公开(公告)号：US11948859B2

公开(公告)日：2024-04-02

申请号：US17424695

申请日：2019-12-05

申请人： TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION

发明人： Takayuki Furuya ,  Akira Kagami

IPC分类号： H01L23/473 ,  H01L23/492 ,  H01L25/07

CPC分类号： H01L23/473 ,  H01L23/4922 ,  H01L25/071

摘要： An element module includes a cooler, a plurality of elements, and a conductive member. The cooler includes a first element disposition portion and a second element disposition portion which are provided on both sides in a predetermined direction. The plurality of elements are disposed in each of the first element disposition portion and the second element disposition portion. The conductive member is disposed in a space portion of the cooler. The space portion penetrates the cooler between the plurality of elements in each of the first element disposition portion and the second element disposition portion. The space portion allows the first element disposition portion and the second element disposition portion to communicate with each other. The conductive member is connected to the element of the first element disposition portion and the element of the second element disposition portion.

公开(公告)号：US11646249B2

公开(公告)日：2023-05-09

申请号：US17136299

申请日：2020-12-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Yong Liu ,  Qing Yang

IPC分类号： H01L23/492 ,  H01L23/00 ,  H01L23/373 ,  H01L23/31

CPC分类号： H01L23/4922 ,  H01L23/3735 ,  H01L24/32 ,  H01L24/48 ,  H01L23/3107 ,  H01L2224/32258 ,  H01L2224/48245

摘要： A dual-side cooling (DSC) semiconductor package includes a first metal-insulator-metal (MIM) substrate having a first insulator layer, first metallic layer, and second metallic layer. A second MIM substrate includes a second insulator layer, third metallic layer, and fourth metallic layer. The third metallic layer includes a first portion having a first contact area and a second portion, electrically isolated from the first portion, having a second contact area. A semiconductor die is coupled with the second metallic layer and is directly coupled with the third metallic layer through one or more solders, sintered layers, electrically conductive tapes, solderable top metal (STM) layers, and/or under bump metal (UBM) layers. The first contact area is electrically coupled with a first electrical contact of the die and the second contact area is electrically coupled with a second electrical contact of the die. The first and fourth metallic layers are exposed through an encapsulant.

公开(公告)号：US20180247882A1

公开(公告)日：2018-08-30

申请号：US15964342

申请日：2018-04-27

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jung-woo Kim ,  Jae-min Jung ,  Ji-yong Park ,  Jeong-kyu Ha ,  Woon-bae Kim

IPC分类号： H01L23/498 ,  H01L23/29 ,  H01L23/00 ,  H01L33/62 ,  H01L23/488 ,  H01L33/48

CPC分类号： H01L23/4985 ,  H01L23/29 ,  H01L23/488 ,  H01L23/4922 ,  H01L24/29 ,  H01L24/32 ,  H01L25/167 ,  H01L33/48 ,  H01L33/62 ,  H01L2924/143 ,  H01L2924/186

摘要： Provided are a chip-on-film (COF) semiconductor package capable of improving connection characteristics and a display apparatus including the package. The COF semiconductor package includes a film substrate, a conductive interconnection located on at least one surface of the film substrate and an output pin connected to the conductive interconnection and located at one edge on a first surface of the film substrate, a semiconductor chip connected to the conductive interconnection and mounted on the first surface of the film substrate, a solder resist layer on the first surface of the film substrate to cover at least a portion of the conductive interconnection, and at least one barrier dam on the solder resist layer between the semiconductor chip and the output pin.

公开(公告)号：US20180158757A1

公开(公告)日：2018-06-07

申请号：US15578867

申请日：2016-05-23

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Hubert Baueregger ,  Volkmar Sommer ,  Stefan Stegmeier

IPC分类号： H01L23/49 ,  H01L23/50 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00 ,  C25D3/38 ,  C25D5/18 ,  C25D21/14 ,  H05K3/42

CPC分类号： H01L23/49 ,  C25D3/38 ,  C25D5/18 ,  C25D21/14 ,  H01L23/3733 ,  H01L23/3735 ,  H01L23/4922 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49811 ,  H01L23/50 ,  H01L24/05 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/75 ,  H01L24/77 ,  H01L24/82 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/24105 ,  H01L2224/24227 ,  H01L2224/24245 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29155 ,  H01L2224/3207 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/37005 ,  H01L2224/37111 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/37166 ,  H01L2224/3719 ,  H01L2224/37211 ,  H01L2224/37224 ,  H01L2224/37239 ,  H01L2224/37244 ,  H01L2224/37247 ,  H01L2224/37255 ,  H01L2224/37266 ,  H01L2224/3729 ,  H01L2224/373 ,  H01L2224/37395 ,  H01L2224/376 ,  H01L2224/4007 ,  H01L2224/40227 ,  H01L2224/40499 ,  H01L2224/756 ,  H01L2224/75703 ,  H01L2224/776 ,  H01L2224/77703 ,  H01L2224/821 ,  H01L2224/82101 ,  H01L2224/83007 ,  H01L2224/831 ,  H01L2224/834 ,  H01L2224/83411 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/83466 ,  H01L2224/8349 ,  H01L2224/83511 ,  H01L2224/83524 ,  H01L2224/83539 ,  H01L2224/83544 ,  H01L2224/83547 ,  H01L2224/83555 ,  H01L2224/83566 ,  H01L2224/8359 ,  H01L2224/836 ,  H01L2224/83695 ,  H01L2224/8385 ,  H01L2224/83907 ,  H01L2224/84007 ,  H01L2224/841 ,  H01L2224/8485 ,  H01L2224/8492 ,  H01L2224/84951 ,  H01L2224/9201 ,  H01L2224/9205 ,  H01L2224/9221 ,  H01L2224/97 ,  H01L2924/13055 ,  H01L2924/181 ,  H05K3/424 ,  H01L2924/00012 ,  H05K3/4661 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/0105 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2224/82 ,  H01L2924/01014

摘要： The invention relates to a method for electrically contacting a component (10) (for example a power component and/or a (semiconductor) component having at least one transistor, preferably an IGBT (insulated-gate bipolar transistor)) having at least one contact (40, 50), at least one open-pored contact piece (60, 70) is galvanically (electrochemically or free of external current) connected to at least one contact (40, 50). In this way, a component module is achieved. The contact (40, 50) is preferably a flat part or has a contact surface, the largest planar extent thereof being greater than an extension of the contact (40, 50) perpendicular to said contact surface. The temperature of the galvanic connection is at most 100° C., preferably at most 60° C., advantageously at most 20° C. and ideally at most 5° C. and/or deviates from the operating temperature of the component by at most 50° C., preferably by at most 20° C., in particular by at most 10° C. and ideally by at most 5° C., preferably by at most 2° C. The component (10) can be contacted by means of the contact piece (60, 70) with a further component, a current conductor and/or a substrate (90). Preferably, a component (10) having two contacts (40, 50) on opposite sides of the component (10) is used, wherein at least one open-pored contact piece (60, 70) is galvanically connected to each contact (40, 50).

公开(公告)号：US20170287814A1

公开(公告)日：2017-10-05

申请号：US15479856

申请日：2017-04-05

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Jung-woo KIM ,  Jae-min JUNG ,  Ji-yong PARK ,  Jeong-kyu HA ,  Woon-bae KIM

IPC分类号： H01L23/498 ,  H01L23/29 ,  H01L23/00

CPC分类号： H01L23/4985 ,  H01L23/29 ,  H01L23/488 ,  H01L23/4922 ,  H01L24/29 ,  H01L24/32 ,  H01L25/167 ,  H01L33/48 ,  H01L33/62 ,  H01L2924/143 ,  H01L2924/186

摘要： Provided are a chip-on-film (COF) semiconductor package capable of improving connection characteristics and a display apparatus including the package. The COF semiconductor package includes a film substrate, a conductive interconnection located on at least one surface of the film substrate and an output pin connected to the conductive interconnection and located at one edge on a first surface of the film substrate, a semiconductor chip connected to the conductive interconnection and mounted on the first surface of the film substrate, a solder resist layer on the first surface of the film substrate to cover at least a portion of the conductive interconnection, and at least one barrier dam on the solder resist layer between the semiconductor chip and the output pin.

公开(公告)号：US20160111181A1

公开(公告)日：2016-04-21

申请号：US14733281

申请日：2015-06-08

申请人： SAMSUNG DISPLAY CO., LTD.

发明人： Sein CHANG

IPC分类号： H01B1/22 ,  H01L23/00

CPC分类号： H01B1/22 ,  H01L23/3733 ,  H01L23/4922 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2908 ,  H01L2224/29111 ,  H01L2224/29113 ,  H01L2224/29118 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01026 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01032 ,  H01L2924/0132 ,  H01L2924/06 ,  H01L2924/069 ,  H01L2924/1426 ,  H01L2924/2064

摘要： An anisotropic electroconductive particle including a first insulating layer, a first conductive layer disposed on the first insulating layer, and a second insulating layer disposed on the first conductive layer.

摘要翻译： 包括第一绝缘层，设置在第一绝缘层上的第一导电层和设置在第一导电层上的第二绝缘层的各向异性导电颗粒。