公开(公告)号：US06759596B1

公开(公告)日：2004-07-06

申请号：US09569553

申请日：2000-05-12

Applicant: James G. Shelnut ,  Charles R. Shipley ,  Robert L. Goldberg

Inventor： James G. Shelnut ,  Charles R. Shipley ,  Robert L. Goldberg

IPC: H05K103

CPC classification number: H05K1/0271 ,  H05K3/205 ,  H05K3/421 ,  H05K3/465 ,  H05K3/4682 ,  H05K2201/09781 ,  H05K2201/2009 ,  H05K2203/0152 ,  H05K2203/0733 ,  Y10T29/4913 ,  Y10T29/49156

Abstract: The invention provides multilayer circuit boards and methods for formation of a sequential build circuit board. Among other things, glass fiber reinforced copper clad epoxy substrates, required to provide strength or rigidity to prior boards, are not required for preferred circuit boards of the invention. Preferred methods of the invention include applying a dielectric coating onto a support; forming recesses in the dielectric coating that define openings including opening for at least one reinforcing member; depositing copper metal into the recesses to form a first layer; applying a second dielectric coating onto the first circuit layer; forming recesses in the second dielectric coating that define openings including openings for at least one reinforcing member in registration with the one or more reinforcing members in the first layer; depositing metal into the recesses in the dielectric coating to form the second layer; and repeating the process to form sequential build board having the desired number of layers.

Abstract translation: 本发明提供了用于形成顺序构建电路板的多层电路板和方法。 除了其它方面，对于本发明的优选电路板，不需要为现有板提供强度或刚性所需的玻璃纤维增​​强铜包覆环氧树脂基板。 本发明的优选方法包括将介电涂层施加到载体上; 在所述电介质涂层中形成限定开口的凹部，所述开口包括用于至少一个加强构件的开口; 将铜金属沉积到所述凹部中以形成第一层; 将第二电介质涂层施加到所述第一电路层上; 在所述第二电介质涂层中形成限定开口的凹部，所述开口包括用于与所述第一层中的所述一个或多个加强构件对准的至少一个加强构件的开口; 将金属沉积到介电涂层中的凹槽中以形成第二层; 并重复该过程以形成具有所需数量层的顺序构建板。

公开(公告)号：US06731004B2

公开(公告)日：2004-05-04

申请号：US09734412

申请日：2000-12-11

Applicant: Kazuto Saitoh

Inventor： Kazuto Saitoh

IPC: H01L2348

CPC classification number: H01L21/486 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05548 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K1/113 ,  H05K3/0023 ,  H05K3/045 ,  H05K3/465 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/096 ,  H05K2203/0353 ,  H05K2203/0723 ,  Y10T29/49128 ,  Y10T29/49156 ,  H01L2924/00

Abstract: An electronic device and method of making same wherein the device includes a substrate (e.g., a printed wiring board or semiconductor chip) having a circuit thereon, a first non-photosensitive layer (e.g., polyimide resin) positioned on the substrate and over the substrate's circuit, a second, photosensitive layer (e.g., epoxy resin) positioned on the first layer, and an electrically conductive layer positioned on the first, non-photosensitive layer and electrically coupled to the circuit through a hole in the first layer.

Abstract translation: 一种电子器件及其制造方法，其中该器件包括其上具有电路的衬底（例如，印刷线路板或半导体芯片），位于衬底上并位于衬底上的第一非感光层（例如，聚酰亚胺树脂） 电路，第二感光层（例如，环氧树脂），以及定位在第一非感光层上的导电层，并通过第一层中的一个孔电耦合到电路。

公开(公告)号：US20020142092A1

公开(公告)日：2002-10-03

申请号：US09817963

申请日：2001-03-27

Inventor： Klaus Lowack ,  Gunter Schmid ,  Recai Sezi

IPC: B05D005/12

CPC classification number: C23C18/30 ,  C23C18/1608 ,  H05K3/184 ,  H05K3/465 ,  H05K3/4661

Abstract: The invention relates to a process for the metallization of an insulator and/or a dielectric, wherein the insulator is firstly activated, it is subsequently coated with another insulator and the latter is patterned, then the first is seeded and lastly metallized.

Abstract translation: 本发明涉及一种用于金属化绝缘体和/或电介质的方法，其中绝缘体首先被活化，随后被另一个绝缘体涂覆，并且后者被图案化，然后将第一种子接种并最后金属化。

公开(公告)号：US20020125612A1

公开(公告)日：2002-09-12

申请号：US09914585

申请日：2001-08-29

Inventor： Reiner Gotzen

IPC: B29C070/88

CPC classification number: H05K3/0023 ,  B29C64/135 ,  B29L2011/0075 ,  B29L2031/3061 ,  G03F7/0035 ,  H05K1/0272 ,  H05K1/095 ,  H05K3/02 ,  H05K3/465 ,  H05K3/4664 ,  H05K3/4697 ,  H05K2203/0568

Abstract: The invention relates to a method for production of three-dimensionally arranged conducting and connecting structures for volumetric and energy flows. Various light-setting materials are used for the production of the layers. Upon exchanging the materials, those layer regions in which no setting occurred during the preceding setting process, are also filled with new material, such that, in the subsequent setting process, not only is the upper layer linked to the one lying directly beneath it, but also material of the upper layer is connected to the material of a layer lying below the penultimate layer. It is thus possible, within the layer sequence, to connect a structure with varying properties from layer to layer.

Abstract translation: 本发明涉及用于生产用于体积和能量流动的三维布置的导电和连接结构的方法。 使用各种光固化材料来生产层。 在更换材料时，在前一设定过程中没有发生设置的那些层区域也被填充新材料，使得在随后的设定过程中，不仅上层与直接位于其下的一层连接， 而且上层的材料也连接到位于倒数第二层之下的层的材料。 因此，在层序列内可以将具有不同性质的结构从层到层连接起来。

公开(公告)号：US06274821B1

公开(公告)日：2001-08-14

申请号：US09396426

申请日：1999-09-15

Applicant: Masashi Echigo ,  Kaoru Nomoto ,  Masayuki Aoyama ,  Tadao Suzuki

Inventor： Masashi Echigo ,  Kaoru Nomoto ,  Masayuki Aoyama ,  Tadao Suzuki

IPC: H05K103

CPC classification number: H05K3/465 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H05K1/0271 ,  H05K1/113 ,  H05K3/28 ,  H05K3/285 ,  H05K3/4644 ,  H05K3/4676 ,  H05K3/4688 ,  H05K2201/0133 ,  Y10S428/901 ,  H01L2924/00

Abstract: A printed circuit board has a layer including a resin material, which has a tensile breaking strain of approximately 1% or more at a tensile strain rate of 40%/sec at 25° C., and an Izod impact strength of approximately 1 kgf·cm/cm or more at 25° C. Otherwise, the resin material has a peak value of dynamic loss tangent of 0.05 or more in a range of −100° C. to −50° C. by &bgr; relaxation, and a peak value of dynamic loss tangent of 0.02 or more in a range of 0° C. to 100° C. by &bgr;′ relaxation in a dynamic viscoelasticity spectral measurement. Accordingly, thermal shock resistance and drop shock resistance of the printed circuit board can be improved.

Abstract translation: 印刷电路板具有包括树脂材料的层，其在25℃的拉伸应变速率为40％/秒，拉伸断裂应变为约1％以上，艾佐德冲击强度为约1kgf。 cm 2以上，另外，通过β弛豫，树脂材料在-100℃〜-50℃的范围内具有0.05以上的动态损耗角正切峰值，峰值 在动态粘弹性光谱测量中通过β'松弛在0℃至100℃的范围内的0.02或更大的动态损耗角正切。 因此，可以提高印刷电路板的耐热冲击性和耐跌落冲击性。

公开(公告)号：US5891513A

公开(公告)日：1999-04-06

申请号：US587262

申请日：1996-01-16

Applicant: Valery M. Dubin ,  Yosef Shacham-Diamand ,  Chiu H. Ting ,  Bin Zhao ,  Prahalad K. Vasudev

Inventor： Valery M. Dubin ,  Yosef Shacham-Diamand ,  Chiu H. Ting ,  Bin Zhao ,  Prahalad K. Vasudev

IPC: C23C18/16 ,  H01L21/288 ,  H01L21/768 ,  H01L23/532 ,  H05K3/04 ,  H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  B05D5/12

CPC classification number: H01L21/76843 ,  C23C18/1603 ,  C23C18/1651 ,  C23C18/1689 ,  C23C18/1831 ,  C23C18/1879 ,  C23C18/54 ,  H01L21/288 ,  H01L21/76807 ,  H01L21/76874 ,  H01L21/76877 ,  H01L23/53238 ,  H05K3/388 ,  H05K3/465 ,  H01L2924/0002 ,  H05K2201/09563 ,  H05K2203/072 ,  H05K2203/0733 ,  H05K3/045 ,  H05K3/422 ,  H05K3/4661 ,  Y10S977/892

Abstract: A method of utilizing electroless copper deposition to form interconnects on a semiconductor wafer. Once a via or a trench is formed in a dielectric layer, a titanium nitride (TiN) or tantalum (Ta) barrier layer is blanket deposited. Then, a contact displacement technique is used to form a thin activation seed layer of copper on the barrier layer. An electroless deposition technique is then used to auto-catalytically deposit copper on the activated barrier layer. The electroless copper deposition continues until the via/trench is filled. Subsequently, the surface is polished by an application of chemical-mechanical polishing (CMP) to remove excess copper and barrier material from the surface, so that the only copper and barrier material remaining are in the via/trench openings. Then an overlying silicon nitride (SiN) layer is formed above the exposed copper in order to form a dielectric barrier layer. The copper interconnect is fully encapsulated from the adjacent material by the TiN (or Ta) and the SiN layers.

Abstract translation: 一种利用无电铜沉积在半导体晶片上形成互连的方法。 一旦在电介质层中形成通孔或沟槽，则氮化钛（TiN）或钽（Ta）阻挡层被覆盖沉积。 然后，使用接触位移技术在阻挡层上形成铜的薄的活化种子层。 然后使用无电沉积技术在活化的阻挡层上自动催化沉积铜。 继续进行化学镀铜沉积，直到通孔/沟槽被填充。 随后，通过施加化学机械抛光（CMP）来抛光表面以从表面去除多余的铜和阻挡材料，使得剩余的唯一的铜和阻挡材料在通孔/沟槽开口中。 然后，在暴露的铜上方形成覆盖氮化硅（SiN）层，以形成电介质阻挡层。 铜互连通过TiN（或Ta）和SiN层从相邻材料完全封装。

公开(公告)号：US5830563A

公开(公告)日：1998-11-03

申请号：US752798

申请日：1996-11-20

Applicant: Tadanori Shimoto ,  Yoshitsugu Funada ,  Koji Matsui ,  Yuzo Shimada ,  Kazuaki Utsumi

Inventor： Tadanori Shimoto ,  Yoshitsugu Funada ,  Koji Matsui ,  Yuzo Shimada ,  Kazuaki Utsumi

IPC: H05K1/00 ,  H05K3/00 ,  H05K3/18 ,  H05K3/46 ,  B32B3/00

CPC classification number: H05K3/4661 ,  H05K3/465 ,  H05K2201/0195 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/3154

Abstract: This invention relates to an interconnection structure comprising one or more insulating films and one or more layers of conductor electrode patterns, wherein at least one of the insulating films consists of a fluorene skeleton-containing epoxy acrylate resin, and to a method of making a multilayer interconnection structure including the steps of roughening the surface of an insulating resin layer and forming a conductor thereon by electroless plating, wherein the average roughness (Ra), maximum roughness (Ry) and conductor thickness (T) of the roughened surface of the insulating resin layer satisfy the following relations: 0.2.ltoreq.Ra.ltoreq.0.6 (unit: .mu.m) (1) 0.02.ltoreq.Ra/T.ltoreq.0.2 (2) 0.05.ltoreq.Ry/T.ltoreq.0.5 (3) and catalyst nuclei for electroless plating are supplied by applying a solution of a metallic salt to the roughened surface of the insulating resin layer or dipping the substrate in a solution of a metallic salt, drying and heat-treating the substrate, and then subjecting it to displacement palladium plating.

Abstract translation: 本发明涉及一种互连结构，其包括一个或多个绝缘膜和一层或多层导体电极图案，其中绝缘膜中的至少一层由含芴骨架的环氧丙烯酸酯树脂组成，以及制备多层 互连结构，包括通过无电解电镀使绝缘树脂层的表面粗糙化并在其上形成导体的步骤，其中绝缘树脂的粗糙表面的平均粗糙度（Ra），最大粗糙度（Ry）和导体厚度（T） 层满足以下关系：0.2

公开(公告)号：US5589255A

公开(公告)日：1996-12-31

申请号：US253582

申请日：1994-06-03

Applicant: Ryo Enomoto ,  Motoo Asai

Inventor： Ryo Enomoto ,  Motoo Asai

IPC: C23C18/20 ,  H05K1/03 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  C09J7/02

CPC classification number: H05K3/4661 ,  C23C18/208 ,  C23C18/24 ,  C23C18/30 ,  H05K1/0373 ,  C23C18/1651 ,  H05K2201/0154 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/09563 ,  H05K2203/0773 ,  H05K2203/0796 ,  H05K2203/107 ,  H05K3/0017 ,  H05K3/0035 ,  H05K3/181 ,  H05K3/184 ,  H05K3/426 ,  H05K3/465 ,  Y10T428/2857 ,  Y10T442/2738

Abstract: An adhesive for electroless plating is formed by dispersing particular heat-resistant granules easily soluble in an oxidizing agent into a particular heat-resistant resin sparingly soluble in the oxidizing agent through a curing treatment. A printed circuit board is manufactured by using such an adhesive.

Abstract translation: 用于化学镀的粘合剂通过将易溶于氧化剂的特定耐热颗粒通过固化处理分散到特别耐溶于氧化剂的耐热树脂中而形成。 通过使用这种粘合剂制造印刷电路板。

公开(公告)号：US5485038A

公开(公告)日：1996-01-16

申请号：US305492

申请日：1994-09-12

Applicant: James J. Licari ,  Deborah J. Smith

Inventor： James J. Licari ,  Deborah J. Smith

IPC: H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  H01L23/48

CPC classification number: H05K3/4661 ,  H01L21/481 ,  H01L21/4846 ,  H01L23/49894 ,  H01L23/538 ,  H05K3/422 ,  H05K3/4605 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K2201/0236 ,  H05K2201/096 ,  H05K2203/0733 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/465

Abstract: A High-Density-Multi-Chip (HDMI) substrate structure (10) includes alternating conductor metallization (24,28,36,54,56) and insulating dielectric layers (14,38). The dielectric layers (14,38) are formed by curtain coating of ultraviolet photoimageable epoxy material, and the metallization (24,28,36,54,56) is formed by electroless plating or sputtering of copper. The dielectric layers (14,38) are photoimaged and developed to form via holes (16,40,44), and vias (18,42,46) are formed in the holes (16,40,44) by electroless copper plating. The metallization (24,28,36,54,56) can be formed in the same manner as the dielectric layers (14,38), or can alternatively be formed by subtractive photolithography using photoresist masks.

Abstract translation: 高密度多芯片（HDMI）衬底结构（10）包括交替的导体金属化（24,28,36,54,56）和绝缘电介质层（14,38）。 电介质层（14,38）通过紫外可光成像环氧树脂材料的帘式涂布形成，金属化（24,28,36,54,56）通过铜的无电镀或溅射形成。 电介质层（14,38）被光刻和显影以形成通孔（16,40,44），并且通过无电镀铜在孔（16,40,44）中形成通孔（18,42,46）。 金属化（24,28,36,54,56）可以以与电介质层（14,38）相同的方式形成，或者可以通过使用光致抗蚀剂掩模的减色法来形成。

公开(公告)号：US5380560A

公开(公告)日：1995-01-10

申请号：US921186

申请日：1992-07-28

Applicant: Suryanarayana Kaja ,  Shyama P. Mukherjee ,  Eugene J. O'Sullivan ,  Milan Paunovic

Inventor： Suryanarayana Kaja ,  Shyama P. Mukherjee ,  Eugene J. O'Sullivan ,  Milan Paunovic

IPC: C23C18/16 ,  C23C18/30 ,  H05K3/24 ,  C23C26/00

CPC classification number: H05K3/465 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1635 ,  C23C18/1637 ,  C23C18/30 ,  C23C18/32 ,  H05K3/244 ,  H05K2201/0154 ,  H05K2201/0761 ,  H05K2203/0716 ,  H05K2203/072 ,  H05K2203/0766 ,  H05K3/384 ,  H05K3/388

Abstract: A method of selectively seeding or activating metal interconnections patterned on polyimide dielectric surfaces using an aqueous solution of palladium sulfate, palladium perchlorate, palladium trifluoromethane sulfonate, palladium nitrate or other palladium salts having poorly coordinating counter ions. This strongly selective seeding and the corresponding ability to reliably remove all traces of the seeding material from the polyimide surface eliminates shorting, bridging and reduction of breakdown voltage during electroless plating of a thin layer of nickel or cobalt.

Abstract translation: 使用硫酸钯，高氯酸钯，三氟甲烷磺酸钯，硝酸钯或具有配位不良的抗衡离子的其它钯盐的水溶液选择性地接种或活化在聚酰亚胺电介质表面上形成的金属互连的方法。 这种强选择性接种和相应的能够从聚酰亚胺表面可靠地除去接种材料的痕迹消除了在镍或钴的薄层的化学镀期间短路，桥接和降低击穿电压。