公开(公告)号：US20070001163A1

公开(公告)日：2007-01-04

申请号：US11174035

申请日：2005-07-01

Applicant: Jong-Jan Lee ,  Sheng Hsu ,  Jer-Shen Maa ,  Douglas Tweet

Inventor： Jong-Jan Lee ,  Sheng Hsu ,  Jer-Shen Maa ,  Douglas Tweet

IPC: H01L31/00

CPC classification number: H01L31/1136 ,  H01L31/028 ,  H01L31/1808 ,  Y02E10/547

Abstract: A floating body germanium (Ge) phototransistor and associated fabrication process are presented. The method includes: providing a silicon (Si) substrate; selectively forming an insulator layer overlying the Si substrate; forming an epitaxial Ge layer overlying the insulator layer using a liquid phase epitaxy (LPE) process; forming a channel region in the Ge layer; forming a gate dielectric, gate electrode, and gate spacers overlying the channel region; and, forming source/drain regions in the Ge layer. The LPE process involves encapsulating the Ge with materials having a melting temperature greater than a first temperature, and melting the Ge using a temperature lower than the first temperature. The LPE process includes: forming a dielectric layer overlying deposited Ge; melting the Ge; and, in response to cooling the Ge, laterally propagating an epitaxial growth front into the Ge from an underlying Si substrate surface.

Abstract translation: 提出了一种浮体锗（Ge）光电晶体管及其制造工艺。 该方法包括：提供硅（Si）衬底; 选择性地形成覆盖Si衬底的绝缘体层; 使用液相外延（LPE）工艺形成覆盖绝缘体层的外延Ge层; 在Ge层中形成沟道区; 形成覆盖所述沟道区的栅极电介质，栅电极和栅极间隔; 并且在Ge层中形成源/漏区。 LPE工艺包括用具有大于第一温度的熔化温度的材料包封Ge，并且使用低于第一温度的温度来熔化Ge。 LPE工艺包括：形成覆盖沉积Ge的介电层; 融化Ge; 并且响应于冷却Ge，将外延生长前沿从下面的Si衬底表面横向传播到Ge中。

公开(公告)号：US20060207651A1

公开(公告)日：2006-09-21

申请号：US11340171

申请日：2006-01-26

Applicant: Niels Posthuma ,  Giovanni Flamand ,  Jef Poortmans ,  Johan van der Heide

Inventor： Niels Posthuma ,  Giovanni Flamand ,  Jef Poortmans ,  Johan van der Heide

IPC: H01L31/00

CPC classification number: H01L31/022425 ,  H01L31/02161 ,  H01L31/02167 ,  H01L31/028 ,  H01L31/056 ,  H01L31/068 ,  H01L31/1808 ,  H01L31/1868 ,  Y02E10/52 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method is disclosed for passivating and contacting a surface of a germanium substrate. A passivation layer of amorphous silicon material is formed on the germanium surface. A contact layer of metal, e.g., aluminum, is then formed on the passivation layer. The structure is heated so that the germanium surface makes contact with the contact layer. The aluminum contact layer can be configured for use as a mirroring surface for the back surface of the device. Thus, a passivated germanium surface is disclosed, as well as a solar cell comprising such a structure.

Abstract translation: 公开了一种钝化和接触锗衬底的表面的方法。 在锗表面上形成非晶硅材料的钝化层。 然后在钝化层上形成金属例如铝的接触层。 该结构被加热使得锗表面与接触层接触。 铝接触层可以被配置为用作装置背面的镜面。 因此，公开了钝化的锗表面，以及包括这种结构的太阳能电池。

公开(公告)号：US4159354A

公开(公告)日：1979-06-26

申请号：US741012

申请日：1976-11-11

Applicant: Arthur G. Milnes ,  Donald L. Feucht

Inventor： Arthur G. Milnes ,  Donald L. Feucht

IPC: H01L31/04 ,  B32B43/00 ,  C30B25/18 ,  C30B29/60 ,  H01L21/365 ,  H01L31/06 ,  H01L31/10 ,  H01L31/18

CPC classification number: B32B43/00 ,  C30B25/18 ,  H01L31/1804 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/1828 ,  H01L31/184 ,  Y02E10/543 ,  Y02E10/544 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S117/915 ,  Y10S148/051 ,  Y10S148/063 ,  Y10S148/067 ,  Y10S148/072 ,  Y10S148/12 ,  Y10S148/135 ,  Y10S148/15

Abstract: Thin semiconductor films of compounds from groups III-V of the periodic table suitable for solar cells are formed on low cost substrates by forming on the substrate an intermediate film that is chemically related to but has a lower melting point than the desired semiconductor. The desired semiconductor film is then grown on this intermediate film while it is in a molten condition. The molten intermediate layer isolates the substrate from the desired semiconductor layer so that as that layer grows, large area crystals result. The intermediate film may be a semiconductor III-V compound or may be a group III metal alloy.

Abstract translation: 适用于太阳能电池的周期表III-V族化合物的半导体薄膜通过在基板上形成与期望半导体化学相关但具有较低熔点的中间膜而形成在低成本基板上。 然后在该中间膜处于期望的半导体膜的状态下生长所需的半导体膜。 熔融的中间层将衬底与期望的半导体层隔离，使得当该层生长时，产生大面积晶体。 中间膜可以是半导体III-V族化合物，也可以是III族金属合金。

公开(公告)号：US3993533A

公开(公告)日：1976-11-23

申请号：US566308

申请日：1975-04-09

Applicant: Arthur G. Milnes ,  Donald L. Feucht

Inventor： Arthur G. Milnes ,  Donald L. Feucht

IPC: H01L31/04 ,  B32B43/00 ,  C30B25/18 ,  C30B29/60 ,  H01L21/365 ,  H01L31/06 ,  H01L31/10 ,  H01L31/18 ,  B01J17/00 ,  B01J17/30

CPC classification number: B32B43/00 ,  C30B25/18 ,  H01L31/1804 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/1828 ,  H01L31/184 ,  Y02E10/543 ,  Y02E10/544 ,  Y02E10/547 ,  Y02P70/521 ,  Y10S117/915 ,  Y10S148/051 ,  Y10S148/063 ,  Y10S148/067 ,  Y10S148/072 ,  Y10S148/12 ,  Y10S148/135 ,  Y10S148/15

Abstract: The invention relates to a method for producing a desired thin semiconductor film for use in solar cells. The desired semiconductor is grown epitaxially on a second semiconductor film which may be epitaxial on a third semiconductor. The second semiconductor has a lower melting point than the desired semiconductor. The temperature of the second semiconductor is increased. This creates a molten state in the second semiconductor and the desired semiconductor is stripped away from the second semiconductor. The desired film may be detached by dissolving the second semiconductor with a chemical agent that dissolves the second semiconductor.

Abstract translation: 本发明涉及一种用于生产用于太阳能电池的期望的薄半导体膜的方法。 期望的半导体外延生长在可在第三半导体上外延的第二半导体膜上。 第二半导体具有比期望的半导体更低的熔点。 第二半导体的温度升高。 这在第二半导体中产生熔融状态，并且将希望的半导体从第二半导体剥离。 可以通过用溶解第二半导体的化学试剂溶解第二半导体来分离所需的膜。

公开(公告)号：US20240230996A1

公开(公告)日：2024-07-11

申请号：US18322921

申请日：2023-05-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Tai-Chun HUANG ,  Stefan RUSU

IPC: G02B6/124 ,  G02B6/12 ,  G02B6/13 ,  H01L27/144 ,  H01L31/0232 ,  H01L31/028 ,  H01L31/105 ,  H01L31/18

CPC classification number: G02B6/124 ,  G02B6/12004 ,  G02B6/13 ,  H01L27/1443 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/105 ,  H01L31/1808 ,  G02B2006/12107

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a waveguide structure, a photoelectric material, and a transistor. The waveguide structure is disposed on a substrate and includes a first doping region having a first type of dopant and a second doping region having a second type of dopant different from the first type. The photoelectric material is disposed proximal to a junction of the first doping region and the second doping region. The transistor is disposed on the substrate at a level same as a level of the waveguide structure. A method of manufacturing the semiconductor structure is also provided.

公开(公告)号：US11996489B2

公开(公告)日：2024-05-28

申请号：US17615976

申请日：2019-06-06

Applicant: Nippon Telegraph and Telephone Corporation

Inventor： Tai Tsuchizawa ,  Takuma Aihara ,  Tatsuro Hiraki

IPC: H01L31/0232 ,  G02B6/122 ,  G02B6/132 ,  H01L31/028 ,  H01L31/103 ,  H01L31/18 ,  G02B6/12

CPC classification number: H01L31/02327 ,  G02B6/1228 ,  G02B6/132 ,  H01L31/028 ,  H01L31/103 ,  H01L31/1808 ,  G02B2006/12061 ,  G02B2006/12123

Abstract: A silicon nitride core is formed on a silicon core via a first silicon oxide layer, and a germanium pattern caused to selectively grow in an opening penetrating through a second silicon oxide layer formed on the silicon nitride core and the first silicon oxide layer is formed on a lower silicon pattern formed to be continuous with the silicon core, thereby constituting a Ge photodiode.

公开(公告)号：US20240105875A1

公开(公告)日：2024-03-28

申请号：US18275628

申请日：2021-12-03

Applicant: Rensselaer Polytechnic Institute

Inventor： Asif Jahangir Chowdhury ,  Mona Mostafa Hella

IPC: H01L31/107 ,  G02B6/10 ,  H01L31/0232 ,  H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/1075 ,  G02B6/102 ,  H01L31/02327 ,  H01L31/03529 ,  H01L31/1808 ,  G02B2006/12176

Abstract: A photodiode structure including a silicon substrate, an oxide layer on the silicon substrate, a silicon on insulator region on the oxide layer, a germanium absorption region, a silicon nitride waveguide, a cathode region, and an anode region is provided. The germanium absorption region is at least partially disposed in a recess of the silicon on insulator region. The germanium absorption region includes a top surface having a first width and a bottom surface having a second width, the first width being greater than the second width. The cathode region is formed at a first side of the germanium absorption region, and the anode region is formed at a second side of the germanium absorption region that is opposite the first side.

公开(公告)号：US20240063317A1

公开(公告)日：2024-02-22

申请号：US18385213

申请日：2023-10-30

Applicant: W&W Sens Devices, Inc.

Inventor： Shih-Yuan WANG ,  Shih-Ping WANG

IPC: H01L31/0352 ,  H01L31/075 ,  H01L31/105 ,  G02B6/136 ,  H01L31/028 ,  H01L31/0224 ,  H01L31/0312 ,  H01L31/036 ,  H01L31/077 ,  H01L31/18 ,  H01L31/107 ,  H01L31/054 ,  G02B6/122 ,  H01L23/66 ,  H01L31/02 ,  H01L31/0232 ,  H01L31/0236 ,  H01L31/024 ,  H01L31/0304 ,  H01L31/0745

CPC classification number: H01L31/035272 ,  H01L31/035281 ,  H01L31/075 ,  H01L31/105 ,  G02B6/136 ,  H01L31/0284 ,  H01L31/035227 ,  H01L31/022475 ,  H01L31/035209 ,  H01L31/0312 ,  H01L31/036 ,  H01L31/077 ,  H01L31/1808 ,  H01L31/1812 ,  H01L31/1075 ,  H01L31/028 ,  H01L31/1055 ,  H01L31/107 ,  H01L31/054 ,  G02B6/122 ,  H01L23/66 ,  H01L31/02005 ,  H01L31/02019 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/02363 ,  H01L31/024 ,  H01L31/0304 ,  H01L31/03046 ,  H01L31/0745 ,  H01L31/1804 ,  H01L31/184 ,  H01L31/1844 ,  H01L31/02016 ,  G02B2006/12176

Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

公开(公告)号：US11894476B2

公开(公告)日：2024-02-06

申请号：US17267031

申请日：2019-06-14

Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Kwan Yong Seo ,  Kang Min Lee

IPC: H01L31/0352 ,  H01L31/0445 ,  H01L31/054 ,  H01L31/0216 ,  H01L31/028 ,  H01L31/0304 ,  H01L31/0376 ,  H01L31/18 ,  H01L31/20

CPC classification number: H01L31/035281 ,  H01L31/028 ,  H01L31/02167 ,  H01L31/02168 ,  H01L31/0304 ,  H01L31/03046 ,  H01L31/03762 ,  H01L31/0445 ,  H01L31/0547 ,  H01L31/1804 ,  H01L31/184 ,  H01L31/1808 ,  H01L31/1844 ,  H01L31/1868 ,  H01L31/202

Abstract: There is provided a transparent semiconductor substrate and a method for manufacturing same includes a semiconductor substrate including a first surface and a second surface opposite to the first surface; and a through-hole penetrating the semiconductor substrate, wherein the through-hole includes an inclined portion inclined with respect to the first surface and second surface.

公开(公告)号：US20240014262A1

公开(公告)日：2024-01-11

申请号：US17803424

申请日：2022-07-05

Applicant: Walter A. Tormasi

Inventor： Walter A. Tormasi

IPC: H01L29/06 ,  H01L31/0236 ,  H01L31/18 ,  H01L21/02 ,  G03F7/20

CPC classification number: H01L29/0657 ,  H01L31/02363 ,  H01L31/1804 ,  H01L31/1808 ,  H01L21/02035 ,  G03F7/70058

Abstract: A semiconductor, such as crystallized silicon or germanium, features top-mounted ridges. Circuits are capable of being integrated onto the ridges using modified photolithographic processes. The ridged architecture increases the usable surface area per given footprint of semiconductors. Specifically, if the preferred embodiment is adopted, the ridges increase relative surface area by 41.42%. Such an increase in surface area has numerous advantages. One advantage is that microchip footprints can be 29.29% smaller, allowing 1.41 times more microchips to be produced per wafer. Another advantage is that solar panels can contain 1.41 times more electron-shuttling junctions, thereby increasing overall sunlight harnessing, electrical conversion, and panel efficiency by 41.42%.