公开(公告)号：US20090294983A1

公开(公告)日：2009-12-03

申请号：US12052418

申请日：2008-06-03

申请人： Chad A. Cobbley ,  Jonathon G. Greenwood

发明人： Chad A. Cobbley ,  Jonathon G. Greenwood

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/19043 ,  H01L2224/45099 ,  H01L2924/00

摘要： A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.

摘要翻译： 半导体器件的导电通孔包括延伸到制造衬底的有源表面的相对小的直径部分和延伸到制造衬底的背侧的对应的相对较大的直径部分。 这种类型的导电通孔可以通过在BEOL处理之前或期间形成相对较小的直径部分来制造，而每个导电通孔的大直径部分可以在BEOL处理完成之后制造。 还公开了包括具有这种导电通孔的一个或多个半导体器件的电子器件。

公开(公告)号：US07326316B2

公开(公告)日：2008-02-05

申请号：US10873552

申请日：2004-06-22

申请人： Chad A. Cobbley ,  Steve W. Heppler

发明人： Chad A. Cobbley ,  Steve W. Heppler

IPC分类号： C09J163/00

CPC分类号： H05K3/323 ,  C08K7/16 ,  C08K9/00 ,  C09J5/00 ,  C09J9/02 ,  C09J11/08 ,  C09J2205/11 ,  H01R4/04 ,  H05K3/321 ,  H05K2201/0224 ,  H05K2203/0278 ,  H05K2203/1163 ,  Y10T428/25 ,  Y10T428/263 ,  Y10T428/2982 ,  Y10T428/2989 ,  Y10T428/2991 ,  Y10T428/2998

摘要： An anisotropic electrically conducting interconnect is disclosed in which an adhesive comprising particles having a breakable coating of at feast one electrically nonconductive material is compressed between a first contact and a second contact. Compression to two contacts breaks the breakable coating exposing an electrically conducting material which makes contact with the first and second contacts. The electrically conducting material may be a metal conductor or a two-part reactive conductive resin/catalyst system. Also disclosed are processes for making such electrical interconnects and adhesives for use in making electrical interconnect.

摘要翻译： 公开了一种各向异性导电互连件，其中包含具有至少一种非导电材料的可破坏涂层的颗粒的粘合剂在第一接触和第二接触之间被压缩。 对两个触点的压缩使可破坏的涂层暴露出与第一和第二触点接触的导电材料。 导电材料可以是金属导体或两部分反应性导电树脂/催化剂体系。 还公开了用于制造用于制造电互连的这种电互连和粘合剂的方法。

公开(公告)号：US07275676B2

公开(公告)日：2007-10-02

申请号：US10977301

申请日：2004-10-29

申请人： Chad A. Cobbley ,  Michael B. Ball ,  Marjorie L. Waddel

发明人： Chad A. Cobbley ,  Michael B. Ball ,  Marjorie L. Waddel

IPC分类号： B23K31/02

CPC分类号： H01L24/12 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/11005 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3478 ,  H05K2203/0126 ,  H05K2203/041 ,  H05K2203/0557 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49211 ,  Y10T29/49222 ,  Y10T29/53178 ,  Y10T29/532 ,  H01L2224/05599

摘要： Apparatus for placing conductive spheres on prefluxed bond pads of a substrate using a stencil plate with a pattern of through-holes positioned over the bond pads. Conductive spheres are placed in the through-holes by a moving feed mechanism and the spheres drop through the through-holes onto the bond pads. In one embodiment, the feed mechanism is a sphere hopper which crosses the entire through-hole pattern. In another embodiment, a shuttle plate fed spheres from a reservoir and reversibly moves about one-half of the pitch, moving from a non-discharge position to a discharge position.

摘要翻译： 用于使用具有定位在接合焊盘上方的通孔图案的模板将导电球放置在衬底的预先焊接的焊盘上的装置。 导电球通过移动进给机构放置在通孔中，并且球体通过通孔落到接合垫上。 在一个实施例中，进给机构是穿过整个通孔图案的球形料斗。 在另一个实施例中，梭板从储存器供给球体并可逆地移动约一半的间距，从非排放位置移动到排出位置。

公开(公告)号：US07122404B2

公开(公告)日：2006-10-17

申请号：US10386261

申请日：2003-03-11

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L24/19 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/92144 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/0401

摘要： A technique for packaging multiple devices to form a multi-chip module. Specifically, a multi-chip package is coupled to an interposer to form the multi-chip module. The multi-chip package includes a plurality of integrated circuit chips coupled to a carrier. The chips are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The interposer is configured such that vias are aligned with the conductive elements. Conductive material may be disposed into the vias to provide signal paths from the integrated circuit chips to conductive balls disposed on the backside of the interposer.

摘要翻译： 一种用于封装多个器件以形成多芯片模块的技术。 具体地，多芯片封装耦合到插入器以形成多芯片模块。 多芯片封装包括耦合到载体的多个集成电路芯片。 芯片被封装，使得导电元件通过密封剂暴露。 导电元件电耦合到芯片。 插入器被配置为使得通孔与导电元件对准。 导电材料可以设置在通路中，以提供从集成电路芯片到设置在插入器的背面上的导电球的信号路径。

公开(公告)号：US07049685B2

公开(公告)日：2006-05-23

申请号：US10099155

申请日：2002-03-13

申请人： Stephen L. James ,  Chad A. Cobbley

发明人： Stephen L. James ,  Chad A. Cobbley

IPC分类号： H01L23/495 ,  H01L23/58 ,  H01L23/04 ,  H01L23/28

CPC分类号： H01L23/564 ,  H01L21/565 ,  H01L23/13 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： Packaged microelectronic devices, interconnecting units for packaged microelectronic devices, and methods and apparatuses for packaging microelectronic devices with pressure release elements. In one aspect of the invention, a packaged microelectronic device includes a microelectronic die, an interconnecting unit coupled to the die, and a protective casing over the die. The interconnecting unit can have a substrate with a first side and a second side to which the die is attached, a plurality of contact elements operatively coupled to corresponding bond-pads on the die, and a plurality of ball-pads on the first side of the substrate electrically coupled to the contact elements. The protective casing can have at least a first cover encapsulating the die on the first side of the substrate. The packaged microelectronic device can also include a pressure relief element through at least a portion of the first cover and/or the substrate. The pressure relief element can have an opening to an external environment and a passageway to an internal location within the packaged microelectronic device. In operation, the pressure relief element releases gases or other forms of moisture entrapped by the casing and/or the substrate during high temperature processing of the packaged microelectronic device.

公开(公告)号：US07029931B2

公开(公告)日：2006-04-18

申请号：US10771085

申请日：2004-02-03

申请人： Chad A. Cobbley ,  Timothy L. Jackson

发明人： Chad A. Cobbley ,  Timothy L. Jackson

IPC分类号： H01L21/66

CPC分类号： H01L25/50 ,  H01L22/20 ,  H01L23/481 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06579 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/14 ,  Y10T156/10 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A technique for forming die stacks. Specifically, a stacking tip is provided to facilitate the stacking of die in a desired configuration. A first die is picked up by the stacking tip. The first die is coated with an adhesive on the underside of the die. The first die is brought in contact with a second die via the stacking tip. The second die is coupled to the first die via the adhesive on the underside of the first die. The second die is coated with an adhesive coating on the underside of the die. The second die is then brought in contact with a third die via the stacking tip. The third die is coupled to the second die via the adhesive on the underside of the second die, and so forth. Die stacks are formed without being coupled to a substrate. The die stacks may be functionally and/or environmentally tested before attaching the die stack to a substrate.

公开(公告)号：US06906403B2

公开(公告)日：2005-06-14

申请号：US10164077

申请日：2002-06-04

申请人： Todd O. Bolken ,  Chad A. Cobbley

发明人： Todd O. Bolken ,  Chad A. Cobbley

IPC分类号： H01L21/44 ,  H01L21/48 ,  H01L23/02 ,  H01L23/48 ,  H01L27/146

CPC分类号： H01L27/14618 ,  B33Y80/00 ,  H01L23/293 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L27/14603 ,  H01L27/14625 ,  H01L27/14683 ,  H01L31/0203 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10S257/924 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00011

摘要： The invention provides improved packaging for electronic devices that are light or other radiation-sensitive, such as image sensors including CCD or CMOS chips. Methods of assembly are also provided. In one embodiment of the invention, an image sensor package is assembled by surrounding a chip with a barrier of transfer mold compound and covering the chip with a transparent lid. In another embodiment of the invention, the perimeter area of a chip, including interconnections such as wire bonds and bond pads, is encapsulated with a liquid dispensed epoxy, and a transparent lid is attached. In yet another embodiment of the invention, chip encapsulation is accomplished with a unitary shell of entirely transparent material. In yet another embodiment of the invention, a substrate-mounted chip and a transparent lid are loaded into a transfer mold that holds them in optimal alignment. The transfer mold is then filled with molding compound to encapsulate the chip and interconnections, and to retain the transparent lid.

摘要翻译： 本发明提供了对于光或其他辐射敏感的电子设备的改进的包装，例如包括CCD或CMOS芯片的图像传感器。 还提供了组装方法。 在本发明的一个实施例中，图像传感器封装通过围绕具有转移模具化合物的屏障的芯片组装并用透明盖覆盖芯片来组装。 在本发明的另一个实施例中，芯片的周边区域（包括诸如引线接合和接合焊盘的互连）用液体分配的环氧树脂封装，并且附着有透明盖。 在本发明的另一个实施例中，芯片封装通过完全透明材料的整体外壳完成。 在本发明的另一个实施例中，将衬底安装的芯片和透明盖子装载到转移模具中，以使它们保持最佳对准。 然后将转移模具填充模塑料以封装芯片和互连，并保持透明盖。

公开(公告)号：US06838760B1

公开(公告)日：2005-01-04

申请号：US09649428

申请日：2000-08-28

申请人： Chad A. Cobbley

发明人： Chad A. Cobbley

IPC分类号： H01L21/56 ,  H01L23/02

CPC分类号： H01L23/3121 ,  H01L21/565 ,  H01L23/13 ,  H01L23/4985 ,  H01L24/48 ,  H01L24/83 ,  H01L2224/4824 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3025 ,  Y10T29/49146 ,  Y10T29/49171 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Methods and apparatuses for encapsulating a microelectronic die or other components in the fabrication of packaged microelectronic devices. In one aspect of the invention, a packaged microelectronic device assembly includes a microelectronic die, a substrate attached to the die, a protective casing covering a portion of the substrate, and a barrier projecting away from the surface of the substrate. The microelectronic die can have an integrated circuit and a plurality of bond-pads operatively coupled to the integrated circuit. The substrate can have a cap-zone defined by an area that is to be covered by the protective casing, a plurality of contact elements arranged in the cap-zone, a plurality of ball-pads arranged in a ball-pad array outside of the cap-zone, and a plurality of conductive lines coupling the contact elements to the ball-pads. The contact elements are electrically coupled to corresponding bond-pads on the microelectronic die, and the protective casing covers the cap-zone. The barrier on the surface of the substrate is configured so that at least a portion of the barrier is outside of the cap-zone and adjacent to at least a portion of the molded section. The barrier is a seal that inhibits the thermosetting material of the protective casing from covering a portion of the substrate outside of the cap-zone. As such, the barrier prevents thermosetting material from leaking between the substrate and a mold outside of the cap-zone during a molding process.

摘要翻译： 用于将微电子管芯或其他部件封装在封装的微电子器件的制造中的方法和装置。 在本发明的一个方面，封装的微电子器件组件包括微电子管芯，连接到管芯的衬底，覆盖衬底的一部分的保护壳体以及远离衬底的表面突出的阻挡层。 微电子管芯可以具有集成电路和可操作地耦合到集成电路的多个接合焊盘。 衬底可以具有由被保护壳体覆盖的区域限定的帽区域，布置在帽区域中的多个接触元件，布置在球垫阵列外部的球垫阵列中的多个球垫 帽区，以及将接触元件耦合到球垫的多个导线。 接触元件电耦合到微电子管芯上的相应接合焊盘，并且保护套管覆盖盖区。 衬底表面上的阻挡层被构造成使得阻挡层的至少一部分在帽区域的外部并且与模制部分的至少一部分相邻。 阻挡层是抑制保护壳体的热固性材料在盖帽区域外部覆盖基底的一部分的密封件。 因此，在模制过程中，屏障防止热固性材料在盖区之外的基板和模具之间泄漏。

公开(公告)号：US06773523B2

公开(公告)日：2004-08-10

申请号：US10035693

申请日：2001-11-07

申请人： Rich Fogal ,  John VanNortwick ,  Chad A. Cobbley

发明人： Rich Fogal ,  John VanNortwick ,  Chad A. Cobbley

IPC分类号： B32B3100

CPC分类号： H01L21/67259 ,  H01L21/67144 ,  H01L21/6838 ,  H01L24/48 ,  H01L24/78 ,  H01L24/85 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/78 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/14 ,  Y10T156/1089 ,  Y10T156/109 ,  Y10T156/1702 ,  Y10T156/1744 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： Apparatus and method for attaching, assembling, and/or mounting a substrate to any semiconductor device or a flip-chip type semiconductor device.

摘要翻译： 用于将衬底附接，组装和/或安装到任何半导体器件或倒装芯片型半导体器件的装置和方法。

公开(公告)号：US06699928B2

公开(公告)日：2004-03-02

申请号：US09941495

申请日：2001-08-29

申请人： Chad A. Cobbley ,  Tongbi Jiang ,  Edward A. Schrock

发明人： Chad A. Cobbley ,  Tongbi Jiang ,  Edward A. Schrock

IPC分类号： C08J300

CPC分类号： H01L24/83 ,  H01L24/27 ,  H01L24/29 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2224/83194 ,  H01L2224/83855 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512

摘要： An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C. Advantageously, the instant setting adhesive composition can be screen printed on a semiconductor wafer prior to singulation because streets between the dice are essentially free of the instant setting adhesive composition.

摘要翻译： 提供在半导体应用中粘合组合物的粘合剂组合物和方法。 粘合剂组合物是瞬间固化粘合剂组合物，其不需要诸如热或辐射的外部能量输入，以便将粘合剂组合物施加在表面上。 本发明的凝固组合物具有足够的触变特性，使得将即刻固化粘合剂组合物施加到表面可以通过各种应用技术和各种图案来实现。 一旦施加到表面上，即刻固化粘合剂组合物在相对较短的时间段内保持离散的图案，通常在约0.10至约120秒的环境温度，通常为20℃至30℃ 有利地，即刻固化粘合剂组合物可以在切割之前丝网印刷在半导体晶片上，因为骰子之间的街道基本上不含瞬时固化粘合剂组合物。