公开(公告)号：US20170092746A1

公开(公告)日：2017-03-30

申请号：US15374963

申请日：2016-12-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuo-Cheng Ching ,  Guan-Lin Chen ,  Chao-Hsiung Wang ,  Chi-Wen Liu

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/306 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/02236 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/30625 ,  H01L29/785

Abstract: A method comprises recessing a substrate to form a fin enclosed by an isolation region, wherein the substrate is formed of a first semiconductor material, recessing the fin to form a trench over a lower portion of the fin, growing a second semiconductor material in the trench to form a middle portion of the fin through a first epitaxial process, forming a first carbon doped layer over the lower portion through a second epitaxial process, growing the first semiconductor material over the first carbon doped layer to form an upper portion of the fin through a third epitaxial process, forming a first source/drain region through a fourth epitaxial process, wherein a second carbon doped layer is formed underlying the first source/drain region and applying a thermal oxidation process to the middle portion of the fin to form an oxide outer layer.

公开(公告)号：US09608103B2

公开(公告)日：2017-03-28

申请号：US14505304

申请日：2014-10-02

Applicant: Toshiba Corporation

Inventor： Jeffrey Craig Ramer ,  Karl Knieriem

IPC: H01L29/205 ,  H01L29/778 ,  H01L29/201 ,  H01L29/10 ,  H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/20 ,  H01L29/207

CPC classification number: H01L29/7787 ,  H01L21/02458 ,  H01L21/02507 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1029 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207 ,  H01L29/66 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/78

Abstract: A method for forming a high electron mobility transistor (HEMT) device with a plurality of alternating layers of one or more undoped gallium nitride (GaN) layers and one or more carbon doped gallium nitride layers (c-GaN), and an HEMT device formed by the method is disclosed. In one embodiment, the method includes forming a channel layer stack on a substrate, the channel layer stack having a plurality of alternating layers of one or more undoped gallium nitride (GaN) layers and one or more carbon doped gallium nitride layers (c-GaN). The method further includes forming a barrier layer on the channel layer stack. In one embodiment, the channel layer stack is formed by growing each of the one or more undoped gallium nitride (GaN) layers in growth conditions that suppress the incorporation of carbon in gallium nitride, and growing each of the one or more carbon doped gallium nitride (c-GaN) layers in growth conditions that promote the incorporation of carbon in gallium nitride.

公开(公告)号：US20170084702A1

公开(公告)日：2017-03-23

申请号：US15348507

申请日：2016-11-10

Applicant: Glen A. Slack ,  Leo J. Schowalter

Inventor： Glen A. Slack ,  Leo J. Schowalter

IPC: H01L29/207 ,  H01L21/02 ,  H01L21/225 ,  H01L29/20

CPC classification number: H01L29/207 ,  C30B23/00 ,  C30B29/403 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/2258 ,  H01L29/2003 ,  H01L33/325

Abstract: Fabrication of doped AlN crystals and/or AlGaN epitaxial layers with high conductivity and mobility is accomplished by, for example, forming mixed crystals including a plurality of impurity species and electrically activating at least a portion of the crystal.

公开(公告)号：US20170077242A1

公开(公告)日：2017-03-16

申请号：US15341590

申请日：2016-11-02

Applicant: AZURSPACE Solar Power GmbH

Inventor： Stephan LUTGEN ,  Saad MURAD ,  Ashay CHITNIS

IPC: H01L29/205 ,  H01L29/872 ,  H01L29/778 ,  H01L29/20 ,  H01L29/207

CPC classification number: H01L29/205 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02579 ,  H01L29/1075 ,  H01L29/151 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/36 ,  H01L29/778 ,  H01L29/7783 ,  H01L29/872 ,  H01L33/0025

Abstract: An epitaxial group-ill-nitride buffer-layer structure is provided on a heterosubstrate, wherein the buffer-layer structure has at least one stress-management layer sequence including an interlayer structure arranged between and adjacent to a first and a second group-ill-nitride layer, wherein the interlayer structure comprises a group-ill-nitride interlayer material having a larger band gap than the materials of the first and second group-ill-nitride layers, and wherein a p-type-dopant-concentration profile drops, starting from at least 1×1018 cm-3, by at least a factor of two in transition from the interlayer structure to the first and second group-ill-nitride layers.

Abstract translation: 外延基团氮化物缓冲层结构提供在异质基底上，其中缓冲层结构具有至少一个应力管理层序列，其包括布置在第一和第二组 - 氮化物层，其中所述层间结构包括具有比所述第一和第二组氮化物层的材料更大的带隙的组氮化物中间层材料，并且其中p型掺杂剂浓度分布下降，起始 从层间结构向第一和第二组氮化物层转变的至少1×10 18 cm -3至少两倍。

公开(公告)号：US20170076942A1

公开(公告)日：2017-03-16

申请号：US15363230

申请日：2016-11-29

Applicant: SemiNuclear, Inc.

Inventor： Patrick Curran

IPC: H01L21/02 ,  C23C16/54 ,  C23C16/46

CPC classification number: H01L21/02521 ,  C07F7/21 ,  C23C16/30 ,  C23C16/38 ,  C23C16/40 ,  C23C16/401 ,  C30B7/105 ,  C30B29/406 ,  H01B1/06 ,  H01L21/02208 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02505 ,  H01L21/02565 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0259 ,  H01L21/02595 ,  H01L21/0262

Abstract: Materials containing picocrystalline quantum dots that form artificial atoms are disclosed. The picocrystalline quantum dots (in the form of boron icosahedra with a nearly-symmetrical nuclear configuration) can replace corner silicon atoms in a structure that demonstrates both short range and long-range order as determined by x-ray diffraction of actual samples. A novel class of boron-rich compositions that self-assemble from boron, silicon, hydrogen and, optionally, oxygen is also disclosed. The preferred stoichiometric range for the compositions is (B12Hw)xSiyOz with 3≦w≦5, 2≦x≦4, 2≦y≦5 and 0≦z≦3. By varying oxygen content and the presence or absence of a significant impurity such as gold, unique electrical devices can be constructed that improve upon and are compatible with current semiconductor technology.

Abstract translation: 公开了含有形成人造原子的晶体量子点的材料。 晶体上的量子点（以具有近似对称的核构型的二十面体形式）可以代替通过实际样品的x射线衍射确定的短距离和长程序列的结构中的角硅原子。 还公开了一类新颖的含硼组合物，其自组装从硼，硅，氢和任选的氧。 组合物的优选化学计量范围为（B12Hw）xSiyOz，其中3≤w≤5,2≤x≤4,2≤y≤5,0≤z≤3。 通过改变氧含量和存在或不存在诸如金的显着杂质，可以构造改进并与当前半导体技术相容的独特电气装置。

公开(公告)号：US20170073839A1

公开(公告)日：2017-03-16

申请号：US15123556

申请日：2015-02-26

Applicant: OSAKA UNIVERSITY ,  ITOCHU PLASTICS INC.

Inventor： Yusuke MORI ,  Masashi YOSHIMURA ,  Mamoru IMADE ,  Masashi ISEMURA ,  Akira USUI ,  Masatomo SHIBATA ,  Takehiro YOSHIDA

IPC: C30B29/40 ,  C30B19/06 ,  C30B25/18 ,  C30B25/20 ,  C30B33/00 ,  B28D5/00 ,  H01L21/78 ,  H01L33/00 ,  H01L33/12 ,  H01L33/32 ,  H01L29/20 ,  C30B19/02 ,  H01L21/02

CPC classification number: C30B29/406 ,  B28D5/00 ,  C30B19/02 ,  C30B19/061 ,  C30B25/186 ,  C30B25/20 ,  C30B29/38 ,  C30B33/00 ,  H01L21/0242 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/02625 ,  H01L21/02642 ,  H01L21/02647 ,  H01L21/7813 ,  H01L29/2003 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/32 ,  H01S5/3013 ,  H01S2304/06

Abstract: A large Group III nitride crystal of high quality with few defects such as a distortion, a dislocation, and warping is produced by vapor phase epitaxy. A method for producing a Group III nitride crystal includes: a first Group III nitride crystal production process of producing a first Group III nitride crystal 1003 by liquid phase epitaxy; and a second Group III nitride crystal production process of producing a second Group III nitride crystal 1004 on the first crystal 1003 by vapor phase epitaxy. In the first Group III nitride crystal production process, the surfaces of seed crystals 1003a (preliminarily provided Group III nitride) are brought into contact with an alkali metal melt, a Group III element and nitrogen are cause to react with each other in a nitrogen-containing atmosphere in the alkali metal melt, and the Group III nitride crystals are bound together by growth of the Group III nitride crystals grown from the seed crystals 1003a to produce a first crystal 1003.

Abstract translation: 通过气相外延生产出具有很少缺陷（例如变形，位错和翘曲）的高质量的大的III族氮化物晶体。 制造III族氮化物晶体的方法包括：通过液相外延生产第一III族氮化物晶体1003的第一III族氮化物晶体制造工艺; 以及通过气相外延在第一晶体1003上制造第二III族氮化物晶体1004的第二III族氮化物晶体制造方法。 在第一III族氮化物晶体制造方法中，使晶种1003a（预先设置的III族氮化物）的表面与碱金属熔体，III族元素和氮相互接触， 在碱金属熔体中含有气氛，并且通过从种子晶体1003a生长的III族氮化物晶体的生长将III族氮化物晶体结合在一起，以产生第一晶体1003。

公开(公告)号：US20170062648A1

公开(公告)日：2017-03-02

申请号：US15137696

申请日：2016-04-25

Applicant: Ascent Solar Technologies, Inc.

Inventor： Lawrence M. Woods ,  Rosine M. Ribelin ,  Prem Nath

IPC: H01L31/18 ,  H01L31/073 ,  H01L31/0336

CPC classification number: H01L31/18 ,  H01L21/0256 ,  H01L21/02579 ,  H01L21/385 ,  H01L31/0336 ,  H01L31/0392 ,  H01L31/046 ,  H01L31/0725 ,  H01L31/073 ,  H01L31/1828 ,  H01L31/1884 ,  Y02E10/543 ,  Y02P70/521

Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.

Abstract translation: 多结光伏电池包括在基板上形成的基板和背接触层。 在背面接触层上形成低带隙IB-IIIB-VIB2族材料太阳能吸收层。 异质结伙伴层形成在低带隙太阳能吸收层上，以帮助形成底部电池结，异质结伙伴层包括至少一层具有至少100欧姆 - 厘米电阻率的高电阻率材料层。 高电阻率材料具有式（Zn和/或Mg）（S，Se，O和/或OH）。 在异质结伙伴层之上形成导电互连层，并且在导电互连层上形成至少一个附加的单结光伏电池作为顶部电池。 顶部单元可以具有非晶硅或p型硒化镉太阳能吸收层。 硒化镉可以用氯化物掺杂工艺从n型转变成p型。

公开(公告)号：US09583608B2

公开(公告)日：2017-02-28

申请号：US14418589

申请日：2013-05-24

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Yasuhiro Yamada ,  Yoshiharu Anda ,  Asamira Suzuki

IPC: H01L29/778 ,  H01L29/66 ,  H01L21/285 ,  H01L29/205 ,  H01L29/417 ,  H01L29/49 ,  H01L29/267 ,  H01L29/10 ,  H01L29/20 ,  H01L29/423 ,  H01L21/02 ,  H01L23/00

CPC classification number: H01L29/7787 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02565 ,  H01L21/02579 ,  H01L21/28556 ,  H01L23/564 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/267 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/4966 ,  H01L29/66462 ,  H01L29/7786 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A nitride semiconductor device of the present invention has a source-electrode-side insulator protection film layer disposed between a source electrode and a drain electrode on a second nitride semiconductor layer and formed at least partially covering the source electrode, a drain-electrode-side insulator protection film layer disposed separately from the source-electrode-side insulator protection film layer and formed at least partially covering the drain electrode, and a gate layer formed in contact with the second nitride semiconductor layer between the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and made of a p-type metal oxide semiconductor, and the gate layer has regions opposite to the second nitride semiconductor layer across each of the source-electrode-side insulator protection film layer and the drain-electrode-side insulator protection film layer and a region in contact with the second nitride semiconductor layer.

Abstract translation: 本发明的氮化物半导体器件具有源电极侧绝缘体保护膜层，其设置在第二氮化物半导体层上的源电极和漏电极之间，并且至少部分地覆盖源电极，漏电极侧 绝缘体保护膜层，与源电极侧绝缘体保护膜层分离设置，并形成为至少部分地覆盖漏极电极;以及栅极层，其与源极侧绝缘体保护膜之间的第二氮化物半导体层接触形成 层和漏电极侧绝缘体保护膜层，由p型金属氧化物半导体构成，栅极层具有穿过源电极侧绝缘体保护膜层和第二氮化物半导体层的与第二氮化物半导体层相反的区域 漏电极侧绝缘体保护膜层和与第二氮化物半导体接触的区域 ctor层。

公开(公告)号：US09583342B2

公开(公告)日：2017-02-28

申请号：US14340249

申请日：2014-07-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chun Hsiung Tsai ,  Wei-Yuan Lu

IPC: H01L21/336 ,  H01L21/02 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/78

CPC classification number: H01L21/823892 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02636 ,  H01L21/311 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/823493 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924 ,  H01L27/0928 ,  H01L29/1037 ,  H01L29/66545 ,  H01L29/7834 ,  H01L29/785

Abstract: A method for fabricating a semiconductor device having a substantially undoped channel region includes providing a substrate having a fin extending from the substrate. An in-situ doped layer is formed on the fin. By way of example, the in-situ doped layer may include an in-situ doped well region formed by an epitaxial growth process. In some examples, the in-situ doped well region includes an N-well or a P-well region. After formation of the in-situ doped layer on the fin, an undoped layer is formed on the in-situ doped layer, and a gate stack is formed over the undoped layer. The undoped layer may include an undoped channel region formed by an epitaxial growth process. In various examples, a source region and a drain region are formed adjacent to and on either side of the undoped channel region.

Abstract translation: 一种用于制造具有基本上未掺杂的沟道区的半导体器件的方法，包括提供具有从衬底延伸的翅片的衬底。 在翅片上形成原位掺杂层。 作为示例，原位掺杂层可以包括通过外延生长工艺形成的原位掺杂阱区。 在一些实例中，原位掺杂阱区包括N阱或P阱区。 在翅片上形成原位掺杂层后，在原位掺杂层上形成未掺杂的层，在未掺杂的层上形成栅叠层。 未掺杂层可以包括通过外延生长工艺形成的未掺杂沟道区。 在各种示例中，源极区域和漏极区域形成在未掺杂沟道区域的两侧并且在该未掺杂沟道区域的两侧。

公开(公告)号：US09559186B2

公开(公告)日：2017-01-31

申请号：US14792467

申请日：2015-07-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun Hsiung Tsai ,  Yan-Ting Lin

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L23/485 ,  H01L29/417 ,  H01L29/45 ,  H01L29/06 ,  H01L21/285 ,  H01L21/768 ,  H01L21/306 ,  H01L21/762 ,  H01L29/08 ,  H01L29/737

CPC classification number: H01L29/66636 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02178 ,  H01L21/02186 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02614 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/28525 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L23/485 ,  H01L29/0642 ,  H01L29/0847 ,  H01L29/41758 ,  H01L29/41791 ,  H01L29/45 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66795 ,  H01L29/7378 ,  H01L29/78 ,  H01L29/7848 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The embodiments described above provide mechanisms of forming contact structures with low resistance. A strained material stack with multiple sub-layers is used to lower the Schottky barrier height (SBH) of the conductive layers underneath the contact structures. The strained material stack includes a SiGe main layer, a graded SiG layer, a GeB layer, a Ge layer, and a SiGe top layer. The GeB layer moves the Schottky barrier to an interface between GeB and a metal germanide, which greatly reduces the Schottky barrier height (SBH). The lower SBH, the Ge in the SiGe top layer forms metal germanide and high B concentration in the GeB layer help to reduce the resistance of the conductive layers underneath the contact structures.

Abstract translation: 上述实施例提供了形成具有低电阻的接触结构的机构。 使用具有多个子层的应变材料堆叠来降低接触结构下方的导电层的肖特基势垒高度（SBH）。 应变材料堆叠包括SiGe主层，渐变SiG层，GeB层，Ge层和SiGe顶层。 GeB层将肖特基势垒移动到GeB和锗化锗之间的界面，这大大降低了肖特基势垒高度（SBH）。 下层SBH，SiGe顶层中的Ge形成金属锗化物，并且GeB层中的高B浓度有助于降低接触结构下面的导电层的电阻。