公开(公告)号：US6041495A

公开(公告)日：2000-03-28

申请号：US87929

申请日：1998-06-01

申请人： Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

发明人： Jin Hyun Yoon ,  Gi Bum Park ,  In Pyo Hong ,  Yong Kim ,  Myung Kee Chung

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L23/498 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/24 ,  H05K3/40 ,  H05K3/42 ,  H05K3/30

CPC分类号： H01L23/3107 ,  H01L23/3114 ,  H01L23/49833 ,  H05K3/4007 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/113 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0379 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0542 ,  H05K3/064 ,  H05K3/244 ,  H05K3/423 ,  Y10T29/49117 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49165

摘要： A first method of manufacturing a printed circuit board includes steps of (a) preparing a board which has a chip mounting area and circuit patterns on an upper surface and metal pads to be electrically connected to the circuit patterns on a lower surface, (b) attaching a metal plate to the lower surface of the board, (c) forming metal patterns on the metal pads by etching the metal plate, and (d) forming metal bumps by plating the metal patterns. A second method of manufacturing a circuit board, in this case a flexible circuit board, includes the steps of (a) preparing a board having Cu patterns, plated with a Au layer, attached to a lower surface of a polyimide tape, (b) forming a plurality of via holes in the polyimide tape, which expose the Cu patterns to the upper surface of the polyimide tape, (c) coating the upper surface of the polyimide tape with a photoresist, and exposing and developing the photoresist to form openings therein which expose the via holes, (d) plating walls, defining the openings and the via holes, with Cu, (e) removing remaining portions of the photoresist to produce Cu bumps, and (f) plating the bumps to protect the Cu. The printed circuit boards of the present invention have advantages in that they are not subject to a misalignment of the metal bumps with their underlying conductive pattern, and eliminate the need to use flux, thereby being environmentally friendly.

摘要翻译： 制造印刷电路板的第一种方法包括以下步骤：（a）制备具有芯片安装区域和上表面上的电路图案的板，以及与下表面上的电路图案电连接的金属焊盘;（b） 将金属板附着到板的下表面，（c）通过蚀刻金属板在金属焊盘上形成金属图案，（d）通过镀金属图案形成金属凸块。 制造电路板的第二种方法（在这种情况下为柔性电路板）包括以下步骤：（a）准备具有附着在聚酰亚胺胶带的下表面上的镀有Au层的Cu图案的板，（b） 在聚酰亚胺胶带中形成多个通孔，将Cu图案暴露于聚酰亚胺胶带的上表面，（c）用光致抗蚀剂涂覆聚酰亚胺胶带的上表面，并曝光和显影光致抗蚀剂以在其中形成开口 其暴露通孔，（d）用Cu限定开口和通孔的电镀壁，（e）除去光致抗蚀剂的剩余部分以产生Cu凸块，以及（f）电镀凸块以保护Cu。 本发明的印刷电路板的优点在于，它们不会使金属凸块与其下面的导电图案不对准，并且不需要使用助焊剂，因此是环境友好的。

公开(公告)号：US5108541A

公开(公告)日：1992-04-28

申请号：US665633

申请日：1991-03-06

申请人： Mark S. Schneider ,  John Acocella ,  Lester W. Herron ,  Mark R. Kordus ,  Louis H. Wirtz

发明人： Mark S. Schneider ,  John Acocella ,  Lester W. Herron ,  Mark R. Kordus ,  Louis H. Wirtz

IPC分类号： H01R43/00 ,  H01L21/48 ,  H01L21/68 ,  H05K1/03 ,  H05K3/06 ,  H05K3/40 ,  H05K3/46

CPC分类号： H01L21/6835 ,  H01L21/4846 ,  H01L21/486 ,  H05K3/06 ,  H05K3/4647 ,  H01L2221/68377 ,  H05K1/0306 ,  H05K2203/0369 ,  H05K2203/0384 ,  H05K2203/0733 ,  H05K2203/1184 ,  H05K2203/1476 ,  H05K3/4614

摘要： The present invention relates generally to new processes for making decals, and more particularly to electrically conductive decals filled with inorganic insulator material. Various methods and processes that are used to make these electrically conductive decals filled with inorganic dielectric material are disclosed.

摘要翻译： 本发明一般涉及用于制造贴花的新方法，更具体地说，涉及填充有无机绝缘体材料的导电贴花。 公开了用于制造充满无机介电材料的这些导电贴花的各种方法和工艺。

公开(公告)号：US5105537A

公开(公告)日：1992-04-21

申请号：US596432

申请日：1990-10-12

申请人： Madhav Datta ,  David E. King ,  Alan D. Knight ,  Carlos J. Sambucetti

发明人： Madhav Datta ,  David E. King ,  Alan D. Knight ,  Carlos J. Sambucetti

IPC分类号： H01H1/06 ,  H01L21/60 ,  H01R12/04 ,  H01R12/32 ,  H01R13/03 ,  H01R13/22 ,  H01R43/16 ,  H05K1/11 ,  H05K3/06 ,  H05K3/07 ,  H05K3/24 ,  H05K3/38 ,  H05K3/40

CPC分类号： H05K3/07 ,  H01R13/22 ,  H05K3/4007 ,  H01L2924/0002 ,  H01R13/03 ,  H01R43/16 ,  H05K2201/0367 ,  H05K2201/0373 ,  H05K2203/0369 ,  H05K3/064 ,  H05K3/383 ,  Y10T29/49222

摘要： An electrical interconnection, which includes a method for fabricating the device, is disclosed. The interconnection comprises two contact surfaces, on at least one of which is disposed at least one solid metal conical projection in predetermined dimension and location. Rather than necessarily being permanently cojoined, the contact surfaces are attachable and detachable when desired. The conical projections on one contact surface make ohmic contact, either by wiping with an intermeshing like structure on a second contact surface or by contacting a second contact surface which is a substantially flat contact pad. An interconnection, in this invention, is the combination of at least one contact having individual conical projections and another contact, optionally having individual conical projections. The conical projections are formed in metal by electrochemical machining in neutral salt solution, optionally in a continuous foil. The conical projections are also optionally formed on the head of a contact pin.

公开(公告)号：US4546406A

公开(公告)日：1985-10-08

申请号：US602792

申请日：1984-05-07

申请人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

发明人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

IPC分类号： H01L21/48 ,  H01L23/14 ,  H01L23/538 ,  H05K1/02 ,  H05K1/03 ,  H05K1/05 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46

CPC分类号： C03C29/00 ,  C03C8/02 ,  H01L21/4857 ,  H01L23/142 ,  H01L23/538 ,  H05K1/0207 ,  H05K1/053 ,  H05K3/202 ,  H05K3/4629 ,  H05K3/4641 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K1/0206 ,  H05K1/0306 ,  H05K2201/068 ,  H05K2201/09054 ,  H05K2201/09309 ,  H05K2201/09781 ,  H05K2201/10969 ,  H05K2203/0323 ,  H05K2203/0369 ,  H05K2203/1476 ,  H05K3/429 ,  H05K3/4611 ,  Y10T428/12528

摘要： An electronic circuit interconnection system provides high density mounting of ceramic chip-carrier integrated circuit devices or other beam-lead, dual-in-line (DIP), tape-automated-bonded (TAB), flip-chip, or direct-mounted i.c. devices with wire-bonded interconnects or the like on an economical, dimensionally-stable, interconnection substrate which has high heat dissipating properties. The substrate has glass components which are fused onto etched metal patterns and which are proportioned relative to the metal patterns so that the heat-expansion properties of the substrate correspond to those of the i.c. devices to maintain bond integrity between the i.c. leads and circuit paths on the substrate and so that the substrate has sufficient heat-dissipating properties to permit the high density i.c. mounting. The substrates incorporate circuit paths, device mounting pads, edge terminals, pin mounting holes and other typical substrate features in the etched patterns in multimetal laminated metal plates of selected thickness which are coated on one or both sides with glass frit fused to the plates. Where substrates with more than one layer are desired, glass-coated plates are stacked with pin mounting holes and the like aligned and the glass coatings are fused together. Metal vias extend through the glass coatings where desired to interconnect metal layers of the substrate.

摘要翻译： 电子电路互连系统提供高密度安装陶瓷芯片载体集成电路器件或其他射束引线，双列直插（DIP），带自动键合（TAB），倒装芯片或直接安装的直流 在具有高散热特性的经济，尺寸稳定的互连基板上具有引线接合互连件的装置等。 衬底具有熔合到蚀刻金属图案上并且相对于金属图案成比例的玻璃成分，使得衬底的热膨胀特性对应于直流电的那些。 保持i.c.之间的债券完整性的设备。 引线和电路路径，使基板具有足够的散热特性，以允许高密度直流电。 安装。 这些基板在被选择厚度的多金属层压金属板中的蚀刻图案中包含电路路径，器件安装焊盘，边缘端子，引脚安装孔和其它典型的衬底特征，其在一侧或两侧上用与玻璃板熔合的玻璃料一起涂覆。 在需要多于一层的基材的情况下，玻璃涂覆的板堆叠，销钉安装孔等对齐，并且玻璃涂层熔合在一起。 金属通孔在需要时延伸穿过玻璃涂层以互连基底的金属层。

公开(公告)号：US4472762A

公开(公告)日：1984-09-18

申请号：US438137

申请日：1982-11-01

申请人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

发明人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

IPC分类号： H01L21/48 ,  H01L23/14 ,  H01L23/538 ,  H05K1/02 ,  H05K1/03 ,  H05K1/05 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46 ,  H05K1/09

CPC分类号： H05K3/4629 ,  H01L21/4857 ,  H01L23/142 ,  H01L23/538 ,  H05K1/0207 ,  H05K1/053 ,  H05K3/202 ,  H05K3/4641 ,  H01L2224/49171 ,  H01L2924/09701 ,  H05K1/0206 ,  H05K1/0306 ,  H05K2201/068 ,  H05K2201/09054 ,  H05K2201/09309 ,  H05K2201/09781 ,  H05K2201/10969 ,  H05K2203/0323 ,  H05K2203/0369 ,  H05K2203/1476 ,  H05K3/429 ,  H05K3/4611

摘要： An electronic circuit interconnection system provides high density mounting on ceramic chip-carrier integrated circuit devices or other beam-lead, dual-in-line (DIP), tape-automated-bonded (TAB), flip-chip, or direct-mounted i.c. devices with wire-bonded interconnects or the like on an economical, dimensionally-stable, interconnection substrate which has high heat dissipating properties. The substrate has glass components which are fused onto etched metal patterns and which are proportioned relative to the metal patterns so that the heat-expansion properties of the substrate correspond to those of the i.c. devices to maintain bond integrity between the i.c. leads and circuit paths on the substrate and so that the substrate has sufficient heat-dissipating properties to permit the high density i.c. mounting. The substrates incorporate circuit paths, device mounting pads, edge terminals, pin mounting holes and other typical substrate features in the etched patterns in multimetal laminated metal plates of selected thickness which are coated on one or both sides with glass frit fused to the plates. Where substrates with more than one layer are desired, glass-coated plates are stacked with pin mounting holes and the like aligned and the glass coatings are fused together. Metal vias extend through the glass coatings where desired to interconnect metal layers of the substrate.

摘要翻译： 电子电路互连系统提供高密度安装在陶瓷芯片载体集成电路器件或其他射束引线，双列直插式（DIP），带自动键合（TAB），倒装芯片或直接安装的直流电。 在具有高散热特性的经济，尺寸稳定的互连基板上具有引线接合互连件的装置等。 衬底具有熔合到蚀刻金属图案上并且相对于金属图案成比例的玻璃成分，使得衬底的热膨胀特性对应于直流电的那些。 保持i.c.之间的债券完整性的设备。 引线和电路路径，使基板具有足够的散热特性，以允许高密度直流电。 安装。 这些基板在被选择厚度的多金属层压金属板中的蚀刻图案中包含电路路径，器件安装焊盘，边缘端子，引脚安装孔和其它典型的衬底特征，其在一侧或两侧上用与玻璃板熔合的玻璃料一起涂覆。 在需要多于一层的基材的情况下，玻璃涂覆的板堆叠，销钉安装孔等对齐，并且玻璃涂层熔合在一起。 金属通孔在需要时延伸穿过玻璃涂层以互连基底的金属层。

公开(公告)号：US4430365A

公开(公告)日：1984-02-07

申请号：US400800

申请日：1982-07-22

申请人： Paul M. Schaible ,  John Suierveld

发明人： Paul M. Schaible ,  John Suierveld

IPC分类号： H01L21/48 ,  H01L23/538 ,  H05K1/03 ,  H05K3/06 ,  H05K3/40 ,  H05K3/46 ,  H01L27/10

CPC分类号： H05K3/4647 ,  H01L21/486 ,  H01L23/5383 ,  H05K3/4605 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/01012 ,  H01L2924/09701 ,  H01L2924/15312 ,  H05K1/0306 ,  H05K2201/0179 ,  H05K2203/0369 ,  H05K2203/0733 ,  H05K3/061

摘要： A multilevel metallurgy is formed on a dielectric body, particularly a multilayer ceramic (MLC) body. The interconnection lines and via studs are formed as an integral structure from a blanket metal layer thus eliminating the interface between the via pad and via stud.

摘要翻译： 在电介质体，特别是多层陶瓷（MLC）体上形成多层次冶金。 互连线和通孔柱形成为从橡皮布金属层的整体结构，从而消除了通孔焊盘和通孔螺柱之间的界面。

公开(公告)号：US4404059A

公开(公告)日：1983-09-13

申请号：US382407

申请日：1982-05-26

申请人： Vladimir I. Livshits ,  Vladimir I. Golovin ,  Vladimir I. Meshkov

发明人： Vladimir I. Livshits ,  Vladimir I. Golovin ,  Vladimir I. Meshkov

IPC分类号： H05K3/40 ,  H05K3/46 ,  C23F1/02 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： H05K3/4092 ,  H05K3/4685 ,  H05K2201/0361 ,  H05K2203/0152 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/0726 ,  Y10T29/49155

摘要： The herein disclosed process comprises forming conductors of desired shape on a substrate comprised of a metal that is selectively etchable with respect to the metal of conductors, such that the conductors are formed on both sides of the substrate and that the conductors have at least one constricted portion at the substrate side opposite to that on which a base will be laminated. Then, the panel base is laminated onto the appropriate side of the substrate, and the substrate metal is etched selectively with respect to the conductor metal through the entire thickness of the substrate until the metal of the latter is fully removed from under the constricted portions only.

摘要翻译： 本文公开的方法包括在由相对于导体金属可选择性地蚀刻的金属构成的衬底上形成所需形状的导体，使得导体形成在衬底的两侧上，并且导体具有至少一个收缩的 在与基底层叠相反的基底侧的部分。 然后，将面板基板层叠到基板的适当侧上，并且通过基板的整个厚度相对于导体金属选择性地蚀刻基板金属，直到基板金属仅在缩小部分下完全去除 。

公开(公告)号：US4385202A

公开(公告)日：1983-05-24

申请号：US191039

申请日：1980-09-25

申请人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

发明人： Thomas S. Spinelli ,  William G. Manns ,  Donald F. Weirauch

IPC分类号： H05K1/18 ,  H01L21/48 ,  H01L23/14 ,  H01L23/538 ,  H05K1/00 ,  H05K1/02 ,  H05K1/03 ,  H05K1/05 ,  H05K3/06 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46 ,  H05K1/09

CPC分类号： H05K3/4641 ,  H01L21/4857 ,  H01L23/142 ,  H01L23/538 ,  H01L23/5383 ,  H05K1/0207 ,  H05K1/053 ,  H05K3/06 ,  H05K3/202 ,  H05K3/4629 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2924/09701 ,  H05K1/0206 ,  H05K1/0306 ,  H05K2201/068 ,  H05K2201/09054 ,  H05K2201/09309 ,  H05K2201/09781 ,  H05K2201/10969 ,  H05K2203/0323 ,  H05K2203/0369 ,  H05K2203/1476 ,  H05K3/429 ,  H05K3/4611

摘要： An electronic circuit interconnection system permitting high density mounting of ceramic chip-carrier integrated circuit devices or other beam-lead, dual-in-line (DIP), tape-automated-bonded (TAB), flip-chip, or direct-mounted i.c. devices with wire-bonded interconnects or the like has economical, dimensionally-stable, interconnection substrate which has high heat dissipating properties. The substrate has glass components which are fused onto etched metal patterns and which are proportioned relative to the metal patterns so that the heat-expansion properties of the substrate correspond to those of the i.c. devices to maintain bond integrity between the i.c. leads and circuit paths on the substrate and so that the substrate has sufficient heat-dissipating properties to permit the high density i.c. mounting. The substrates incorporate circuit paths, device mounting pads, edge terminals, pin mounting holes and other typical substrate features in the etched patterns in multimetal laminated metal plates of selected thickness which are coated on one or both sides with glass frit fused to the plates. Where substrates with more than one layer are desired, glass-coated plates are stacked with pin mounting holes and the like aligned and the glass coatings are fused together. Metal vias extend through the glass coatings where desired to interconnect metal layers of the substrate.

摘要翻译： 一种电子电路互连系统，允许陶瓷芯片载体集成电路器件或其他射束引线，双列直插（DIP），带自动键合（TAB），倒装芯片或直接安装的直流安装的高密度安装。 具有导线接合互连件的装置等具有经济的尺寸稳定的互连基板，其具有高的散热性能。 衬底具有熔合到蚀刻金属图案上并且相对于金属图案成比例的玻璃成分，使得衬底的热膨胀特性对应于直流电的那些。 保持i.c.之间的债券完整性的设备。 引线和电路路径，使基板具有足够的散热特性，以允许高密度直流电。 安装。 这些基板在被选择厚度的多金属层压金属板中的蚀刻图案中包含电路路径，器件安装焊盘，边缘端子，引脚安装孔和其它典型的衬底特征，其在一侧或两侧上用与玻璃板熔合的玻璃料一起涂覆。 在需要多于一层的基材的情况下，玻璃涂覆的板堆叠，销钉安装孔等对齐，并且玻璃涂层熔合在一起。 金属通孔在需要时延伸穿过玻璃涂层以互连基底的金属层。

公开(公告)号：US4372804A

公开(公告)日：1983-02-08

申请号：US250177

申请日：1981-04-02

申请人： Takayoshi Hanabusa ,  Kenji Yamamoto ,  Shinzi Umemoto ,  Keiji Kurosawa ,  Mitsuo Yamashita

发明人： Takayoshi Hanabusa ,  Kenji Yamamoto ,  Shinzi Umemoto ,  Keiji Kurosawa ,  Mitsuo Yamashita

IPC分类号： B32B15/04 ,  B32B15/08 ,  C23F1/00 ,  H05K3/06 ,  H05K3/10 ,  H05K3/20 ,  H05K3/42 ,  H05K3/46 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06 ,  C23F1/02

CPC分类号： H05K3/06 ,  H05K3/20 ,  H05K3/429 ,  H05K2201/09036 ,  H05K2201/09454 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2203/0152 ,  H05K2203/0369 ,  H05K2203/0726 ,  H05K3/064 ,  H05K3/107 ,  H05K3/427 ,  H05K3/4611 ,  Y10S428/902 ,  Y10T29/49128 ,  Y10T29/49146

摘要： The thickness of copper foil at the land formation area of a copper clad laminate of a miniaturized high density circuit is made thicker than the remaining area to assure high reliability of connection between the through hole plating and the land.

摘要翻译： 使小型化高密度电路的覆铜层压板的焊盘形成区域的铜箔的厚度比剩余面积厚，以确保通孔电镀和焊盘之间的连接的高可靠性。

公开(公告)号：US4295184A

公开(公告)日：1981-10-13

申请号：US137449

申请日：1980-04-04

申请人： Joseph A. Roberts

发明人： Joseph A. Roberts

IPC分类号： H05K3/06 ,  H05K3/28 ,  H05K3/30 ,  H05K3/32 ,  H05K3/40 ,  H05K1/18

CPC分类号： H05K3/4092 ,  H05K3/326 ,  H05K2201/0397 ,  H05K2201/1059 ,  H05K2203/0369 ,  H05K3/06 ,  H05K3/062 ,  H05K3/281 ,  H05K3/306

摘要： The present invention provides an apertured circuit board having self-locking terminals which partially cover at least some of the apertures. The terminals, which are integral extensions of the circuit pathways, each include a pair of inwardly disposed generally L-shaped fingers. The terminals are adhesively anchored to the circuit board at the terminal peripheries and are covered in part by a dielectric overlay. The latter also provides environmental protection and electrical insulation to the circuit conductive pathways. The circuit board and integral sockets may be formed by photoimaging and chemical milling techniques.

摘要翻译： 本发明提供了一种具有自锁端子的有孔电路板，其部分地覆盖至少一些孔。 作为电路通路的整体延伸部的端子各自包括一对向内设置的大致L形的手指。 端子在端子周围粘合地锚定到电路板，并且被绝缘覆盖部分覆盖。 后者还为电路导电通路提供环保和电绝缘。 电路板和集成插座可以通过光学成像和化学研磨技术形成。