Method of fabricating cavity capacitor embedded in printed circuit board
    9.
    发明申请
    Method of fabricating cavity capacitor embedded in printed circuit board 审中-公开
    埋入印刷电路板的空腔电容器的制造方法

    公开(公告)号:US20110197409A1

    公开(公告)日:2011-08-18

    申请号:US13064847

    申请日:2011-04-20

    IPC分类号: H01G7/00

    摘要: A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.

    摘要翻译: 一种嵌入在印刷电路板中的空腔电容器的方法,包括分别用作功率层和接地层的两个导电层和放置在两个导电层之间的第一介电层,所述方法包括: 上导电层和除了两个导电层的下导电层之外的第一电介质层,以允许在两个导电层之间形成腔,下导电层假定用作空腔电容器的任一电极; 在所述空腔上堆叠电介质材料以允许在所述空腔中形成具有比所述第一电介质层更低的台阶部分的第二电介质层; 并且在第二电介质层的上部和空腔的侧部上堆叠导电材料,以允许上部导电层用作空腔电容器的另一个电极。