公开(公告)号：US09406636B2

公开(公告)日：2016-08-02

申请号：US14715484

申请日：2015-05-18

申请人： Broadcom Corporation

发明人： Sam Ziqun Zhao ,  Rezaur Rahman Khan

IPC分类号： H01L23/02 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L24/17 ,  H01L21/4853 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/33 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/105 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29007 ,  H01L2224/29012 ,  H01L2224/29014 ,  H01L2224/29015 ,  H01L2224/29035 ,  H01L2224/29036 ,  H01L2224/29078 ,  H01L2224/2919 ,  H01L2224/3012 ,  H01L2224/30131 ,  H01L2224/30141 ,  H01L2224/30179 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/831 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92125 ,  H01L2224/9221 ,  H01L2224/92242 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00

摘要： An integrated circuit (IC) package includes an IC die having a first surface and a second surface opposite of the first surface. The IC package includes first contact members coupled to the second surface of the IC die. The IC package includes a bottom substrate having a first surface and a second surface opposite of the first surface, where the first surface of the bottom substrate is coupled to the second surface of the IC die via the first contact members. The IC package includes an interposer substrate coupled to the first surface of the IC die via an adhesive material, where the adhesive material is disposed on at least a surface of the interposer substrate. The IC package includes second contact members coupled along a periphery of the interposer substrate, where the interposer substrate is coupled to the first surface of the bottom substrate via the second contact members.

公开(公告)号：US09293393B2

公开(公告)日：2016-03-22

申请号：US14175985

申请日：2014-02-07

申请人： BROADCOM CORPORATION

发明人： Kevin Kunzhong Hu ,  Sam Ziqun Zhao ,  Rezaur Rahman Khan ,  Pieter Vorenkamp ,  Sampath K. V. Karikalan ,  Xiangdong Chen

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/50

CPC分类号： H01L25/105 ,  H01L21/50 ,  H01L21/78 ,  H01L23/481 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/24011 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/821 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2224/92133 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/1041 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： An exemplary implementation of the present disclosure includes a stacked package having a top die from a top reconstituted wafer situated over a bottom die from a bottom reconstituted wafer. The top die and the bottom die are insulated from one another by an insulation arrangement. The top die and the bottom die are also interconnected through the insulation arrangement. The insulation arrangement can include a top molding compound that flanks the top die and a bottom molding compound that flanks the bottom die. The top die and the bottom die can be interconnected through at least the top molding compound. Furthermore, the top die and the bottom die can be interconnected through a conductive via that extends within the insulation arrangement.

摘要翻译： 本公开的示例性实施方案包括具有来自位于底部重构晶片的底模上方的顶部重构晶片的顶模的堆叠封装。 顶部模具和底部模具通过绝缘装置彼此绝缘。 顶模和底模也通过绝缘装置互连。 绝缘装置可以包括在顶模侧面的顶部模塑料和位于底模侧面的底部模塑料。 顶部模具和底部模具可以通过至少顶部模塑料相互连接。 此外，顶模和底模可以通过在绝缘装置内延伸的导电通孔相互连接。

公开(公告)号：US20140367854A1

公开(公告)日：2014-12-18

申请号：US13927470

申请日：2013-06-26

申请人： Broadcom Corporation

发明人： Sam Ziqun Zhao ,  Rezaur Rahman Khan

IPC分类号： H01L23/00

CPC分类号： H01L23/49833 ,  H01L23/3142 ,  H01L23/32 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/16 ,  H01L25/18 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19102 ,  H01L2924/19105 ,  H01L2924/3511 ,  H05K1/186 ,  H05K3/4046 ,  H05K3/4688 ,  H05K2201/0218 ,  H05K2201/09609 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/2036 ,  H05K2203/041 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2924/0665 ,  H01L2224/81 ,  H01L2924/00012

摘要： Various examples are provided for interconnection structures for molded IC packages. In one example, among others, an IC package includes a substrate and an interposer. A plurality of conductive elements provide physical and electrical contact between a surface of the substrate and a surface of the interposer. A standoff element disposed between the surfaces of the substrate and interposer provides a minimum spacing between the surfaces of the substrate and interposer. In some implementations, a standoff element is disposed between an IC die disposed on the surface of the substrate and the surface of the interposer. In another example, a method includes coupling conductive elements to a surface of an interposer, attaching a standoff element, coupling the conductive elements to a surface of a substrate, and forming an embedded layer between the interposer and substrate. The standoff element defines a minimum gap between the interposer and the substrate.

摘要翻译： 为模制IC封装的互连结构提供了各种实例。 在一个示例中，其中，IC封装包括基板和插入件。 多个导电元件在基板的表面和插入件的表面之间提供物理和电接触。 设置在基板和插入件的表面之间的间隔元件在基板和插入件的表面之间提供最小的间隔。 在一些实施方案中，支架元件设置在设置在基板的表面上的IC管芯和插入件的表面之间。 在另一示例中，一种方法包括将导电元件耦合到插入件的表面，附接支架元件，将导电元件耦合到基板的表面，以及在插入器和基板之间形成嵌入层。 支座元件限定了插入件和基板之间的最小间隙。

公开(公告)号：US20140151900A1

公开(公告)日：2014-06-05

申请号：US14175985

申请日：2014-02-07

申请人： BROADCOM CORPORATION

发明人： Kevin Kunzhong HU ,  Sam Ziqun Zhao ,  Rezaur Rahman Khan ,  Pieter Vorenkamp ,  Sampath K.V. Karikalan ,  Xiangdong Chen

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L25/105 ,  H01L21/50 ,  H01L21/78 ,  H01L23/481 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/82 ,  H01L24/83 ,  H01L24/92 ,  H01L24/96 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/24011 ,  H01L2224/24146 ,  H01L2224/2919 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/821 ,  H01L2224/83 ,  H01L2224/9202 ,  H01L2224/92133 ,  H01L2224/92144 ,  H01L2224/92244 ,  H01L2224/96 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06548 ,  H01L2225/1041 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2224/82 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： An exemplary implementation of the present disclosure includes a stacked package having a top die from a top reconstituted wafer situated over a bottom die from a bottom reconstituted wafer. The top die and the bottom die are insulated from one another by an insulation arrangement. The top die and the bottom die are also interconnected through the insulation arrangement. The insulation arrangement can include a top molding compound that flanks the top die and a bottom molding compound that flanks the bottom die. The top die and the bottom die can be interconnected through at least the top molding compound. Furthermore, the top die and the bottom die can be interconnected through a conductive via that extends within the insulation arrangement.

摘要翻译： 本公开的示例性实施方案包括具有来自位于底部重构晶片的底模上方的顶部重构晶片的顶模的堆叠封装。 顶部模具和底部模具通过绝缘装置彼此绝缘。 顶模和底模也通过绝缘装置互连。 绝缘装置可以包括在顶模侧面的顶部模塑料和位于底模侧面的底部模塑料。 顶部模具和底部模具可以通过至少顶部模塑料相互连接。 此外，顶模和底模可以通过在绝缘装置内延伸的导电通孔相互连接。

公开(公告)号：US20140061945A1

公开(公告)日：2014-03-06

申请号：US14079356

申请日：2013-11-13

申请人： Broadcom Corporation

发明人： Sam Ziqun Zhao ,  Rezaur Rahman Khan

IPC分类号： H01L23/14

CPC分类号： H01L23/481 ,  H01L21/4857 ,  H01L23/14 ,  H01L23/145 ,  H01L23/147 ,  H01L23/49506 ,  H01L23/49575 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5226 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/97 ,  H01L25/00 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/14183 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/30183 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： The present application discloses various implementations of a semiconductor package including an organic substrate and one or more interposers having through-semiconductor vias (TSVs). Such a semiconductor package may include a contiguous organic substrate having a lower substrate segment including first and second pluralities of lower interconnect pads, the second plurality of lower interconnect pads being disposed in an opening of the lower substrate segment. The contiguous organic substrate may also include an upper substrate segment having an upper width and including first and second pluralities of upper interconnect pads. In addition, the semiconductor package may include at least one interposer having TSVs for electrically connecting the first and second pluralities of lower interconnect pads to the first and second pluralities of upper interconnect pads. The interposer has an interposer width less than the upper width of the upper substrate segment.

摘要翻译： 本申请公开了包括有机衬底和具有贯通半导体通孔（TSV）的一个或多个中介层的半导体封装的各种实施方式。 这种半导体封装可以包括具有包括第一和第二多个下部互连焊盘的下部衬底区段的连续有机衬底，第二多个下部互连焊盘设置在下部衬底段的开口中。 连续的有机衬底还可以包括具有上部宽度并包括第一和第二多个上部互连焊盘的上部衬底区段。 此外，半导体封装可以包括具有TSV的至少一个插入器，用于将第一和第二多个下部互连焊盘电连接到第一和第二多个上部互连焊盘。 插入器具有小于上基板段的上宽度的插入器宽度。

公开(公告)号：US20140035163A1

公开(公告)日：2014-02-06

申请号：US14052466

申请日：2013-10-11

申请人： Broadcom Corporation

发明人： Rezaur Rahman Khan ,  Sam Ziqun Zhao

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L23/12 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L25/105 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/17181 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： An interface substrate is disclosed which includes an interposer having through-semiconductor vias. An upper and a lower organic substrate are further built around the interposer. The disclosed interface substrate enables the continued use of low cost and widely deployed organic substrates for semiconductor packages while providing several advantages. The separation of the organic substrate into upper and lower substrates enables the cost effective matching of fabrication equipment. By providing an opening in one of the organic substrates, one or more semiconductor dies may be attached to exposed interconnect pads coupled to through-semiconductor vias of the interposer, enabling the use of flip chips with high-density microbump arrays and the accommodation of dies with varied bump pitches. By providing the opening specifically in the upper organic substrate, a package-on-package structure with optimized height may also be provided.

摘要翻译： 公开了一种界面衬底，其包括具有贯通半导体通孔的插入件。 进一步围绕插入件构建上部和下部有机衬底。 所公开的接口衬底能够持续使用低成本且广泛部署的用于半导体封装的有机衬底，同时提供若干优点。 将有机基底分离成上下基板能够实现制造设备的成本有效匹配。 通过在一个有机衬底中设置一个开口，一个或多个半导体管芯可以附着到与插入器的通孔半导体连接的暴露的互连焊盘上，使得能够使用具有高密度微型阵列的倒装芯片和模具 具有不同的凸起间距。 通过在上部有机衬底中提供开口，还可以提供具有优化的高度的封装封装结构。

公开(公告)号：US09431370B2

公开(公告)日：2016-08-30

申请号：US14147237

申请日：2014-01-03

申请人： Broadcom Corporation

发明人： Rezaur Rahman Khan ,  Sam Ziqun Zhao

IPC分类号： H01L25/065 ,  H01L21/768 ,  H01L23/528 ,  H01L23/498 ,  H01L21/48 ,  H01L23/48

CPC分类号： H01L25/0655 ,  H01L21/4828 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/768 ,  H01L21/76898 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/48 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/00014

摘要： Systems, apparatuses, and methods provided for semiconductor devices and integrated circuit (IC) packages that include compliant dielectric layers. In a through silicon via interposer or substrate, a compliant dielectric material may be added to a surface of silicon material body to form a compliant dielectric layer. The compliant dielectric layer provides a thermal buffer and a stress buffer for a resulting IC package. The compliant dielectric material may be selected such that the coefficient of thermal expansion of the compliant dielectric material approximately matches the coefficient of thermal expansion of the circuit board on which the IC package is mounted. The compliant dielectric material may be selected such that it has a deformability that is greater than the silicon material body. Multiple sub-layers of compliant dielectric material may be used.

摘要翻译： 为半导体器件和集成电路（IC）封装提供的系统，装置和方法，其包括兼容的电介质层。 在通过硅通孔插入器或衬底中，柔性介电材料可以被添加到硅材料体的表面以形成柔顺的介电层。 柔性电介质层为所得IC封装提供热缓冲器和应力缓冲器。 柔性介电材料可以被选择成使得柔性介电材料的热膨胀系数近似匹配安装有IC封装的电路板的热膨胀系数。 可以选择兼容的介电材料，使得其具有大于硅材料体的可变形性。 可以使用多个顺应介电材料的子层。

公开(公告)号：US09219054B2

公开(公告)日：2015-12-22

申请号：US14147237

申请日：2014-01-03

申请人： Broadcom Corporation

发明人： Rezaur Rahman Khan ,  Sam Ziqun Zhao

IPC分类号： H01L25/065 ,  H01L21/768 ,  H01L23/528 ,  H01L23/498 ,  H01L21/48 ,  H01L23/48

摘要： Systems, apparatuses, and methods provided for semiconductor devices and integrated circuit (IC) packages that include compliant dielectric layers. In a through silicon via interposer or substrate, a compliant dielectric material may be added to a surface of silicon material body to form a compliant dielectric layer. The compliant dielectric layer provides a thermal buffer and a stress buffer for a resulting IC package. The compliant dielectric material may be selected such that the coefficient of thermal expansion of the compliant dielectric material approximately matches the coefficient of thermal expansion of the circuit board on which the IC package is mounted. The compliant dielectric material may be selected such that it has a deformability that is greater than the silicon material body. Multiple sub-layers of compliant dielectric material may be used.

公开(公告)号：US20150303172A1

公开(公告)日：2015-10-22

申请号：US14263718

申请日：2014-04-28

申请人： Broadcom Corporation

发明人： Edward Law ,  Rezaur Rahman Khan ,  Kunzhong (Kevin) Hu

IPC分类号： H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/552 ,  H01L25/00 ,  H01L23/31

CPC分类号： H01L25/0655 ,  H01L21/56 ,  H01L21/561 ,  H01L21/566 ,  H01L21/568 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06558 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/00014 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： Reconstitution techniques for semiconductor packages are provided. One reconstitution technique is used to encapsulate a plurality of semiconductor packages into a single multi-chip module. Solder balls coupled to each package may be partially exposed after reconstitution, which enables the packages to be coupled to another device. Another reconstitution technique is used to couple a plurality of semiconductor packages into a package-on-package module using self-alignment feature(s). The self-alignment feature(s) are exposed solder ball(s) that are included in the bottom package of the package-on-package module. The exposed solder ball(s) serve as a frame of reference to other solder balls that are encapsulated by an encapsulation material. After the location of these other solders balls are determined, through-mold vias may be formed in the encapsulation material at locations corresponding to the other solder balls. The top package of the package-on-package module may then be coupled to the bottom package using these solder balls.

摘要翻译： 提供半导体封装的重构技术。 一种重构技术用于将多个半导体封装封装到单个多芯片模块中。 耦合到每个封装的焊球可以在重构之后被部分暴露，这使得封装能够耦合到另一个器件。 另一种重构技术用于使用自对准特征将多个半导体封装耦合到封装封装模块中。 自对准特征是包装在封装封装模块的底部封装中的暴露的焊球。 暴露的焊球作为被封装材料封装的其它焊球的参考框架。 在确定这些其它焊料球的位置之后，可以在封装材料中在与其它焊球相对应的位置处形成通孔模。 然后可以使用这些焊球将包装封装模块的顶部封装耦合到底部封装。

公开(公告)号：US20140235183A1

公开(公告)日：2014-08-21

申请号：US14260872

申请日：2014-04-24

申请人： Broadcom Corporation

发明人： Sam Ziqun ZHAO ,  Rezaur Rahman Khan

IPC分类号： H01L23/34 ,  H04B1/40 ,  H01L23/50

CPC分类号： H01L23/34 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/50 ,  H01L23/552 ,  H01L24/73 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/3511 ,  H04B1/40 ,  H04B5/0037 ,  H04B5/0068 ,  H04B7/0617 ,  H01L2924/00012 ,  H01L2924/00

摘要： Embodiments of provide an integrated circuit (IC) device. The IC device can include a substrate having first and second opposing surfaces, an IC die electrically coupled to the first surface of the substrate, a plurality of contact members coupled to the first surface of the substrate, and an interposer. The interposer can include a plurality of contact elements located on a first surface thereof, each conductive element being coupled to a respective one of the plurality of contact members, and an antenna formed using a conductive layer of the interposer, the antenna being electrically coupled to the IC die through at least one of the plurality of contact elements and at least one of the plurality of contact members.

摘要翻译： 提供集成电路（IC）装置的实施例。 IC器件可以包括具有第一和第二相对表面的衬底，电连接到衬底的第一表面的IC管芯，耦合到衬底的第一表面的多个接触构件和插入器。 插入器可以包括位于其第一表面上的多个接触元件，每个导电元件耦合到所述多个接触构件中的相应一个，以及使用所述插入器的导电层形成的天线，所述天线电耦合到 所述IC通过所述多个接触元件中的至少一个和所述多个接触构件中的至少一个接合。