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公开(公告)号:US11244917B2
公开(公告)日:2022-02-08
申请号:US16502648
申请日:2019-07-03
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Virendra R. Jadhav , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof
IPC: H01L23/00
Abstract: A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
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公开(公告)号:US10396051B2
公开(公告)日:2019-08-27
申请号:US15405431
申请日:2017-01-13
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Virendra R. Jadhav , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof
IPC: H01L23/00
Abstract: A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
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3.
公开(公告)号:US08910853B2
公开(公告)日:2014-12-16
申请号:US13932070
申请日:2013-07-01
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Alexandre Blander , Peter J. Brofman , Donald W. Henderson , Gareth G. Hougham , Hsichang Liu , Eric D. Perfecto , Srinivasa S.N. Reddy , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof , Julien Sylvestre , Renee L. Weisman
IPC: B23K31/02 , H01L21/44 , B23K35/36 , C22C13/00 , B23K35/02 , B23K35/26 , H01L23/498 , H01B13/00 , H01B1/02 , H05K3/34 , B82Y30/00
CPC classification number: H01B1/02 , B23K35/0244 , B23K35/262 , B23K35/36 , B23K35/3602 , B82Y30/00 , C22C13/00 , H01B13/00 , H01L23/49866 , H01L2924/0002 , H05K3/3436 , H05K3/3463 , H05K2201/0209 , H05K2201/0257 , Y10T29/49117 , H01L2924/00
Abstract: In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder.
Abstract translation: 在本发明的一个实施方案中,将尺寸为1nm至1000nm的惰性纳米尺寸颗粒加入到焊球中。 惰性纳米尺寸颗粒可以包括金属氧化物,金属氮化物,金属碳化物,金属硼化物等。惰性纳米尺寸颗粒可以是单一化合物,或者可以是具有不同材料的涂层的金属材料。 在本发明的另一个实施方案中,将少量与锡形成稳定的高熔点金属间化合物的元素金属添加到焊料球中。 添加的至少一种元素金属与锡形成金属间化合物的沉淀物,其作为细颗粒分散在焊料中。
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4.
公开(公告)号:US20140339699A1
公开(公告)日:2014-11-20
申请号:US14447908
申请日:2014-07-31
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Minhua Lu , Eric D. Perfecto , David J. Russell , Wolfgang Sauter , Krystyna W. Semkow , Thomas A. Wassick
IPC: H01L23/498 , H01L21/768
CPC classification number: H01L23/49816 , H01L21/76843 , H01L21/76885 , H01L23/49866 , H01L2224/11 , H05K1/09 , H05K3/3478 , H05K3/4007 , H05K2201/0338 , H05K2201/0341 , H05K2201/0344 , H05K2201/09745 , H05K2203/041
Abstract: An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer.
Abstract translation: 一种互连结构,其包括其中存在电气部件的基板以及与接触焊盘接触的凸起下冶金(UBM)堆叠,所述凸块冶金(UBM)堆叠存在于所述基板中的所述电气部件。 UBM堆叠包括与接触焊盘直接接触电气部件的金属粘合层,与金属粘附层层直接接触的铜(Cu)种子层,第一镍(Ni)阻挡层, 存在于铜(Cu)种子层的直接接触中,以及存在于第一镍(Ni)阻挡层上的至少一个铜(Cu)导体层和至少一个第二镍(Ni)阻挡层的层状结构。 第二镍(Ni)阻挡层上可能存在焊球。
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5.
公开(公告)号:US09084378B2
公开(公告)日:2015-07-14
申请号:US13829242
申请日:2013-03-14
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Minhua Lu , Eric D. Perfecto , Krystyna W. Semkow , Thomas A. Wassick
CPC classification number: H05K3/4007 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/0558 , H01L2224/05647 , H01L2224/11334 , H01L2224/11849 , H01L2224/13005 , H01L2224/13022 , H01L2224/13111 , H01L2924/12042 , H01L2924/3656 , H05K3/3463 , H05K2201/0338 , H05K2201/09745 , H05K2203/041 , H01L2924/00014 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029 , H01L2924/207 , H01L2924/01074 , H01L2924/00
Abstract: An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer.
Abstract translation: 一种互连结构,其包括其中存在电气部件的基板以及与接触焊盘接触的凸起下冶金(UBM)堆叠,所述凸块冶金(UBM)堆叠存在于所述基板中的所述电气部件。 UBM堆叠包括与接触焊盘直接接触电气部件的金属粘附层,与金属粘附层直接接触的铜(Cu)种子层,存在的第一镍(Ni)阻挡层 与铜(Cu)种子层直接接触,以及存在于第一镍(Ni)阻挡层上的至少一个铜(Cu)导体层和至少一个第二镍(Ni)阻挡层的层状结构。 第二镍(Ni)阻挡层上可能存在焊球。
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6.
公开(公告)号:US20140262458A1
公开(公告)日:2014-09-18
申请号:US13829242
申请日:2013-03-14
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Charles L. Arvin , Minhua Lu , Eric D. Perfecto , Krystyna W. Semkow , Thomas A. Wassick
CPC classification number: H05K3/4007 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05572 , H01L2224/0558 , H01L2224/05647 , H01L2224/11334 , H01L2224/11849 , H01L2224/13005 , H01L2224/13022 , H01L2224/13111 , H01L2924/12042 , H01L2924/3656 , H05K3/3463 , H05K2201/0338 , H05K2201/09745 , H05K2203/041 , H01L2924/00014 , H01L2924/00012 , H01L2924/01047 , H01L2924/01029 , H01L2924/207 , H01L2924/01074 , H01L2924/00
Abstract: An interconnect structure that includes a substrate having an electrical component present therein, and a under-bump metallurgy (UBM) stack that is present in contact with a contact pad to the electrical component that is present in the substrate. The UBM stack includes a metallic adhesion layer that is direct contact with the contact pad to the electrical component, a copper (Cu) seed layer that is in direct contact with the metallic adhesion layer, a first nickel (Ni) barrier layer that is present in direct contact with copper (Cu) seed layer, and a layered structure of at least one copper (Cu) conductor layer and at least one second nickel (Ni) barrier layer present on the first nickel (Ni) barrier layer. A solder ball may be present on second nickel (Ni) barrier layer.
Abstract translation: 一种互连结构,其包括其中存在电气部件的基板以及与接触焊盘接触的凸起下冶金(UBM)堆叠,所述凸块冶金(UBM)堆叠存在于所述基板中的所述电气部件。 UBM堆叠包括与接触焊盘直接接触电气部件的金属粘附层,与金属粘附层直接接触的铜(Cu)种子层,存在的第一镍(Ni)阻挡层 与铜(Cu)种子层直接接触,以及存在于第一镍(Ni)阻挡层上的至少一个铜(Cu)导体层和至少一个第二镍(Ni)阻挡层的层状结构。 第二镍(Ni)阻挡层上可能存在焊球。
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7.
公开(公告)号:US20130284495A1
公开(公告)日:2013-10-31
申请号:US13932070
申请日:2013-07-01
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Alexandre Blander , Peter J. Brofman , Donald W. Henderson , Gareth G. Hougham , Hsichang Liu , Eric D. Perfecto , Srinivasa S.N. Reddy , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof , Julien Sylvestre , Renee L. Weisman
CPC classification number: H01B1/02 , B23K35/0244 , B23K35/262 , B23K35/36 , B23K35/3602 , B82Y30/00 , C22C13/00 , H01B13/00 , H01L23/49866 , H01L2924/0002 , H05K3/3436 , H05K3/3463 , H05K2201/0209 , H05K2201/0257 , Y10T29/49117 , H01L2924/00
Abstract: In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder.
Abstract translation: 在本发明的一个实施方案中,将尺寸为1nm至1000nm的惰性纳米尺寸颗粒加入到焊球中。 惰性纳米尺寸颗粒可以包括金属氧化物,金属氮化物,金属碳化物,金属硼化物等。惰性纳米尺寸颗粒可以是单一化合物,或者可以是具有不同材料的涂层的金属材料。 在本发明的另一个实施方案中,将少量与锡形成稳定的高熔点金属间化合物的元素金属添加到焊料球中。 添加的至少一种元素金属与锡形成金属间化合物的沉淀物,其作为细颗粒分散在焊料中。
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公开(公告)号:US11094657B2
公开(公告)日:2021-08-17
申请号:US16502591
申请日:2019-07-03
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Virendra R. Jadhav , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof
IPC: H01L23/00
Abstract: A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
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公开(公告)号:US09640501B2
公开(公告)日:2017-05-02
申请号:US14526665
申请日:2014-10-29
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Virendra R. Jadhav , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof
IPC: H01L23/00
CPC classification number: H01L24/13 , H01L23/562 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/0401 , H01L2224/05666 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11901 , H01L2224/13005 , H01L2224/13013 , H01L2224/13023 , H01L2224/1308 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13166 , H01L2224/13171 , H01L2224/13184 , H01L2224/13655 , H01L2224/13666 , H01L2224/13671 , H01L2224/13684 , H01L2224/16235 , H01L2224/81815 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/2064 , H01L2924/351 , H01L2924/35121 , H01L2924/37001 , H01L2924/384 , Y10T156/10 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599
Abstract: A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
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公开(公告)号:US11171102B2
公开(公告)日:2021-11-09
申请号:US16250456
申请日:2019-01-17
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Virendra R. Jadhav , Krystyna W. Semkow , Kamalesh K. Srivastava , Brian R. Sundlof
IPC: H01L23/00
Abstract: A multi-layer pillar and method of fabricating the same is provided. The multi-layer pillar is used as an interconnect between a chip and substrate. The pillar has at least one low strength, high ductility deformation region configured to absorb force imposed during chip assembly and thermal excursions.
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