公开(公告)号：US20050023693A1

公开(公告)日：2005-02-03

申请号：US10901868

申请日：2004-07-29

申请人： John Fitzsimmons ,  Stephen Greco ,  Jia Lee ,  Stephen Gates ,  Terry Spooner ,  Matthew Angyal ,  Habib Hichri ,  Theordorus Standaert ,  Glenn Biery

发明人： John Fitzsimmons ,  Stephen Greco ,  Jia Lee ,  Stephen Gates ,  Terry Spooner ,  Matthew Angyal ,  Habib Hichri ,  Theordorus Standaert ,  Glenn Biery

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L21/4763

CPC分类号： H01L21/76832 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/76835 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： An advanced back-end-of-line (BEOL) interconnect structure having a hybrid dielectric is disclosed. The inter-layer dielectric (ILD) for the via level is preferably different from the ILD for the line level. In a preferred embodiment, the via-level ILD is formed of a low-k SiCOH material, and the line-level ILD is formed of a low-k polymeric thermoset material.

摘要翻译： 公开了一种具有混合电介质的高级后端（BEOL）互连结构。 用于通孔电平的层间电介质（ILD）优选地不同于线路电平的ILD。 在优选实施例中，通孔级ILD由低k SiCOH材料形成，并且线级ILD由低k聚合物热固性材料形成。

公开(公告)号：US20070166996A1

公开(公告)日：2007-07-19

申请号：US11306930

申请日：2006-01-17

申请人： Shom Ponoth ,  Steven Chen ,  John Fitzsimmons ,  Terry Spooner

发明人： Shom Ponoth ,  Steven Chen ,  John Fitzsimmons ,  Terry Spooner

IPC分类号： H01L21/4763

CPC分类号： H01L21/76873 ,  H01L21/7688 ,  H01L2221/1089

摘要： Disclosed is a method of making a semiconductor structure, wherein the method includes forming an interlayer dielectric (ILD) layer on a semiconductor layer, forming a conductive plating enhancement layer (PEL) on the ILD, patterning the ILD and PEL, depositing a seed layer into the pattern formed by the ILD and PEL, and then plating copper on the seed layer. The PEL serves to decrease the resistance across the wafer so to facilitate the plating of the copper. The PEL preferably is an optically transparent and conductive layer.

摘要翻译： 公开了一种半导体结构的制造方法，其特征在于，在半导体层上形成层间电介质层（ILD）层，在ILD上形成导电性电镀增强层（PEL），图案化ILD和PEL， 进入由ILD和PEL形成的图案，然后在种子层上镀铜。 PEL用于降低晶片上的电阻，以便于镀铜。 PEL优选是光学透明且导电的层。

公开(公告)号：US20070117342A1

公开(公告)日：2007-05-24

申请号：US11164423

申请日：2005-11-22

申请人： Shyng-Tsong Chen ,  John Fitzsimmons ,  Shom Ponoth ,  Terry Spooner

发明人： Shyng-Tsong Chen ,  John Fitzsimmons ,  Shom Ponoth ,  Terry Spooner

IPC分类号： H01L21/76

CPC分类号： H01L21/32136 ,  H01L21/31116 ,  H01L21/76802 ,  H01L21/7684

摘要： A method comprises depositing a dielectric film layer, a hard mask layer, and a patterned photo resist layer on a substrate. The method further includes selectively etching the dielectric film layer to form sub-lithographic features by reactive ion etch processing and depositing a barrier metal layer and a copper layer. The method further includes etching the barrier metal layer and hard mask layer by gas cluster ion beam (GCIB) processing.

摘要翻译： 一种方法包括在衬底上沉积电介质膜层，硬掩模层和图案化光刻胶层。 该方法还包括通过反应离子蚀刻处理选择性地蚀刻电介质膜层以形成亚光刻特征，并沉积阻挡金属层和铜层。 该方法还包括通过气体簇离子束（GCIB）处理蚀刻阻挡金属层和硬掩模层。

公开(公告)号：US20050116357A1

公开(公告)日：2005-06-02

申请号：US10906189

申请日：2005-02-08

申请人： John Fitzsimmons ,  Stephen Gates ,  Michael Lane ,  Eric Liniger

发明人： John Fitzsimmons ,  Stephen Gates ,  Michael Lane ,  Eric Liniger

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L21/48 ,  H01L21/50 ,  H01L23/00 ,  H01L23/28

CPC分类号： H01L23/564 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method is disclosed of repairing wirebond damage on semiconductor chips such as high speed semiconductor microprocessors, application specific integrated circuits (ASICs), and other high speed integrated circuit devices, particularly devices using low-k dielectric materials. The method involves surface modification using reactive liquids. In a preferred embodiment, the method comprises applying a silicon-containing liquid reagent precursor such as TEOS to the surface of the chip and allowing the liquid reagent to react with moisture to form a solid dielectric plug or film (50) to produce a barrier against moisture ingress, thereby enhancing the temperature/humidity/bias (THB) performance of such semiconductor devices.

摘要翻译： 公开了一种修复半导体芯片（例如高速半导体微处理器，专用集成电路（ASIC））和其它高速集成电路器件（特别是使用低k电介质材料的器件）的引线键合损坏的方法。 该方法涉及使用反应性液体的表面改性。 在优选的实施方案中，该方法包括将诸如TEOS的含硅液体试剂前体施加到芯片的表面，并允许液体试剂与水分反应形成固体电介质塞或膜（50）以产生抵抗 湿度进入，从而提高这种半导体器件的温度/湿度/偏差（THB）性能。

公开(公告)号：US20080079176A1

公开(公告)日：2008-04-03

申请号：US11954966

申请日：2007-12-12

申请人： John Fitzsimmons ,  Stephen Gates ,  Michael Lane ,  Eric Liniger

发明人： John Fitzsimmons ,  Stephen Gates ,  Michael Lane ,  Eric Liniger

IPC分类号： H01L23/49

CPC分类号： H01L23/564 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method is disclosed of repairing wirebond damage on semiconductor chips such as high speed semiconductor microprocessors, application specific integrated circuits (ASICs), and other high speed integrated circuit devices, particularly devices using low-k dielectric materials. The method involves surface modification using reactive liquids. In a preferred embodiment, the method comprises applying a silicon-containing liquid reagent precursor such as TEOS to the surface of the chip and allowing the liquid reagent to react with moisture to form a solid dielectric plug or film (50) to produce a barrier against moisture ingress, thereby enhancing the temperature/humidity/bias (THB) performance of such semiconductor devices.

摘要翻译： 公开了一种修复半导体芯片（例如高速半导体微处理器，专用集成电路（ASIC））和其它高速集成电路器件（特别是使用低k电介质材料的器件）的引线键合损伤的方法。 该方法涉及使用反应性液体的表面改性。 在优选的实施方案中，该方法包括将诸如TEOS的含硅液体试剂前体施加到芯片的表面，并允许液体试剂与水分反应形成固体电介质塞或膜（50）以产生抵抗 湿度进入，从而提高这种半导体器件的温度/湿度/偏差（THB）性能。

公开(公告)号：US20060225212A1

公开(公告)日：2006-10-12

申请号：US11397085

申请日：2006-04-04

申请人： Troy Parson ,  John Fitzsimmons ,  Don Peach ,  Eric Boss

发明人： Troy Parson ,  John Fitzsimmons ,  Don Peach ,  Eric Boss

IPC分类号： A61G7/16

CPC分类号： A61G7/16 ,  A61G5/006 ,  A61G5/1059 ,  A61G5/12 ,  A61G5/128 ,  A61G5/14 ,  A61G7/005 ,  A61G7/012 ,  A61G2200/16

摘要： A support apparatus (10) for use in supporting a person, particularly a bariatric patient. The apparatus (10) is selectively convertible between a seat configuration for supporting the person in a substantially seated position and a table configuration for supporting the person in a substantially prostrate position. The apparatus (10) is both vertically and angularly adjustable in either configuration. The apparatus (10) includes enhanced lateral support provided by telescoping support cylinders (74,76), and substantially automatically retracting foot support portions (50).

摘要翻译： 一种用于支持人，特别是减肥患者的支撑装置（10）。 该装置（10）可选择性地在用于支撑位于大致就座位置的人的座椅构型之间转换，以及用于支撑处于基本上位置的人的桌子构型。 装置（10）在任一构造中均可垂直和角度地调节。 装置（10）包括由伸缩支撑筒（74,76）提供的增强的横向支撑件，并且基本上自动缩回脚部支撑部分（50）。

公开(公告)号：US20050098605A1

公开(公告)日：2005-05-12

申请号：US10702416

申请日：2003-11-06

申请人： Daniel Edelstein ,  John Fitzsimmons ,  Jeffrey Gambino ,  Anthony Stamper

发明人： Daniel Edelstein ,  John Fitzsimmons ,  Jeffrey Gambino ,  Anthony Stamper

IPC分类号： B23K20/00 ,  H01L23/485 ,  B23K37/00

CPC分类号： H01L24/85 ,  B23K20/007 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48463 ,  H01L2224/48609 ,  H01L2224/48611 ,  H01L2224/48644 ,  H01L2224/48709 ,  H01L2224/48711 ,  H01L2224/48744 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85359 ,  H01L2224/85801 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01049 ,  H01L2924/00 ,  H01L2924/00015

摘要： A structure and method for low-pressure wirebonding, reducing the propensity of dielectric material to mechanical failure due to wirebond stress. A low temperature alloy on the surface of a bond pad allows alloy bond formation to occur between the wire and the bond pad at reduced bond pressures and reduced thermal and ultrasonic energies. Preferred alloys include Au—Sn and Au—In. The Au—Sn alloy may be formed over the Cu bond pad, incorporated in an aluminum bond pad stack, or deposited on a bond pad having Ni—Au capping of Cu or Al bond pads.

摘要翻译： 一种用于低压引线键合的结构和方法，降低了由于引线键应力导致的介电材料对机械故障的倾向。 接合焊盘表面上的低温合金允许在降低的接合压力和降低的热和超声能量的情况下在导线和接合焊盘之间形成合金结合。 优选的合金包括Au-Sn和Au-In。 Au-Sn合金可以形成在结合在铝焊盘叠层中的Cu焊盘上，或者沉积在具有Cu或Al键合焊盘的Ni-Au封盖的焊盘上。

公开(公告)号：US20050266698A1

公开(公告)日：2005-12-01

申请号：US10709747

申请日：2004-05-26

申请人： Edward Cooney ,  John Fitzsimmons ,  Jeffrey Gambino ,  Stephen Luce ,  Thomas McDevitt ,  Lee Nicholson ,  Anthony Stamper

发明人： Edward Cooney ,  John Fitzsimmons ,  Jeffrey Gambino ,  Stephen Luce ,  Thomas McDevitt ,  Lee Nicholson ,  Anthony Stamper

IPC分类号： H01L21/31 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/316 ,  H01L21/469 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76831 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02362 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/31695 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76826 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76868

摘要： Methods and structures having pore-closing layers for closing exposed pores in a patterned porous low-k dielectric layer, and optionally a reactive liner on the low-k dielectric. A first reactant is absorbed or retained in exposed pores in the patterned dielectric layer and then a second reactant is introduced into openings such that it enters the exposed pores, while first reactant molecules are simultaneously being outgassed. The second reactant reacts in-situ with the outgassed first reactant molecules at a mouth region of the exposed pores to form the pore-closing layer across the mouth region of exposed pores, while retaining a portion of each pore's porosity to maintain characteristics and properties of the porous low-k dielectric layer. Optionally, the first reactant may be adsorbed onto the low-k dielectric such that upon introduction of the second reactant into the patterned dielectric openings, a reactive liner is also formed on the low-k dielectric.

摘要翻译： 具有闭孔层的方法和结构，用于封闭图案化的多孔低k电介质层中的暴露孔，以及可选地在低k电介质上的反应性衬垫。 第一反应物被吸收或保留在图案化介电层中的暴露孔中，然后将第二反应物引入开口中，使得其进入暴露的孔，同时第一反应物分子同时脱气。 第二反应物与暴露孔的口部区域处的脱气的第一反应物分子原位反应，以形成穿过暴露孔的口部区域的孔闭合层，同时保留每个孔隙的一部分以保持其孔的特性和性质 多孔低k电介质层。 任选地，第一反应物可以被吸附到低k电介质上，使得当将第二反应物引入图案化的电介质开口中时，还在低k电介质上形成反应性衬垫。

公开(公告)号：US20050218504A1

公开(公告)日：2005-10-06

申请号：US10708883

申请日：2004-03-30

申请人： Timothy Dalton ,  John Fitzsimmons ,  Anthony Stamper

发明人： Timothy Dalton ,  John Fitzsimmons ,  Anthony Stamper

IPC分类号： H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L23/14 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/7682 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/31695 ,  H01L23/5222 ,  H01L23/5329 ,  H01L27/14636 ,  H01L2924/0002 ,  H01L2924/00

摘要： In an embodiment of the invention, a dielectric material comprises a matrix of a material selected from the group consisting essentially of organic materials, inorganic materials and organo-silicate materials; a plurality of pores dispersed throughout the matrix; and a gas filling the pores. The gas is selected from the group consisting essentially of inert gases, depositing gases, and breakdown suppressing gases. The filled pore dielectric material is suitably used in a damascene wiring layer. In further embodiments, a plasma device comprises an integrated circuit (IC) chip substrate; at least one dielectric layer having a thickness on a surface of the substrate, a cavity formed in the dielectric layer, at least two electrodes disposed in the cavity; and a plasma gas filling the cavity. The plasma device can operate as a light source or as a switch.

摘要翻译： 在本发明的一个实施方案中，电介质材料包括选自基本上由有机材料，无机材料和有机硅酸盐材料组成的组的基体; 分散在整个基质中的多个孔; 和填充孔的气体。 气体选自基本上由惰性气体，沉积气体和击穿抑制气体组成的组。 填充孔介电材料适用于镶嵌布线层。 在另外的实施例中，等离子体器件包括集成电路（IC）芯片衬底; 至少一个介电层，其具有在所述基板的表面上的厚度，在所述介电层中形成的空腔，设置在所述空腔中的至少两个电极; 以及填充空腔的等离子体气体。 等离子体装置可以作为光源或开关操作。

公开(公告)号：US20050112861A1

公开(公告)日：2005-05-26

申请号：US10722704

申请日：2003-11-25

申请人： John Fitzsimmons ,  Jeffrey Gambino ,  Erick Walton

发明人： John Fitzsimmons ,  Jeffrey Gambino ,  Erick Walton

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L24/85 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85345 ,  H01L2224/85365 ,  H01L2224/85385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015

摘要： An intermediate semiconductor structure and method for low-pressure wire bonding that reduces the propensity of dielectric material to mechanical failure due to any wire bonding stresses. Roughened surfaces such as metal pillars or metal dendrites are provided on a bonding pad, bonding wire or both. These roughened surfaces increase reactivity between the bond wire and the bond pad to form strong bonds. This increased activity as a result of the roughened bonding pad and/or wire surfaces reduce the amount of pressure, temperature and energy required for wire bonding, which in turn, avoids damage to the bonding pad as well as the semiconductor substrate.

摘要翻译： 用于低压引线接合的中间半导体结构和方法，其降低由于任何引线键合应力引起的介电材料对机械故障的倾向。 在焊盘，接合线或两者上设置诸如金属柱或金属枝晶的粗化表面。 这些粗糙表面增加了接合线和接合焊盘之间的反应性，以形成强键。 由于粗糙的焊盘和/或线表面的结果，这种增加的活性减少了引线接合所需的压力，温度和能量的量，这进而避免了对焊盘以及半导体衬底的损坏。