公开(公告)号：US06215182B1

公开(公告)日：2001-04-10

申请号：US09531232

申请日：2000-03-20

申请人： Kaname Ozawa ,  Hayato Okuda ,  Ryuji Nomoto ,  Yuji Akashi ,  Katsuro Hiraiwa

发明人： Kaname Ozawa ,  Hayato Okuda ,  Ryuji Nomoto ,  Yuji Akashi ,  Katsuro Hiraiwa

IPC分类号： H01L2334

CPC分类号： H01L24/85 ,  H01L23/3128 ,  H01L23/49575 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/4847 ,  H01L2224/48479 ,  H01L2224/48799 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85009 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A semiconductor device includes the first through third semiconductor devices which are stacked on a substrate and the first through third wires for connecting the semiconductor elements and the substrate. The first wires serve to connect electrodes of the first semiconductor element positioned uppermost and electrodes of the second semiconductor element. The second wires serve to connect the electrodes of the second semiconductor element and electrodes of the third semiconductor element. The third wires serve to connect the electrodes of the third semiconductor element and bonding pads of the substrate. Between the first wires and the electrodes of the second semiconductor element and between the second wires and the electrodes of the third semiconductor element, stud bumps are provided so as to form space therebetween, thereby avoiding short-circuits therebetween.

摘要翻译： 半导体器件包括层叠在基板上的第一至第三半导体器件以及用于连接半导体元件和基板的第一至第三布线。 第一导线用于连接位于最上面的第一半导体元件的电极和第二半导体元件的电极。 第二导线用于连接第二半导体元件的电极和第三半导体元件的电极。 第三导线用于连接第三半导体元件的电极和基板的焊盘。 在第一导线与第二半导体元件的电极之间以及第二导线与第三半导体元件的电极之间，设置柱形凸块，以在它们之间形成空间，从而避免它们之间的短路。

公开(公告)号：US06621169B2

公开(公告)日：2003-09-16

申请号：US09940625

申请日：2001-08-29

申请人： Katsuhito Kikuma ,  Mitsutaka Ikeda ,  Yoshihiro Tsukidate ,  Yuji Akashi ,  Kaname Ozawa ,  Akira Takashima ,  Tadashi Uno ,  Takao Nishimura ,  Fumihiko Ando ,  Hiroshi Onodera ,  Hayato Okuda

发明人： Katsuhito Kikuma ,  Mitsutaka Ikeda ,  Yoshihiro Tsukidate ,  Yuji Akashi ,  Kaname Ozawa ,  Akira Takashima ,  Tadashi Uno ,  Takao Nishimura ,  Fumihiko Ando ,  Hiroshi Onodera ,  Hayato Okuda

IPC分类号： H01L2358

CPC分类号： H01L25/0652 ,  H01L23/3121 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.

公开(公告)号：US06316838B1

公开(公告)日：2001-11-13

申请号：US09531231

申请日：2000-03-20

申请人： Kaname Ozawa ,  Hayato Okuda ,  Tetsuya Hiraoka ,  Mitsutaka Sato ,  Yuji Akashi ,  Akira Okada ,  Masahiko Harayama

发明人： Kaname Ozawa ,  Hayato Okuda ,  Tetsuya Hiraoka ,  Mitsutaka Sato ,  Yuji Akashi ,  Akira Okada ,  Masahiko Harayama

IPC分类号： H01L2348

CPC分类号： H01L24/85 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/49429 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85051 ,  H01L2224/85181 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/10161 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2224/48471 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/2075 ,  H01L2924/20754 ,  H01L2224/05599 ,  H01L2224/4554

摘要： A semiconductor device includes a substrate provided with a plurality of leads, a face-down semiconductor element provided on one surface of the substrate, a first stacked semiconductor element and a second stacked semiconductor element provided on another surface of the substrate and connected to the substrate by wires, and an extended wiring mechanism for connecting electrodes of the face-down semiconductor element and electrodes of the first and second semiconductor elements. The connected electrodes are equi-electrodes whose electrical characteristics are equal.

摘要翻译： 半导体器件包括设置有多个引线的衬底，设置在衬底的一个表面上的面向下半导体元件，设置在衬底的另一个表面上并连接到衬底的第一堆叠半导体元件和第二堆叠半导体元件 以及用于连接面朝下半导体元件的电极和第一和第二半导体元件的电极的延长布线机构。 连接的电极是电特性相等的等电极。

公开(公告)号：US07251801B2

公开(公告)日：2007-07-31

申请号：US11019156

申请日：2004-12-23

申请人： Kaname Ozawa ,  Mitsutaka Sato ,  Tetsuya Fujisawa ,  Yoshiyuki Yoneda ,  Ryuji Nomoto ,  Yoshitaka Aiba

发明人： Kaname Ozawa ,  Mitsutaka Sato ,  Tetsuya Fujisawa ,  Yoshiyuki Yoneda ,  Ryuji Nomoto ,  Yoshitaka Aiba

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  H05K3/0005

摘要： A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

摘要翻译： 一种能够高效率地绘制高密度导线的电路板的设计方法。 大鼠巢通过连接电子装置的端子的连接垫和通过线路的外部连接端子形成。 然后选择大鼠巢线密度最高的区域，并且在具有最大密度的大鼠巢的区域中设置与导线的路线和尺寸相关的设计规则。 然后将导体线放置在具有最高密度的大鼠巢的区域，并且确定导线是否可以放置在具有最大密度的大鼠巢的密度的区域。 如果导体线不能铺设，则设计规则和布线的设置，如果可以铺设导体线，则通过设定的规则布置其余区域的导体线。

公开(公告)号：US20060040532A1

公开(公告)日：2006-02-23

申请号：US11019156

申请日：2004-12-23

申请人： Kaname Ozawa ,  Mitsutaka Sato ,  Tetsuya Fujisawa ,  Yoshiyuki Yoneda ,  Ryuji Nomoto ,  Yoshitaka Aiba

发明人： Kaname Ozawa ,  Mitsutaka Sato ,  Tetsuya Fujisawa ,  Yoshiyuki Yoneda ,  Ryuji Nomoto ,  Yoshitaka Aiba

IPC分类号： H01R13/648

CPC分类号： G06F17/5068 ,  H05K3/0005

摘要： A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

摘要翻译： 一种能够高效率地绘制高密度导线的电路板的设计方法。 大鼠巢通过连接电子装置的端子的连接垫和通过线路的外部连接端子形成。 然后选择大鼠巢线密度最高的区域，并且在具有最大密度的大鼠巢的区域中设置与导线的路线和尺寸相关的设计规则。 然后将导体线放置在具有最高密度的大鼠巢的区域，并且确定导线是否可以放置在具有最大密度的大鼠巢的密度的区域。 如果导体线不能铺设，则设计规则和布线的设置，如果可以铺设导线，则通过设定的规则布置其余区域的导体线。

公开(公告)号：US06777799B2

公开(公告)日：2004-08-17

申请号：US10623490

申请日：2003-07-22

申请人： Katsuhito Kikuma ,  Mitsutaka Ikeda ,  Yoshihiro Tsukidate ,  Yuji Akashi ,  Kaname Ozawa ,  Akira Takashima ,  Takao Nishimura

发明人： Katsuhito Kikuma ,  Mitsutaka Ikeda ,  Yoshihiro Tsukidate ,  Yuji Akashi ,  Kaname Ozawa ,  Akira Takashima ,  Takao Nishimura

IPC分类号： H01L2302

CPC分类号： H01L25/0652 ,  H01L23/3121 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01058 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.

公开(公告)号：US20070001298A1

公开(公告)日：2007-01-04

申请号：US11508289

申请日：2006-08-23

申请人： Kaname Ozawa ,  Mitsutaka Sato ,  Yoshiyuki Yoneda

发明人： Kaname Ozawa ,  Mitsutaka Sato ,  Yoshiyuki Yoneda

IPC分类号： H01L23/34

CPC分类号： H01L24/49 ,  H01L23/50 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85191 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00015

摘要： A semiconductor device of the invention includes a substrate in which a power-supply electrode and a ground electrode are provided. A first semiconductor chip is disposed over the substrate and has a first conductor layer formed on a surface facing a second semiconductor chip. A second conductor layer is disposed over the first semiconductor chip and has a second conductor layer formed on a surface facing the first semiconductor chip. And an adhesive layer is disposed between the first conductor layer and the second conductor layer and bonds together the first semiconductor chip and the second semiconductor chip. In the semiconductor device, the adhesive layer and the first and second conductor layers function as a capacitor.

摘要翻译： 本发明的半导体器件包括其中设置有电源电极和接地电极的基板。 第一半导体芯片设置在衬底上并且具有形成在面向第二半导体芯片的表面上的第一导体层。 第二导体层设置在第一半导体芯片的上方，并且具有形成在面向第一半导体芯片的表面上的第二导体层。 并且粘合剂层设置在第一导体层和第二导体层之间并且将第一半导体芯片和第二半导体芯片接合在一起。 在半导体器件中，粘合剂层和第一和第二导体层用作电容器。

公开(公告)号：US07138723B2

公开(公告)日：2006-11-21

申请号：US11006664

申请日：2004-12-08

申请人： Kazuyuki Aiba ,  Akira Takashima ,  Kaname Ozawa ,  Tetsuya Hiraoka ,  Takaaki Suzuki ,  Yasurou Matsuzaki

发明人： Kazuyuki Aiba ,  Akira Takashima ,  Kaname Ozawa ,  Tetsuya Hiraoka ,  Takaaki Suzuki ,  Yasurou Matsuzaki

IPC分类号： H01L23/31 ,  H01L25/065 ,  H01L29/06 ,  H01L23/28 ,  H01L29/02

CPC分类号： H01L29/0657 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L25/065 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/3511

摘要： A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.

摘要翻译： 通过在其表面上形成的涂层材料将半导体芯片固定成大致圆柱形状的状态。 变形的半导体芯片倒装芯片连接到插入器并用密封树脂密封到插入器上。 焊球作为外部端子设置在插入器的另一侧。

公开(公告)号：US08097954B2

公开(公告)日：2012-01-17

申请号：US11508289

申请日：2006-08-23

申请人： Kaname Ozawa ,  Mitsutaka Sato ,  Yoshiyuki Yoneda

发明人： Kaname Ozawa ,  Mitsutaka Sato ,  Yoshiyuki Yoneda

IPC分类号： H01L23/58

CPC分类号： H01L24/49 ,  H01L23/50 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/48465 ,  H01L2224/4903 ,  H01L2224/4911 ,  H01L2224/49171 ,  H01L2224/4945 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85191 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00015

摘要： A semiconductor device of the invention includes a substrate in which a power-supply electrode and a ground electrode are provided. A first semiconductor chip is disposed over the substrate and has a first conductor layer formed on a surface facing a second semiconductor chip. A second conductor layer is disposed over the first semiconductor chip and has a second conductor layer formed on a surface facing the first semiconductor chip. And an adhesive layer is disposed between the first conductor layer and the second conductor layer and bonds together the first semiconductor chip and the second semiconductor chip. In the semiconductor device, the adhesive layer and the first and second conductor layers function as a capacitor.

摘要翻译： 本发明的半导体器件包括其中设置有电源电极和接地电极的基板。 第一半导体芯片设置在衬底上并且具有形成在面向第二半导体芯片的表面上的第一导体层。 第二导体层设置在第一半导体芯片的上方，并且具有形成在面向第一半导体芯片的表面上的第二导体层。 并且粘合剂层设置在第一导体层和第二导体层之间并且将第一半导体芯片和第二半导体芯片接合在一起。 在半导体器件中，粘合剂层和第一和第二导体层用作电容器。

公开(公告)号：US20050082684A1

公开(公告)日：2005-04-21

申请号：US11006664

申请日：2004-12-08

申请人： Kazuyuki Aiba ,  Akira Takashima ,  Kaname Ozawa ,  Tetsuya Hiraoka ,  Takaaki Suzuki ,  Yasurou Matsuzaki

发明人： Kazuyuki Aiba ,  Akira Takashima ,  Kaname Ozawa ,  Tetsuya Hiraoka ,  Takaaki Suzuki ,  Yasurou Matsuzaki

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H01L23/433 ,  H01L25/065 ,  H01L27/118 ,  H01L29/06 ,  H01L21/48 ,  H01L23/52

CPC分类号： H01L29/0657 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L25/065 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/01079 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/3511

摘要： A semiconductor chip is secured in a state deformed into a substantially cylinder shape by a coating material formed on its surface. The deformed semiconductor chip is flip-chip connected to an interposer and sealed with sealing resin onto the interposer. Solder balls are provided, as external terminals, on the other side of the interposer.

摘要翻译： 通过在其表面上形成的涂层材料将半导体芯片固定成大致圆柱形状的状态。 变形的半导体芯片倒装芯片连接到插入器并用密封树脂密封到插入器上。 焊球作为外部端子设置在插入器的另一侧。