Field-effect transistor and method for manufacturing the same
    1.
    发明授权
    Field-effect transistor and method for manufacturing the same 有权
    场效应晶体管及其制造方法

    公开(公告)号:US08871567B2

    公开(公告)日:2014-10-28

    申请号:US13641793

    申请日:2011-12-19

    摘要: The present invention achieves a formation of a metal oxide film of a thin film transistor with a simplified process. The present invention is concerned with a method for manufacturing a field-effect transistor comprising a gate electrode, a source electrode, a drain electrode, a channel layer and a gate insulating layer wherein the channel layer is formed by using a metal salt-containing composition comprising a metal salt, a polyvalent carboxylic acid having a cis-form structure of —C(COOH)═C(COOH)—, an organic solvent and a water wherein a molar ratio of the polyvalent carboxylic acid to the metal salt is in the range of 0.5 to 4.0.

    摘要翻译: 本发明通过简化的工艺实现了薄膜晶体管的金属氧化物膜的形成。 本发明涉及一种制造场效应晶体管的方法,该场效应晶体管包括栅电极,源电极,漏电极,沟道层和栅极绝缘层,其中通过使用含金属盐的组合物形成沟道层 包括金属盐,具有-C(COOH)= C(COOH) - 的顺式结构的多元羧酸,有机溶剂和水,其中多价羧酸与金属盐的摩尔比为 范围为0.5至4.0。

    FIELD-EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
    2.
    发明申请
    FIELD-EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
    场效应晶体管及其制造方法

    公开(公告)号:US20130032797A1

    公开(公告)日:2013-02-07

    申请号:US13641793

    申请日:2011-12-19

    IPC分类号: H01L21/336 H01L29/786

    摘要: The present invention achieves a formation of a metal oxide film of a thin film transistor with a simplified process. The present invention is concerned with a method for manufacturing a field-effect transistor comprising a gate electrode, a source electrode, a drain electrode, a channel layer and a gate insulating layer wherein the channel layer is formed by using a metal salt-containing composition comprising a metal salt, a polyvalent carboxylic acid having a cis-form structure of —C(COOH)═C(COOH)—, an organic solvent and a water wherein a molar ratio of the polyvalent carboxylic acid to the metal salt is in the range of 0.5 to 4.0.

    摘要翻译: 本发明通过简化的工艺实现了薄膜晶体管的金属氧化物膜的形成。 本发明涉及一种制造场效应晶体管的方法,该场效应晶体管包括栅电极,源电极,漏电极,沟道层和栅极绝缘层,其中通过使用含金属盐的组合物形成沟道层 包括金属盐,具有-C(COOH)= C(COOH) - 的顺式结构的多元羧酸,有机溶剂和水,其中多价羧酸与金属盐的摩尔比为 范围为0.5至4.0。

    Manufacturing method of flexible semiconductor device and flexible semiconductor device
    6.
    发明授权
    Manufacturing method of flexible semiconductor device and flexible semiconductor device 有权
    柔性半导体器件和柔性半导体器件的制造方法

    公开(公告)号:US07977741B2

    公开(公告)日:2011-07-12

    申请号:US12939729

    申请日:2010-11-04

    IPC分类号: H01L29/786

    摘要: A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.

    摘要翻译: 制备形成有第一金属层23,第二金属层25和介于其间的无机绝缘层35的三层复合箔的分层膜。 在第二金属层25被部分蚀刻以形成栅电极20g之后,第一金属层23被部分蚀刻以在对应于栅电极20g的区域中形成源/漏电极20s,20d。 然后,将半导体层40形成为与源极/漏极20s,20d接触并且在栅极电极20g上形成有绝缘层35。 栅电极20g上的无机绝缘层35用作栅极绝缘膜30,无机绝缘层35上的源/漏电极20s,20d之间的半导体层40用作沟道。

    Manufacturing method of flexible semiconductor device and flexible semiconductor device
    7.
    发明授权
    Manufacturing method of flexible semiconductor device and flexible semiconductor device 有权
    柔性半导体器件和柔性半导体器件的制造方法

    公开(公告)号:US07851281B2

    公开(公告)日:2010-12-14

    申请号:US12518602

    申请日:2008-10-01

    IPC分类号: H01L21/336

    摘要: A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.

    摘要翻译: 制备形成有第一金属层23,第二金属层25和介于其间的无机绝缘层35的三层复合箔的分层膜。 在第二金属层25被部分蚀刻以形成栅电极20g之后,第一金属层23被部分蚀刻以在对应于栅电极20g的区域中形成源/漏电极20s,20d。 然后,将半导体层40形成为与源极/漏极20s,20d接触并且在栅极电极20g上形成有绝缘层35。 栅电极20g上的无机绝缘层35用作栅极绝缘膜30,无机绝缘层35上的源/漏电极20s,20d之间的半导体层40用作沟道。