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公开(公告)号:US20150054099A1
公开(公告)日:2015-02-26
申请号:US13975359
申请日:2013-08-25
CPC分类号: H01L21/56 , G01L19/147 , H01L21/50 , H01L23/24 , H01L23/49541 , H01L23/49548 , H01L23/49575 , H01L2224/2919 , H01L2224/32145 , H01L2224/32245 , H01L2224/48091 , H01L2224/48145 , H01L2224/48247 , H01L2224/73265 , H01L2224/83855 , H01L2924/16315 , H01L2924/1815 , H01L2924/00014 , H01L2924/00012 , H01L2924/00011 , H01L2924/0665
摘要: A semiconductor sensor device is assembled using a pre-molded lead frame having first and second die flags. The first die flag includes a cavity. A pressure sensor die (P-cell) is mounted within the cavity and a master control unit die (MCU) is mounted to the second flag. The P-cell and MCU are electrically connected to leads of the lead frame with bond wires. The die attach and wire bonding steps are each done in a single pass. A mold pin is placed over the P-cell and then the MCU is encapsulated with a mold compound. The mold pin is removed leaving a recess that is next filled with a gel material. Finally a lid is placed over the P-cell and gel material. The lid includes a hole that that exposes the gel-covered active region of the pressure sensor die to ambient atmospheric pressure outside the sensor device.
摘要翻译: 使用具有第一和第二管芯标记的预模制引线框组装半导体传感器装置。 第一个模具标志包括一个空腔。 压力传感器管芯(P-cell)安装在腔内,并且主控单元管芯(MCU)安装到第二标志上。 P单元和MCU通过接合线电连接到引线框架的引线。 芯片连接和引线键合步骤都是单次完成的。 模具销放置在P型电池上,然后用模具化合物封装MCU。 去除模具销,留下下一个填充有凝胶材料的凹槽。 最后将盖子放置在P细胞和凝胶材料上。 盖子包括孔,该孔将压力传感器芯片的凝胶覆盖的有源区域暴露于传感器装置外部的环境大气压力。
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公开(公告)号:US07985672B2
公开(公告)日:2011-07-26
申请号:US11946056
申请日:2007-11-28
申请人: Poh Leng Eu , Lan Chu Tan , Cheng Qiang Cui
发明人: Poh Leng Eu , Lan Chu Tan , Cheng Qiang Cui
IPC分类号: H01L21/44
CPC分类号: H05K3/3478 , B23K35/001 , B23K35/007 , H01L24/11 , H01L24/13 , H01L2224/03828 , H01L2224/0401 , H01L2224/1112 , H01L2224/1133 , H01L2224/11334 , H01L2224/11849 , H01L2224/11901 , H01L2224/13076 , H01L2224/131 , H01L2224/13124 , H01L2224/13147 , H01L2224/13582 , H01L2224/13644 , H01L2224/13655 , H01L2924/00013 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/3841 , H05K3/3436 , H05K2201/10242 , H05K2203/041 , H05K2203/043 , Y02P70/613 , Y10T29/49213 , H01L2924/00014 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00
摘要: A method of attaching a solder ball to a bonding pad includes disposing flux on the bonding pad, attaching a conductive metal ring to the pad using the flux, and placing the solder ball in the ring. A reflow operation is performed that secures the ring to the pad and melts the solder ball into and around the ring. A solder joint is formed between solder ball and the pad, with the ring secured within the ball. Use of the ring allows for higher stand-off height to be achieved with similar solder ball size, without having to use bigger ball size as in the conventional method, which causes solder ball bridging. With higher stand-off height, better board level reliability performance can be obtained.
摘要翻译: 将焊球附接到焊盘的方法包括在焊盘上设置焊剂,使用焊剂将导电金属环附接到焊盘,并将焊球放置在环中。 执行回流操作,其将环固定到焊盘并将焊球熔化到环中和环周围。 在焊球和焊盘之间形成焊接接头,其中环固定在球内。 使用环允许以类似的焊球尺寸实现更高的间隔高度,而不需要像常规方法那样使用更大的球尺寸,这导致焊球桥接。 具有较高的间隔高度,可以获得更好的板级可靠性性能。
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公开(公告)号:US20110084411A1
公开(公告)日:2011-04-14
申请号:US12577731
申请日:2009-10-13
申请人: Poh Leng Eu , Lan Chu Tan
发明人: Poh Leng Eu , Lan Chu Tan
IPC分类号: H01L23/28
CPC分类号: H01L23/3142 , H01L23/293 , H01L23/3171 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor die has a polyimide layer disposed on its top surface. At the corners of the die top, the polyimide layer is roughened or patterned, but not enough such that the die top is exposed. The patterned corners enhance adhesion of a mold compound later disposed on the die top by allowing for enhanced hydrogen bonding between the polyimide layer and the mold compound.
摘要翻译: 半导体管芯具有设置在其顶表面上的聚酰亚胺层。 在模具顶部的角部,聚酰亚胺层被粗糙化或图案化,但是不足以使得模具顶部暴露。 图案化的角部通过允许聚酰亚胺层和模制化合物之间的氢键的增强而增强后面配置在模具顶部上的模具化合物的附着力。
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公开(公告)号:US20110059579A1
公开(公告)日:2011-03-10
申请号:US12554992
申请日:2009-09-08
申请人: Poh Leng Eu , Lan Chu Tan , Cheng Qiang Cui
发明人: Poh Leng Eu , Lan Chu Tan , Cheng Qiang Cui
IPC分类号: H01L21/50
CPC分类号: H01L21/6835 , H01L21/568 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2224/32225 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83907 , H01L2924/00014 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/18165 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: A method of forming a semiconductor package including providing a substrate having a through hole formed therein. A tape is attached to a surface of the substrate such that the through hole is covered by the tape. An integrated circuit (IC) die is attached to the tape. The IC die is electrically connected to the substrate via a plurality of electrical connections. The IC die and the electrical connections are encapsulated and the tape is removed from the substrate.
摘要翻译: 一种形成半导体封装的方法,包括提供其中形成有通孔的衬底。 胶带附着在基材的表面上,使得通孔被带覆盖。 集成电路(IC)裸片连接在磁带上。 IC芯片通过多个电连接与基板电连接。 封装IC芯片和电气连接,并从基板上取下胶带。
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公开(公告)号:US20160064356A1
公开(公告)日:2016-03-03
申请号:US14474294
申请日:2014-09-01
IPC分类号: H01L25/065 , H01L23/498 , H01L21/768 , H01L23/00 , H01L21/48
CPC分类号: H01L25/0657 , H01L21/4853 , H01L21/486 , H01L21/6835 , H01L21/76877 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L23/5384 , H01L23/5385 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2221/68345 , H01L2221/68381 , H01L2224/03602 , H01L2224/131 , H01L2224/13144 , H01L2224/13147 , H01L2224/16227 , H01L2224/32245 , H01L2224/73253 , H01L2224/81005 , H01L2224/81801 , H01L2224/8185 , H01L2224/83424 , H01L2224/83447 , H01L2224/92 , H01L2924/18161 , H01L2924/351 , H01L2924/3512 , H01L2924/381 , H01L2924/014 , H01L2924/00014 , H01L2224/81 , H01L21/565 , H01L21/304 , H01L2224/83
摘要: A method of making an integrated circuit package, such as a ball grid array, includes providing a flexible tape that has first and second sets of bond pads on respective first and second surfaces thereof. A carrier is attached to the first surface of the flexible tape. Then conductive pillars are formed on the second set of bond pads and an intermediate layer of polymeric compound is deposited on the second surface of the flexible tape. After the compound has cured, a surface of the intermediate layer is ground to expose ends of the conductive pillars to form a sub-assembly comprising the flexible tape and the intermediate layer. Then the carrier is removed from the sub-assembly, thereby creating an interposer. The interposer is attached to a substrate and at least one die is attached to the interposer.
摘要翻译: 制造诸如球栅阵列的集成电路封装的方法包括提供在其相应的第一和第二表面上具有第一组和第二组接合焊盘的柔性带。 载体附接到柔性带的第一表面。 然后在第二组接合焊盘上形成导电柱,并且在柔性带的第二表面上沉积聚合物化合物的中间层。 在化合物固化之后,研磨中间层的表面以暴露导电柱的端部以形成包括柔性带和中间层的子组件。 然后从子组件移除载体,从而形成插入件。 插入器附接到衬底,并且至少一个管芯附接到插入器。
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公开(公告)号:US08853058B2
公开(公告)日:2014-10-07
申请号:US13530117
申请日:2012-06-22
IPC分类号: H01L21/00
CPC分类号: H01L21/561 , H01L21/486 , H01L21/568 , H01L23/142 , H01L23/3128 , H01L23/3735 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L24/97 , H01L25/105 , H01L2224/12105 , H01L2224/16225 , H01L2224/73267 , H01L2224/9222 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/12042 , H01L2924/181 , H01L2224/83 , H01L2924/00
摘要: A method of assembling semiconductor devices includes providing a structure that includes an array of conductive frame members beside an array of apertures and an array of conductive vias that are exposed at a first face and extend towards a second face. An array of semiconductor dies is positioned in the array of apertures with their active faces positioned in the first face of the structure. The assembly is encapsulated from the second face of the structure and a redistribution layer is formed on the first face of the structure and the active faces of the die. Material is removed from the back face of the encapsulated array to expose the vias at the back face for connection through a further redistribution layer formed on the back face to electronic components stacked vertically on the further redistribution layer.
摘要翻译: 一种组装半导体器件的方法包括提供一种结构,其包括除了孔阵列之外的导电框架构件的阵列和在第一面处暴露并朝向第二面延伸的导电通孔阵列。 一组半导体管芯位于孔阵列中,其主动面位于结构的第一面。 组件从结构的第二面被封装,并且在结构的第一面和模具的有效面上形成再分布层。 从封装阵列的背面去除材料以暴露在背面的通孔,用于通过形成在背面上的另一重新分配层与垂直堆叠在再分布层上的电子部件连接。
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公开(公告)号:US20140206124A1
公开(公告)日:2014-07-24
申请号:US14219011
申请日:2014-03-19
申请人: Jinzhong Yao , Wai Yew Lo , Lan Chu Tan , Xuesong Xu
发明人: Jinzhong Yao , Wai Yew Lo , Lan Chu Tan , Xuesong Xu
IPC分类号: H01L41/25
CPC分类号: H01L41/25 , G01L19/0069 , G01L19/147 , H01L24/97 , H01L2224/48091 , H01L2224/48137 , H01L2224/49171 , H01L2224/49175 , H01L2224/97 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/00014 , H01L2224/85 , H01L2924/00 , H01L2924/00012
摘要: A method of packaging a pressure sensor die includes providing a lead frame having a die pad and lead fingers that surround the die pad. A tape is attached to a first side of the lead frame. A pressure sensor die is attached to the die pad on a second side of the lead frame and bond pads of the die are connected to the lead fingers. An encapsulant is dispensed onto the second side of the lead frame and covers the lead fingers and the electrical connections thereto. A gel is dispensed onto a top surface of the die and covers the die bond pads and the electrical connections thereto. A lid is attached to the lead frame and covers the die and the gel, and sides of the lid penetrate the encapsulant.
摘要翻译: 包装压力传感器管芯的方法包括提供引线框架,其具有围绕管芯焊盘的管芯焊盘和引线指。 带子附接到引线框架的第一侧。 压力传感器芯片在引线框架的第二侧附接到芯片焊盘,并且芯片的焊盘被连接到引线指。 将密封剂分配到引线框架的第二侧上并且覆盖引线指及其电连接。 将凝胶分配到模具的顶表面上并覆盖芯片接合焊盘及其电连接。 盖子连接到引线框架并覆盖模具和凝胶,并且盖的侧面穿透密封剂。
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公开(公告)号:US20120306031A1
公开(公告)日:2012-12-06
申请号:US13118596
申请日:2011-05-31
申请人: Wai Yew Lo , Lan Chu Tan
发明人: Wai Yew Lo , Lan Chu Tan
CPC分类号: H01L21/561 , G01L19/0627 , G01L19/143 , G01L19/147 , H01L21/568 , H01L23/04 , H01L23/24 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2224/131 , H01L2224/13144 , H01L2224/16245 , H01L2224/2919 , H01L2224/32013 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/8321 , H01L2224/83862 , H01L2224/83871 , H01L2224/85013 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2924/181 , H01L2924/0665 , H01L2224/83 , H01L2224/85 , H01L2924/014 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor sensor die is packaged with a footed lid that has side walls and a top portion with a central hole. Gel material is dispensed into a cavity formed by the side walls such that it covers the die prior to attaching the lid top portion.
摘要翻译: 半导体传感器芯片包括具有侧壁的底盖和具有中心孔的顶部部分。 将凝胶材料分配到由侧壁形成的空腔中,使得其在附接盖顶部分之前覆盖模具。
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公开(公告)号:US20070281393A1
公开(公告)日:2007-12-06
申请号:US11421006
申请日:2006-05-30
申请人: Viswanadam Gautham , Lan Chu Tan , Heng Keong Yip
发明人: Viswanadam Gautham , Lan Chu Tan , Heng Keong Yip
IPC分类号: H01L21/60
CPC分类号: H01L21/561 , H01L21/4857 , H01L21/6835 , H01L23/3128 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/85 , H01L24/97 , H01L2221/68377 , H01L2224/16225 , H01L2224/16245 , H01L2224/45144 , H01L2224/48091 , H01L2224/81191 , H01L2224/81801 , H01L2224/85 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/00014 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要: A method of forming a semiconductor package (32) includes etching a conductive sheet (10) to form a first interconnection system (12). An integrated circuit (IC) die (22) is placed on and electrically connected to the first interconnection system (12). Next, a molding operation is performed to encapsulate the IC die (22), the electrical connections (24, 26) and at least a portion of the first interconnection system (12). A portion (20) of the conductive sheet (10) is then removed to expose a surface (30) of the first interconnection system (12). A second interconnection system (34) then is formed over the exposed surface (30) of the first interconnection system (12).
摘要翻译: 形成半导体封装(32)的方法包括蚀刻导电片(10)以形成第一互连系统(12)。 集成电路(IC)管芯(22)放置在电连接到第一互连系统(12)上。 接下来,执行模制操作以封装IC管芯(22),电连接(24,26)和第一互连系统(12)的至少一部分。 然后去除导电片(10)的一部分(20)以暴露第一互连系统(12)的表面(30)。 然后在第一互连系统(12)的暴露表面(30)上形成第二互连系统(34)。
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公开(公告)号:US07042098B2
公开(公告)日:2006-05-09
申请号:US10613703
申请日:2003-07-07
申请人: Fuaida Harun , Liang Jen Koh , Lan Chu Tan
发明人: Fuaida Harun , Liang Jen Koh , Lan Chu Tan
CPC分类号: H01L23/49838 , H01L23/3128 , H01L23/50 , H01L23/544 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L24/85 , H01L2224/05554 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45164 , H01L2224/48091 , H01L2224/48227 , H01L2224/48235 , H01L2224/4917 , H01L2224/49171 , H01L2224/73265 , H01L2224/78 , H01L2224/85 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , Y10T29/49155 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: An integrated circuit is packaged using a package substrate that has a bottom side with a regular array of connection points and a top side with the integrated circuit on it. Vias in the package substrate provide electrical connection between the top and bottom sides. The vias have a via capture pad to which a wire may be wire bonded so that the wires from the IC to the substrate top side directly contact the vias at their capture pads without the need for traces from a top side bond pad to a via. The via capture pad is shaped to include at least one sharp edge to improve the ability of a wirebonder with pattern recognition software to locate the capture pad and place the wire.
摘要翻译: 使用封装基板封装集成电路,该封装基板的底侧具有规则的连接点阵列,顶部具有集成电路。 封装衬底中的通孔提供顶部和底部之间的电连接。 通孔具有通孔捕获垫,导线可以被引线接合到该通孔捕获垫,使得从IC到基板顶侧的导线直接接触它们的捕获垫处的通孔,而不需要从顶侧接合焊盘到通孔的迹线。 通孔捕获垫被成形为包括至少一个锋利边缘,以提高带有图案识别软件的引线键合器定位捕获垫并放置导线的能力。
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