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    Wiring Substrate and Semiconductor Device
    3.
    发明申请
    Wiring Substrate and Semiconductor Device 有权
    接线基板和半导体器件

    公开(公告)号：US20150181703A1

    公开(公告)日：2015-06-25

    申请号：US14548568

    申请日：2014-11-20

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Masato TANAKA ,  Shoji WATANABE ,  Noriyoshi SHIMIZU

    IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

    CPC classification number: H05K1/0298 ,  H01L23/145 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/4644 ,  H05K2201/029 ,  H05K2201/09227 ,  H05K2201/10674 ,  H05K2203/025

    Abstract: A wiring substrate includes first and second wiring structures. The first wiring structure includes a core substrate, first and second insulation layers formed from a thermosetting insulative resin respectively including first and second reinforcement materials, and a via wire formed in the first insulation layer. The second wiring structure includes a third insulation layer formed on an upper surface of the first insulation layer and an upper end surface of the via wire, and a wiring layer extended through the third insulation layer and electrically connected to the via wire. The outermost insulation layer, the main component of which is a photosensitive resin, is stacked on a lower surface of the second insulation layer. The second wiring structure has a higher wiring density than the first wiring structure. The first reinforcement material is partially exposed on the upper surface of the first insulation layer.

    Abstract translation: 布线基板包括第一和第二布线结构。 第一布线结构包括芯基板，由分别包括第一和第二加强材料的热固性绝缘树脂形成的第一绝缘层和第二绝缘层，以及形成在第一绝缘层中的导线。 第二布线结构包括形成在第一绝缘层的上表面上的通孔导线的上表面的第三绝缘层和延伸穿过第三绝缘层并与通孔导线连接的布线层。 其主要成分是感光性树脂的最外层绝缘层层叠在第二绝缘层的下表面上。 第二布线结构具有比第一布线结构更高的布线密度。 第一增强材料部分地暴露在第一绝缘层的上表面上。

    WIRING BOARD AND SEMICONDUCTOR DEVICE
    5.
    发明申请
    WIRING BOARD AND SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230066839A1

    公开(公告)日：2023-03-02

    申请号：US17817110

    申请日：2022-08-03

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Hiroshi TANEDA ,  Noriyoshi SHIMIZU ,  Rie MIZUTANI ,  Masaya TAKIZAWA ,  Yoshiki AKIYAMA

    IPC: H01L23/498 ,  H01L21/48

    Abstract: A wiring board includes an interconnect structure including a plurality of interconnect layers, and a plurality of insulating layers having a photosensitive resin as a main component thereof, and an encapsulating resin layer having a non-photosensitive thermosetting resin as a main component thereof, laminated on an uppermost insulating layer of the plurality of insulating layers. An uppermost interconnect layer of the plurality of interconnect layers includes a pad protruding from the uppermost insulating layer. The encapsulating resin layer exposes an upper surface of the pad, and covers at least a portion of a side surface of the pad, and at least a portion of side surfaces of the plurality of insulating layers. The pad is configured to receive a semiconductor chip to be mounted thereon.

    INTERCONNECT SUBSTRATE
    6.
    发明申请
    INTERCONNECT SUBSTRATE 有权

    公开(公告)号：US20230054390A1

    公开(公告)日：2023-02-23

    申请号：US17817446

    申请日：2022-08-04

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Rie MIZUTANI ,  Noriyoshi SHIMIZU ,  Hiroshi TANEDA ,  Masaya TAKIZAWA ,  Yoshiki AKIYAMA

    IPC: H05K1/11 ,  H05K1/03 ,  H05K3/46

    Abstract: An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.

    WIRING BOARD
    7.
    发明申请
    WIRING BOARD 有权

    公开(公告)号：US20220361331A1

    公开(公告)日：2022-11-10

    申请号：US17660700

    申请日：2022-04-26

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Masaya TAKIZAWA ,  Rie MIZUTANI ,  Hiroshi TANEDA ,  Yoshiki AKIYAMA ,  Noriyoshi SHIMIZU

    IPC: H05K1/11

    Abstract: A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
    10.
    发明申请
    WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
    接线基板及其制造方法

    公开(公告)号：US20140225275A1

    公开(公告)日：2014-08-14

    申请号：US14141765

    申请日：2013-12-27

    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

    Inventor： Noriyoshi SHIMIZU ,  Wataru KANEDA ,  Akio ROKUGAWA ,  Toshinori KOYAMA

    IPC: H01L23/498

    CPC classification number: H01L23/49827 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/76804 ,  H01L23/49822 ,  H01L2224/16238 ,  H01L2224/32225 ,  H01L2224/32227 ,  H01L2224/32235 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2224/16225 ,  H01L2924/00012

    Abstract: A wiring substrate includes, a base wiring substrate including a first wiring layer, a first insulating layer in which the first wiring layer is buried and a first via hole is formed under the first wiring layer, and a second wiring layer formed under the first insulating layer and connected to the first wiring layer through the first via hole, and a re-wiring portion including a second insulating layer formed on the base wiring substrate and having a second via hole formed on the first wiring layer, and a re-wiring layer formed on the second insulating layer and connected to the first wiring layer through the second via hole. The re-wiring layer is formed of a seed layer and a metal plating layer provided on the seed layer, and the seed layer is equal to or wider in width than the metal plating layer.

    Abstract translation: 布线基板包括：基底布线基板，包括第一布线层，第一布线层被埋置的第一绝缘层和在第一布线层下方形成的第一通孔;以及第二布线层，形成在第一绝缘层 并且通过第一通孔连接到第一布线层，以及重新布线部分，其包括形成在基布线基板上并具有形成在第一布线层上的第二通孔的第二绝缘层，以及重新布线层 形成在第二绝缘层上，并通过第二通孔连接到第一布线层。 再布线层由种子层和设置在种子层上的金属镀层形成，种子层的宽度等于或宽于金属镀层。

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