公开(公告)号：US09786590B2

公开(公告)日：2017-10-10

申请号：US15070184

申请日：2016-03-15

Applicant: SK Hynix Inc.

Inventor： In Chul Hwang ,  Ki Young Kim ,  Myung Geun Park

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/00 ,  H05K1/11

CPC classification number: H01L23/4985 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/17104 ,  H05K1/111 ,  H05K1/189 ,  H05K3/32 ,  H05K3/3436 ,  H05K2201/0281 ,  H05K2201/029 ,  H05K2201/10962 ,  Y02P70/613

Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate formed with one or more connection pads. The semiconductor package may include a semiconductor device including at least one bump. The semiconductor package may include an anisotropic conductive fabric including conductive fibers and configured to electrically couple the at least one connection pad to the at least one bump.

公开(公告)号：US09397757B2

公开(公告)日：2016-07-19

申请号：US14318529

申请日：2014-06-27

Applicant: SK HYNIX INC.

Inventor： In Chul Hwang ,  Il Hwan Cho ,  Ki Young Kim ,  Kyoung Mo Yang ,  Jae Joon Ahn ,  Chong Ho Cho

IPC: H04B10/80 ,  H04B10/40 ,  G02B6/42 ,  H05K1/18

CPC classification number: H04B10/801 ,  G02B6/42 ,  H01L2224/16145 ,  H01L2224/16225 ,  H04B10/40 ,  H05K1/181 ,  H05K2201/10121 ,  H05K2201/10515 ,  Y02P70/611

Abstract: A semiconductor package includes a package substrate, a first semiconductor substrate and a second semiconductor substrate stacked on the package substrate, and an optical transceiver that generates and receives an optical signal travelling between the package substrate and the second semiconductor substrate using an infrared (IR) ray that passes through the first semiconductor substrate.

Abstract translation: 半导体封装包括封装衬底，堆叠在封装衬底上的第一半导体衬底和第二半导体衬底，以及使用红外线（IR）产生并接收在封装衬底和第二半导体衬底之间行进的光信号的光收发器， 射线穿过第一半导体衬底。

公开(公告)号：US09793235B2

公开(公告)日：2017-10-17

申请号：US15139072

申请日：2016-04-26

Applicant: SK hynix Inc.

Inventor： Ki Young Kim ,  In Chul Hwang

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L24/17 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/13012 ,  H01L2224/13016 ,  H01L2224/13023 ,  H01L2224/13078 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/16105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/00014

Abstract: A semiconductor package may be provided. The semiconductor package may include a substrate having a first surface over which bond fingers are arranged, the other surface facing away from the first surface and over which ball lands are arranged, and terminals which are respectively formed over the bond fingers. The semiconductor package may include a semiconductor chip disposed over the first surface of the substrate, and having an active surface facing the first surface and over which bonding pads are arranged. The semiconductor package may include bumps respectively formed over the bonding pads of the semiconductor chip, and including pillars and layers which are formed over first side surfaces of the pillars and are joined with the terminals of the substrate.

公开(公告)号：US09668344B2

公开(公告)日：2017-05-30

申请号：US14878891

申请日：2015-10-08

Applicant: SK hynix Inc.

Inventor： Won Duck Jung ,  Jong Ho Lee ,  Joo Hyun Kang ,  Chong Ho Cho ,  In Chul Hwang

IPC: H05K7/00 ,  H05K7/12 ,  H05K1/11 ,  H01L27/115 ,  H05K1/14 ,  H05K3/32

CPC classification number: H05K1/111 ,  H01L21/563 ,  H01L23/49811 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L27/115 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/11334 ,  H01L2224/13011 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13015 ,  H01L2224/13016 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1601 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81897 ,  H01L2224/8192 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/3511 ,  H05K1/145 ,  H05K3/32 ,  H05K3/325 ,  H05K2201/09209 ,  H05K2201/10159 ,  H05K2201/10287 ,  H05K2201/10613 ,  H05K2201/10757 ,  H05K2201/1078 ,  H05K2201/10977 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2224/45099

Abstract: A semiconductor package may include a first substrate including a first connection portion disposed on a surface of the first substrate and a second substrate including a second connection portion disposed on a surface of the second substrate. The second substrate may be disposed over the first substrate and the second connection portion facing the first connection portion. A first connection loop portion may be provided to include an end connected to the first connection portion. A second connection loop portion may be provided to include one end connected to the second connection portion and the other end combined with the first connection loop portion.

公开(公告)号：US09412690B2

公开(公告)日：2016-08-09

申请号：US14325081

申请日：2014-07-07

Applicant: SK HYNIX INC.

Inventor： Tae Ho Lee ,  Il Hwan Cho ,  In Chul Hwang ,  Ga Hyun No

IPC: H01L23/495 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/16 ,  H01L23/3107 ,  H01L23/49827 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A package substrate includes a substrate body and a plurality of patterns disposed on the substrate body. The substrate body has a first region including a chip attachment region and a second region adjacent to the first region. The plurality of patterns are disposed on the substrate body in the second region. Each of the plurality of patterns extends in a first direction to have a stripe shape, and the plurality of patterns are spaced apart from each other in a second direction which is substantially perpendicular to the first direction. Related fabrication methods, electronic systems and memory cards are also provided.

Abstract translation: 封装基板包括基板主体和布置在基板主体上的多个图案。 基板主体具有包括芯片附接区域和与第一区域相邻的第二区域的第一区域。 多个图案设置在第二区域中的基板主体上。 多个图案中的每一个在第一方向上延伸以具有条形形状，并且多个图案在基本上垂直于第一方向的第二方向上彼此间隔开。 还提供了相关的制造方法，电子系统和存储卡。