METHODS OF COPPER PLATING THROUGH WAFER VIA
    1.
    发明申请

    公开(公告)号:US20190333835A1

    公开(公告)日:2019-10-31

    申请号:US16408245

    申请日:2019-05-09

    发明人: Hong Shen

    摘要: Methods related to plating a through-wafer via of a gallium arsenide integrated circuit are disclosed. For example, to improve copper plating, a seed layer formed in the through-wafer vias can be modified to increase water affinity, rinsed to remove contaminants, and activated to facilitate copper deposition. Other methods related to metallizing a through wafer via in gallium arsenide integrated circuits are disclosed. Such methods can include copper plating a through wafer via of a gallium arsenide integrated circuit.

    METHOD OF MANUFACTURING GAAS INTEGRATED CIRCUITS WITH ALTERNATIVE BACKSIDE CONDUCTIVE MATERIAL

    公开(公告)号:US20190333816A1

    公开(公告)日:2019-10-31

    申请号:US16412929

    申请日:2019-05-15

    发明人: Hong Shen

    摘要: Systems, apparatuses, and methods related to the design, fabrication, and manufacture of gallium arsenide (GaAs) integrated circuits are disclosed. Copper can be used as the contact material for a GaAs integrated circuit. Metallization of the wafer and through-wafer vias can be achieved through copper plating processes disclosed herein. Various protocols can be employed during processing to avoid cross-contamination between copper-plated and non-copper-plated wafers. GaAs integrated circuits can be singulated, packaged, and incorporated into various electronic devices.