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公开(公告)号:US08742499B2
公开(公告)日:2014-06-03
申请号:US12608751
申请日:2009-10-29
申请人: Shizuki Nakajima , Hiroyuki Nagai , Yuji Shirai , Hirokazu Nakajima , Chushiro Kusano , Yu Hasegawa , Chiko Yorita , Yasuo Osone
发明人: Shizuki Nakajima , Hiroyuki Nagai , Yuji Shirai , Hirokazu Nakajima , Chushiro Kusano , Yu Hasegawa , Chiko Yorita , Yasuo Osone
IPC分类号: H01L27/082 , H01L27/088 , H01L21/8222 , H01L29/78
CPC分类号: H01L29/7835 , H01L21/823425 , H01L21/823475 , H01L23/66 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/17 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L27/088 , H01L29/04 , H01L29/0692 , H01L29/0847 , H01L29/0878 , H01L29/1087 , H01L29/41758 , H01L29/66659 , H01L29/7371 , H01L2223/6644 , H01L2223/6677 , H01L2224/0401 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05171 , H01L2224/05553 , H01L2224/05644 , H01L2224/05666 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/16235 , H01L2224/291 , H01L2224/29111 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/04941 , H01L2924/10161 , H01L2924/10329 , H01L2924/10336 , H01L2924/12041 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1517 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/3011 , H01L2924/30111 , H05K1/0206 , H05K2201/09481 , H05K2201/096 , H05K2201/10674 , H01L2924/00 , H01L2924/01028 , H01L2924/01032 , H01L2924/01083 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/013
摘要: In a semiconductor chip in which LDMOSFET elements for power amplifier circuits used for a power amplifier module are formed, a source bump electrode is disposed on an LDMOSFET formation region in which a plurality of source regions, a plurality of drain regions and a plurality of gate electrodes for the LDMOSFET elements are formed. The source bump electrode is formed on a source pad mainly made of aluminum via a source conductor layer which is thicker than the source pad and mainly made of copper. No resin film is interposed between the source bump electrode and the source conductor layer.
摘要翻译: 在其中形成用于功率放大器模块的功率放大器电路的LDMOSFET元件形成的半导体芯片中,源极突起电极设置在LDMOSFET形成区域中,其中多个源极区域,多个漏极区域和多个栅极 形成用于LDMOSFET元件的电极。 源极突起电极通过源极导体层形成在主要由铝制成的源极焊盘上,该源极导体层比源焊盘厚,主要由铜制成。 在源凸起电极和源极导体层之间不设置树脂膜。
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公开(公告)号:US07554193B2
公开(公告)日:2009-06-30
申请号:US11504736
申请日:2006-08-16
申请人: Yasuo Osone , Chiko Yorita , Kenya Kawano , Yu Hasegawa , Yuji Shirai , Seiichi Tomoi , Tsuneo Endou , Satoru Konishi , Hirokazu Nakajima
发明人: Yasuo Osone , Chiko Yorita , Kenya Kawano , Yu Hasegawa , Yuji Shirai , Seiichi Tomoi , Tsuneo Endou , Satoru Konishi , Hirokazu Nakajima
CPC分类号: H01L25/16 , H01L23/3677 , H01L23/49822 , H01L24/32 , H01L24/48 , H01L24/81 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/81801 , H01L2924/00014 , H01L2924/01033 , H01L2924/0132 , H01L2924/10329 , H01L2924/1305 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19105 , H01L2924/00 , H01L2924/01031 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.
摘要翻译: 本发明提供了能够在不增加制造成本的同时实现高放射性能和制造准备性的同时降低倒装芯片封装结构中的热阻的半导体器件。 在具有用于功率放大的半导体电路和叠层在多层电路板上的半导体电路的控制电路的半导体器件中,用于功率放大的半导体电路和控制电路并联在同一半导体元件上,半导体元件 在多层电路板上倒装芯片连接。 此外,除了第一半导体元件和所有元件和子模块之外安装的第二半导体元件被倒装连接。 此外,为了提高辐射性能,将多个凸块结合起来,多层电路板的布线层的第二层和下层形成多层电路板的热通孔。
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公开(公告)号:US20070040255A1
公开(公告)日:2007-02-22
申请号:US11504736
申请日:2006-08-16
申请人: Yasuo Osone , Chiko Yorita , Kenya Kawano , Yu Hasegawa , Yuji Shirai , Seiichi Tomoi , Tsuneo Endou , Satoru Konishi , Hirokazu Nakajima
发明人: Yasuo Osone , Chiko Yorita , Kenya Kawano , Yu Hasegawa , Yuji Shirai , Seiichi Tomoi , Tsuneo Endou , Satoru Konishi , Hirokazu Nakajima
IPC分类号: H01L23/02
CPC分类号: H01L25/16 , H01L23/3677 , H01L23/49822 , H01L24/32 , H01L24/48 , H01L24/81 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/81801 , H01L2924/00014 , H01L2924/01033 , H01L2924/0132 , H01L2924/10329 , H01L2924/1305 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/19105 , H01L2924/00 , H01L2924/01031 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A semiconductor device capable of reducing the thermal resistance in a flip chip packaging structure while achieving both the high radiation performance and manufacturing readiness without increasing the manufacturing cost is provided. In a semiconductor device having a semiconductor circuit for power amplification and a control circuit of the semiconductor circuit laminated on a multilayer circuit board, the semiconductor circuit for power amplification and the control circuit are aligned in parallel on the same semiconductor element, and the semiconductor element is flip-chip connected on the multilayer circuit board. Further, a second semiconductor element mounted in addition to the first semiconductor element and all components and submodules are flip-chip connected. Also, a plurality of bumps are united in order to improve the radiation performance and thermal vias of the multilayer circuit board are formed in second and lower layers of the wiring layers in the multilayer circuit board.
摘要翻译: 本发明提供了能够在不增加制造成本的同时实现高放射性能和制造准备性的同时降低倒装芯片封装结构中的热阻的半导体器件。 在具有用于功率放大的半导体电路和叠层在多层电路板上的半导体电路的控制电路的半导体器件中,用于功率放大的半导体电路和控制电路并联在同一半导体元件上,半导体元件 在多层电路板上倒装芯片连接。 此外,除了第一半导体元件和所有元件和子模块之外安装的第二半导体元件被倒装连接。 此外,为了提高辐射性能,将多个凸块结合起来,多层电路板的布线层的第二层和下层形成多层电路板的热通孔。
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公开(公告)号:US20070176298A1
公开(公告)日:2007-08-02
申请号:US11652235
申请日:2007-01-10
申请人: Yasuo Osone , Kenya Kawano , Chiko Yorita , Yu Hasegawa , Yuji Shirai , Naotaka Tanaka , Seiichi Tomoi , Hiroshi Okabe
发明人: Yasuo Osone , Kenya Kawano , Chiko Yorita , Yu Hasegawa , Yuji Shirai , Naotaka Tanaka , Seiichi Tomoi , Hiroshi Okabe
CPC分类号: H01L23/3677 , H01L23/3121 , H01L23/34 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2223/6644 , H01L2223/6688 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73257 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2225/06582 , H01L2225/06589 , H01L2924/00014 , H01L2924/1305 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1515 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2224/48237 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.
摘要翻译: 发热时刻不同的加热元件层叠在堆叠状态,允许靠近布线基板的加热元件用作另一个加热元件的热扩散板。
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公开(公告)号:US07656030B2
公开(公告)日:2010-02-02
申请号:US11652235
申请日:2007-01-10
申请人: Yasuo Osone , Kenya Kawano , Chiko Yorita , Yu Hasegawa , Yuji Shirai , Naotaka Tanaka , Seiichi Tomoi , Hiroshi Okabe
发明人: Yasuo Osone , Kenya Kawano , Chiko Yorita , Yu Hasegawa , Yuji Shirai , Naotaka Tanaka , Seiichi Tomoi , Hiroshi Okabe
CPC分类号: H01L23/3677 , H01L23/3121 , H01L23/34 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2223/6644 , H01L2223/6688 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73203 , H01L2224/73257 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06568 , H01L2225/06582 , H01L2225/06589 , H01L2924/00014 , H01L2924/1305 , H01L2924/13064 , H01L2924/13091 , H01L2924/14 , H01L2924/1515 , H01L2924/15153 , H01L2924/1517 , H01L2924/181 , H01L2924/1815 , H01L2924/00012 , H01L2224/48237 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: Heating elements different in heat generating timing are laminated in a stacked state, and the heating element close to a wiring substrate is allowed to function as a heat diffusion plate for another heating element.
摘要翻译: 发热时刻不同的加热元件层叠在堆叠状态,允许靠近布线基板的加热元件用作另一个加热元件的热扩散板。
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公开(公告)号:US07583163B2
公开(公告)日:2009-09-01
申请号:US11891368
申请日:2007-08-10
申请人: Yasuo Osone , Chiko Yorita , Yuji Shirai , Seiichi Tomoi
发明人: Yasuo Osone , Chiko Yorita , Yuji Shirai , Seiichi Tomoi
CPC分类号: H03H3/04 , H03H9/564 , H03H9/589 , H03H2003/025
摘要: A technique capable of integrally forming SMR type acoustic wave filters corresponding to multiple bands on the same chip at low cost is provided. In SMR type acoustic wave filters including multiple bandpass filters corresponding to multiple bands formed over the same die (substrate), acoustic multilayer films are formed without or with a minimum number of masks and piezoelectric thin films having different thicknesses for respective bands are collectively formed. For example, after the acoustic multilayer films (low acoustic impedance layers and high acoustic impedance layers) are formed in a deep groove in a terrace paddy field shape over the die in a maskless manner, the piezoelectric thin films are c-axis-oriented and grown, and are polished by CMP method or the like to be adjusted in a thickness for respective bands, and therefore, the SMR type acoustic wave filters for multiple bands are formed over the same chip.
摘要翻译: 提供了能够以低成本一体地形成对应于同一芯片上的多个频带的SMR型声波滤波器的技术。 在包括对应于形成在同一芯片(基板)上的多个带的多个带通滤波器的SMR型声波滤波器中,形成声学多层膜,而不需要最少数量的掩模,并且共同形成具有不同厚度的压电薄膜。 例如,在以无掩模的方式在模具上形成在平台水田的深槽中的声学多层膜(低声阻抗层和高声阻抗层)之后,压电薄膜是c轴取向的, 并通过CMP方法等进行抛光,以对各个带的厚度进行调整,因此,在同一芯片上形成多个带的SMR型声波滤波器。
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公开(公告)号:US20080129412A1
公开(公告)日:2008-06-05
申请号:US11891368
申请日:2007-08-10
申请人: Yasuo Osone , Chiko Yorita , Yuji Shirai , Seiichi Tomoi
发明人: Yasuo Osone , Chiko Yorita , Yuji Shirai , Seiichi Tomoi
CPC分类号: H03H3/04 , H03H9/564 , H03H9/589 , H03H2003/025
摘要: A technique capable of integrally forming SMR type acoustic wave filters corresponding to multiple bands on the same chip at low cost is provided. In SMR type acoustic wave filters including multiple bandpass filters corresponding to multiple bands formed over the same die (substrate), acoustic multilayer films are formed without or with a minimum number of masks and piezoelectric thin films having different thicknesses for respective bands are collectively formed. For example, after the acoustic multilayer films (low acoustic impedance layers and high acoustic impedance layers) are formed in a deep groove in a terrace paddy field shape over the die in a maskless manner, the piezoelectric thin films are c-axis-oriented and grown, and are polished by CMP method or the like to be adjusted in a thickness for respective bands, and therefore, the SMR type acoustic wave filters for multiple bands are formed over the same chip.
摘要翻译: 提供了能够以低成本一体地形成对应于同一芯片上的多个频带的SMR型声波滤波器的技术。 在包括对应于形成在同一芯片(基板)上的多个带的多个带通滤波器的SMR型声波滤波器中,形成声学多层膜,而不需要最少数量的掩模,并且共同形成具有不同厚度的压电薄膜。 例如,在以无掩模的方式在模具上形成在平台水田的深槽中的声学多层膜(低声阻抗层和高声阻抗层)之后,压电薄膜是c轴取向的, 并通过CMP方法等进行抛光,以对各个带的厚度进行调整,因此,在同一芯片上形成多个带的SMR型声波滤波器。
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公开(公告)号:US20100230789A1
公开(公告)日:2010-09-16
申请号:US12724268
申请日:2010-03-15
申请人: Chiko Yorita , Yuji Shirai , Hirokazu Nakajima , Hiroshi Ozaku , Tomonori Tanoue , Hiroshi Okabe , Tsutomu Hara
发明人: Chiko Yorita , Yuji Shirai , Hirokazu Nakajima , Hiroshi Ozaku , Tomonori Tanoue , Hiroshi Okabe , Tsutomu Hara
IPC分类号: H01L23/552 , H01L21/78 , H01L21/56
CPC分类号: H01L23/66 , H01L23/3121 , H01L23/3677 , H01L23/49838 , H01L23/50 , H01L23/5383 , H01L23/552 , H01L24/45 , H01L24/48 , H01L24/97 , H01L2223/6644 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01061 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10253 , H01L2924/12041 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/0218 , H05K3/0052 , H05K3/284 , H05K9/0084 , H05K2201/09036 , H05K2201/0909 , H01L2224/85 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要: A technology is provided which allows a reduction in the size of a semiconductor device without degrading an electromagnetic shielding effect and reliability against reflow heating. After a plurality of components are mounted over a component mounting surface of a module substrate, a resin is formed so as to cover the mounted components. Further, over surfaces (upper and side surfaces) of the resin, a shield layer including a laminated film of a Cu plating film and an Ni plating film is formed. In the shield layer, a plurality of microchannel cracks are formed randomly along grain boundaries and in a net-like configuration without being coupled to each other in a straight line, and form a plurality of paths extending from the resin to a surface of the shield layer by the microchannel cracks.
摘要翻译: 提供了一种技术,其允许减小半导体器件的尺寸而不降低电磁屏蔽效应和不受回流加热的可靠性。 在将多个部件安装在模块基板的部件安装表面上之后,形成树脂以覆盖安装的部件。 此外,树脂的表面(上表面和侧表面)上形成包括Cu镀膜和Ni镀膜的层叠膜的屏蔽层。 在屏蔽层中,沿着晶界和网状构造随机地形成多个微通道裂纹,而不以直线彼此连接,并且形成从树脂延伸到屏蔽层表面的多个路径 层由微通道裂缝。
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9.
公开(公告)号:US20100172116A1
公开(公告)日:2010-07-08
申请号:US12612699
申请日:2009-11-05
申请人: Chiko Yorita , Yoshihide Yamaguchi , Yuji Shirai , Yu Hasegawa
发明人: Chiko Yorita , Yoshihide Yamaguchi , Yuji Shirai , Yu Hasegawa
CPC分类号: H01L21/565 , H01L21/568 , H01L21/6836 , H01L23/3121 , H01L23/3128 , H01L23/552 , H01L23/66 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L25/165 , H01L25/50 , H01L2221/68327 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2924/00014 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01046 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H05K1/0218 , H05K3/0052 , H05K3/181 , H05K3/284 , H05K9/0084 , Y10T29/49126 , H01L2224/81 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A shielded electronic component including a wiring board, at least one semiconductor chip mounted on a main surface of the wiring board, a sealant which seals the whole of an upper surface of the wiring board, and a nickel (Ni) plating film formed on an upper surface of the sealant is provided. The Ni plating film is formed on a palladium (Pd) pretreatment layer formed on the upper surface of the sealant with using high-pressure CO2 in a state of protecting a back surface of the wiring board, and is electrically connected with an end portion of a ground wiring layer of the wiring board or a ground (GND) connection through-hole connected with the end portion of the ground wiring layer.
摘要翻译: 一种屏蔽电子元件,包括布线板,安装在所述布线板的主表面上的至少一个半导体芯片,密封所述布线板的整个上表面的密封剂和形成在所述布线板上的镍(Ni) 提供密封剂的上表面。 在保护接线板的背面的状态下,使用高压CO 2形成在密封剂的上表面上的钯(Pd)预处理层上形成Ni镀膜,并与 布线板的接地布线层或与接地布线层的端部连接的接地(GND)连接通孔。
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公开(公告)号:US20120292772A1
公开(公告)日:2012-11-22
申请号:US13561302
申请日:2012-07-30
申请人: Chiko Yorita , Yoshihide Yamaguchi , Yuji Shirai , Yu Hasegawa
发明人: Chiko Yorita , Yoshihide Yamaguchi , Yuji Shirai , Yu Hasegawa
IPC分类号: H01L23/52
CPC分类号: H01L21/565 , H01L21/568 , H01L23/3121 , H01L23/3128 , H01L23/552 , H01L23/66 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L25/165 , H01L25/50 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2924/00014 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01046 , H01L2924/01051 , H01L2924/01074 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/3025 , H05K1/0218 , H05K3/0052 , H05K3/181 , H05K3/284 , H05K9/0084 , Y10T29/49126 , H01L2224/81 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A shielded electronic component including a wiring board, at least one semiconductor chip mounted on a main surface of the wiring board, a sealant which seals the whole of an upper surface of the wiring board, and a nickel (Ni) plating film formed on an upper surface of the sealant is provided. The Ni plating film is formed on a palladium (Pd) pretreatment layer formed on the upper surface of the sealant with using high-pressure CO2 in a state of protecting a back surface of the wiring board, and is electrically connected with an end portion of a ground wiring layer of the wiring board or a ground (GND) connection through-hole connected with the end portion of the ground wiring layer.
摘要翻译: 一种屏蔽电子元件,包括布线板,安装在所述布线板的主表面上的至少一个半导体芯片,密封所述布线板的整个上表面的密封剂和形成在所述布线板上的镍(Ni) 提供密封剂的上表面。 在保护接线板的背面的状态下,使用高压CO 2形成在密封剂的上表面上的钯(Pd)预处理层上形成Ni镀膜,并与 布线板的接地布线层或与接地布线层的端部连接的接地(GND)连接通孔。
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