公开(公告)号：US20120175754A1

公开(公告)日：2012-07-12

申请号：US13246933

申请日：2011-09-28

申请人： Toshiki FURUTANI ,  Daiki KOMATSU ,  Nobuya TAKAHASHI ,  Masatoshi KUNIEDA ,  Naomi FUJITA ,  Koichi TSUNODA ,  Minetaka OYAMA ,  Toshimasa YANO

发明人： Toshiki FURUTANI ,  Daiki KOMATSU ,  Nobuya TAKAHASHI ,  Masatoshi KUNIEDA ,  Naomi FUJITA ,  Koichi TSUNODA ,  Minetaka OYAMA ,  Toshimasa YANO

IPC分类号： H01L25/07 ,  H01L23/495

CPC分类号： H05K1/185 ,  H01L21/4846 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/15313 ,  H05K1/162 ,  H05K3/4602 ,  H05K2201/10674

摘要： A wiring board including a core substrate made of an insulative material and having a penetrating portion, a first interlayer insulation layer formed on the surface of the core substrate, a first conductive circuit formed on the surface of the first interlayer insulation layer, a first via conductor formed in the first interlayer insulation layer, and an electronic component accommodated in the penetrating portion of the core substrate and including a semiconductor element, a bump body mounted on the semiconductor element, a conductive circuit connected to the bump body, an interlayer resin insulation layer formed on the conductive circuit, and a via conductor formed in the interlayer resin insulation layer. The first via conductor has a tapering direction which is opposite of a tapering direction of the via conductor in the electronic component.

摘要翻译： 一种布线板，包括由绝缘材料制成并具有穿透部分的芯基板，形成在芯基板的表面上的第一层间绝缘层，形成在第一层间绝缘层的表面上的第一导电电路， 形成在第一层间绝缘层中的导体和容纳在芯基板的穿透部分中并包括半导体元件的电子部件，安装在半导体元件上的凸块体，连接到凸块体的导电电路，层间树脂绝缘体 形成在导电电路上的层，以及形成在层间树脂绝缘层中的通孔导体。 第一通孔导体具有与电子部件中的通路导体的锥形方向相反的锥形方向。

公开(公告)号：US20120018198A1

公开(公告)日：2012-01-26

申请号：US13074377

申请日：2011-03-29

申请人： Toshiki FURUTANI ,  Minetaka Oyama ,  Daiki Komatsu ,  Koichi Tsunoda ,  Toshimasa Yano

发明人： Toshiki FURUTANI ,  Minetaka Oyama ,  Daiki Komatsu ,  Koichi Tsunoda ,  Toshimasa Yano

IPC分类号： H05K1/03 ,  H05K3/00 ,  H05K1/11

CPC分类号： H01G4/228 ,  H01G4/224 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/09701 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10015 ,  Y10T29/49124

摘要： An electronic component including a substrate having a surface and one or more trench portions opening on the surface, a capacitor portion having a lower electrode formed on the surface of the substrate and on the wall surface of the trench portion, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a resin filler filling the space inside the trench portion lined by the upper electrode, an insulation layer formed on the surface of the substrate, a conductive portion formed on the insulation layer and positioned to cover the trench portion, and a via conductor connecting the conductive portion and one of the lower electrode and the upper electrode.

摘要翻译： 一种电子部件，包括具有表面的基板和在所述表面上开口的一个或多个沟槽部分，电容器部分，具有形成在所述基板的所述表面上的所述下电极以及所述沟槽部分的壁表面上的电介质层， 下电极和形成在电介质层上的上电极，填充由上电极排列的沟槽部分内的空间的树脂填料，形成在基板表面上的绝缘层，形成在绝缘层上的导电部分， 覆盖沟槽部分，以及连接导电部分和下电极和上电极之一的通孔导体。

公开(公告)号：US20120181708A1

公开(公告)日：2012-07-19

申请号：US13249838

申请日：2011-09-30

申请人： Toshiki FURUTANI ,  Daiki Komatsu ,  Masatoshi Kunieda ,  Naomi Fujita ,  Nobuya Takahashi

发明人： Toshiki FURUTANI ,  Daiki Komatsu ,  Masatoshi Kunieda ,  Naomi Fujita ,  Nobuya Takahashi

IPC分类号： H01L23/28 ,  H01L21/56 ,  H05K1/11

CPC分类号： H05K1/113 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/147 ,  H01L23/28 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/562 ,  H01L24/82 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2924/00013 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/351 ,  H05K1/0298 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A substrate for mounting a semiconductor includes a first insulation layer having first and second surfaces on the opposite sides and having a penetrating hole penetrating through the first insulation layer, an electrode formed in the penetrating hole in the first insulation layer and having a protruding portion protruding from the second surface of the first insulation layer, a first conductive pattern formed on the first surface of the first insulation layer and connected to the electrode, a second insulation layer formed on the first surface of the first insulation layer and the first conductive pattern and having a penetrating hole penetrating through the second insulating layer, a second conductive pattern formed on the second insulation layer and for mounting a semiconductor element, and a via conductor formed in the penetrating hole in the second insulation layer and connecting the first and second conductive patterns.

摘要翻译： 用于安装半导体的基板包括：第一绝缘层，其在相对侧上具有第一和第二表面，并且具有穿透第一绝缘层的穿透孔;形成在第一绝缘层中的穿透孔中的电极， 从第一绝缘层的第二表面，形成在第一绝缘层的第一表面上并连接到电极的第一导电图案，形成在第一绝缘层的第一表面上的第二绝缘层和第一导电图案，以及 具有穿透所述第二绝缘层的穿透孔，形成在所述第二绝缘层上并用于安装半导体元件的第二导电图案，以及形成在所述第二绝缘层中的所述穿透孔中的通孔导体，并且将所述第一和第二导电图案 。

公开(公告)号：US20120080786A1

公开(公告)日：2012-04-05

申请号：US13214277

申请日：2011-08-22

申请人： Toshiki FURUTANI ,  Daiki Komatsu ,  Nobuya Takahashi

发明人： Toshiki FURUTANI ,  Daiki Komatsu ,  Nobuya Takahashi

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L23/3114 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/563 ,  H01L21/568 ,  H01L21/76804 ,  H01L21/78 ,  H01L23/28 ,  H01L23/29 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/562 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83

摘要： An electronic component including a wiring board having interlayer insulation layers and conductive patterns, the wiring board having a first surface and a second surface on the opposite side of the first surface, multiple first bumps formed on a first conductive pattern positioned on the first surface of the wiring board among the conductive patterns of the wiring board, a semiconductor element mounted on the first surface of the wiring board through the first bumps, an encapsulating resin encapsulating the semiconductor element and at least a portion of a side surface of the wiring board, the side surface of the wiring board extending between the first surface and second surface of the wiring board, and multiple of second bumps formed on the second surface of the wiring board and connected to a second conductive pattern of the conductive patterns in the wiring board.

摘要翻译： 一种电子部件，包括具有层间绝缘层和导电图案的布线基板，所述布线板具有在所述第一面的相反侧的第一表面和第二表面，形成在位于所述第一表面的第一表面的第一表面上的第一导电图案上的多个第一凸起 布线板的导体图案中的布线板，通过第一凸块安装在布线板的第一表面上的半导体元件，封装半导体元件的封装树脂和布线板的侧面的至少一部分， 所述布线板的所述侧面在所述布线基板的所述第一表面和所述第二表面之间延伸，以及形成在所述布线板的所述第二表面上并连接到所述布线板中的所述导电图案的第二导电图案的多个第二凸块。

公开(公告)号：US20130192883A1

公开(公告)日：2013-08-01

申请号：US13558892

申请日：2012-07-26

申请人： Toshiki FURUTANI ,  Yukinobu MIKADO ,  Shunsuke SAKAI ,  Yusuke TANAKA

发明人： Toshiki FURUTANI ,  Yukinobu MIKADO ,  Shunsuke SAKAI ,  Yusuke TANAKA

IPC分类号： H05K1/16

CPC分类号： H05K1/162 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/3511 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4661

摘要： A printed wiring board includes a substrate having an accommodation section having multiple opening portions, multiple electronic components accommodated in the opening portions, respectively, a filler resin provided in the opening portions in the substrate such that the electronic components are secured in the opening portions in the substrate, a resin insulation layer formed over the substrate and the electronic components, a conductive layer formed on the resin insulation layer, and via conductors formed in the resin insulation layer and connecting the conductive layer and the electronic components. The opening portions are connected to each other.

摘要翻译： 印刷电路板包括具有多个开口部分的容纳部分的基板，分别容纳在开口部分中的多个电子部件，设置在基板的开口部分中的填充树脂，使得电子部件固定在开口部分中 基板，形成在基板上的树脂绝缘层和电子部件，形成在树脂绝缘层上的导电层和形成在树脂绝缘层中并连接导电层和电子部件的通孔导体。 开口部彼此连接。

公开(公告)号：US20130221505A1

公开(公告)日：2013-08-29

申请号：US13598751

申请日：2012-08-30

申请人： Toshiki FURUTANI ,  Takeshi Furusawa

发明人： Toshiki FURUTANI ,  Takeshi Furusawa

IPC分类号： H01L23/495

CPC分类号： H01L23/49541 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/3511

摘要： A printed wiring board includes a substrate, a first buildup formed on a first surface of the substrate and including the outermost conductive layer, and a second buildup layer formed on a second surface of the substrate and including the outermost conductive layer. The outermost layer of the first buildup has pads positioned to connect a semiconductor component, the first buildup has a component mounting region directly under the component such that the outermost layer of the first buildup has a portion in the region, the outermost layer of the second buildup has a portion directly under the region, and the portions satisfy the ratio in the range of from 1.1 to 1.35, where the ratio is obtained by dividing a planar area of the portion of the second buildup by a planar area of the portion of the first buildup.

摘要翻译： 印刷布线板包括基板，形成在基板的第一表面上并且包括最外面的导电层的第一累积物和形成在基板的第二表面上并且包括最外面导电层的第二累积层。 第一堆积的最外层具有定位成连接半导体部件的焊盘，第一堆积具有直接在部件下方的部件安装区域，使得第一堆积物的最外层具有该区域中的一部分，第二部分的最外层 积聚部分具有直接在该区域下方的部分，并且这些部分满足在1.1至1.35范围内的比率，其中通过将第二聚集部分的平面面积除以该部分的平面面积获得的比例 第一次积累

公开(公告)号：US20120199389A1

公开(公告)日：2012-08-09

申请号：US13442921

申请日：2012-04-10

申请人： Toshiki FURUTANI ,  Takeshi Furusawa

发明人： Toshiki FURUTANI ,  Takeshi Furusawa

IPC分类号： H05K1/11

CPC分类号： H05K1/113 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/15311 ,  H05K1/0269 ,  H05K3/0035 ,  H05K3/107 ,  H05K3/205 ,  H05K3/421 ,  H05K3/423 ,  H05K3/428 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0542 ,  H05K2203/166 ,  H05K2203/167 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method for manufacturing a printed wiring board, in which filled vias with a reduction in faulty connections are formed, and providing such a printed wiring board. After an electroless plated film is formed on an inner wall of a via opening, electrolytic plating is performed on insulative resin base material; the via opening is filled with plating metal and a filled via is formed. Therefore, during electrolytic plating, a plating metal is deposited from electroless plated film on the side wall of the via opening as well as from the bottom of the via opening. As a result, the via opening may be completely filled through electrolytic plating, forming a filled via with a reduction in faulty connections.

摘要翻译： 一种制造印刷线路板的方法，其中形成了具有减少连接故障的填充过孔，并且提供了这种印刷线路板。 在通孔开口的内壁上形成无电镀膜后，对绝缘性树脂基材进行电解电镀; 通孔开口填充有电镀金属，并形成填充的通孔。 因此，在电解电镀期间，电化学金属由通孔开口的侧壁以及通孔开口的底部的无电镀膜沉积。 结果，通孔开口可以通过电解电镀完全填充，形成填充的通孔，同时减少连接错误。

公开(公告)号：US20100236822A1

公开(公告)日：2010-09-23

申请号：US12498860

申请日：2009-07-07

申请人： Toshiki FURUTANI ,  Takeshi FURUSAWA

发明人： Toshiki FURUTANI ,  Takeshi FURUSAWA

IPC分类号： H05K1/18 ,  H05K3/30

CPC分类号： H01L21/4857 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2224/16 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H05K1/111 ,  H05K1/187 ,  H05K3/205 ,  H05K3/243 ,  H05K3/244 ,  H05K3/428 ,  H05K3/4652 ,  H05K2201/0949 ,  H05K2201/0969 ,  H05K2201/09736 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y10T29/4913 ,  H01L2224/0401

摘要： A wiring board is formed with a substrate, conductive patterns laminated in the thickness direction of the substrate, multiple pads having a predetermined pitch and formed on the same layer as the conductive patterns, a conductive bonding layer arranged on each of the multiple pads, and an electronic component having electrodes. Here, the electronic component is arranged inside the substrate. The electrodes of the electronic component and the multiple pads are electrically connected to each other by means of bonding layers. Also, the height of each of the multiple pads is greater than the height of the conductive pattern adjacent to each pad. Moreover, a protective material related to the bonding layers is not formed at least on the layer where the pads and the first conductive patterns are formed.

摘要翻译： 布线板形成有基板，在基板的厚度方向上层叠的导电图案，具有预定间距的多个焊盘，并形成在与导电图案相同的层上，布置在多个焊盘的每一个上的导电接合层，以及 具有电极的电子部件。 这里，电子部件配置在基板的内部。 电子部件的电极和多个焊盘通过接合层彼此电连接。 此外，多个焊盘中的每一个的高度大于与每个焊盘相邻的导电图案的高度。 此外，至少在形成焊盘和第一导电图案的层上形成与结合层相关的保护材料。

公开(公告)号：US20100108371A1

公开(公告)日：2010-05-06

申请号：US12488177

申请日：2009-06-19

申请人： Toshiki FURUTANI ,  Takeshi FURUSAWA

发明人： Toshiki FURUTANI ,  Takeshi FURUSAWA

IPC分类号： H05K1/16 ,  H05K1/11 ,  H05K3/30

CPC分类号： H05K1/187 ,  H01L21/56 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/0554 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83005 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15313 ,  H01L2924/3511 ,  H05K3/205 ,  H05K3/3452 ,  H05K3/4602 ,  H05K2201/09909 ,  Y10T29/49133 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49204 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A wiring board with a built-in electronic component in which an electronic component is flip-chip mounted to be built in, including a conductive-pattern layer, a connection terminal formed in the conductive-pattern layer and electrically connected to the electronic component, and a solder resist layer formed on the conductive-pattern layer. The solder resist layer is formed around the connection terminal on the conductive-pattern layer, but it is not formed in at least part of the other region on the conductive-pattern layer.

摘要翻译： 一种具有内置电子部件的布线板，其中内置电子部件的内置电子部件，包括导体图案层，形成在导电图案层中并电连接到电子部件的连接端子， 以及形成在导电图案层上的阻焊层。 阻焊层形成在导电图案层上的连接端子周围，但不形成在导电图案层上的其他区域的至少一部分中。

公开(公告)号：US20090255716A1

公开(公告)日：2009-10-15

申请号：US12488207

申请日：2009-06-19

申请人： Takashi KARIYA ,  Toshiki FURUTANI ,  Takeshi KAWANISHI

发明人： Takashi KARIYA ,  Toshiki FURUTANI ,  Takeshi KAWANISHI

IPC分类号： H05K1/00

CPC分类号： H01L21/4857 ,  H01L21/486 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/112 ,  H05K3/4602 ,  H05K3/4688 ,  H05K2201/0187 ,  H05K2201/10674 ,  H01L2224/05599

摘要： A circuit wiring board including a wiring substrate, and a heat resistant substrate accommodated in the wiring substrate and having a thermal expansion coefficient in a range between 3 ppm to 10 ppm and including a core substrate and a built-up wiring layer formed over the core substrate, the built-up wiring layer including conductive layers, interlayer resin insulating layers and a via hole conductor connecting the conductive layers through one of the interlayer resin insulating layers.

摘要翻译： 一种电路布线板，包括布线基板和容纳在所述布线基板中的耐热基板，其热膨胀系数在3ppm至10ppm之间的范围内，并且包括芯基板和形成在所述芯上的积层布线层 衬底，包括导电层的积层布线层，层间树脂绝缘层和通过层间树脂绝缘层之一连接导电层的通孔导体。