公开(公告)号：US08837772B2

公开(公告)日：2014-09-16

申请号：US12468224

申请日：2009-05-19

申请人： Tsann-Tay Tang ,  Chih-Wei Lin ,  Ming-Yu Shih

发明人： Tsann-Tay Tang ,  Chih-Wei Lin ,  Ming-Yu Shih

IPC分类号： G06K9/00

CPC分类号： G06K9/00771 ,  G06K9/4671

摘要： An image detecting method and a system thereof are provided. The image detecting method includes the following steps. An original image is captured. A moving-object image of the original image is created. An edge-straight-line image of the original image is created, wherein the edge-straight-line image comprises a plurality of edge-straight-lines. Whether the original image has a mechanical moving-object image is detected according to the length, the parallelism and the gap of the part of the edge-straight-lines corresponding to the moving-object image.

摘要翻译： 提供了一种图像检测方法及其系统。 图像检测方法包括以下步骤。 捕获原始图像。 创建原始图像的移动物体图像。 创建原始图像的边缘直线图像，其中边缘直线图像包括多条边缘直线。 根据对应于移动物体图像的边缘直线的一部分的长度，平行度和间隙来检测原始图像是否具有机械移动物体图像。

公开(公告)号：US20100098292A1

公开(公告)日：2010-04-22

申请号：US12468224

申请日：2009-06-11

申请人： Tsann-Tay Tang ,  Chih-Wei Lin ,  Ming-Yu Shih

发明人： Tsann-Tay Tang ,  Chih-Wei Lin ,  Ming-Yu Shih

IPC分类号： G06K9/00

CPC分类号： G06K9/00771 ,  G06K9/4671

摘要： An image detecting method and a system thereof are provided. The image detecting method includes the following steps. An original image is captured. A moving-object image of the original image is created. An edge-straight-line image of the original image is created, wherein the edge-straight-line image comprises a plurality of edge-straight-lines. Whether the original image has a mechanical moving-object image is detected according to the length, the parallelism and the gap of the part of the edge-straight-lines corresponding to the moving-object image.

摘要翻译： 提供了一种图像检测方法及其系统。 图像检测方法包括以下步骤。 捕获原始图像。 创建原始图像的移动物体图像。 创建原始图像的边缘直线图像，其中边缘直线图像包括多条边缘直线。 根据对应于移动物体图像的边缘直线的一部分的长度，平行度和间隙来检测原始图像是否具有机械移动物体图像。

公开(公告)号：US10128206B2

公开(公告)日：2018-11-13

申请号：US12904506

申请日：2010-10-14

申请人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Meng-Wei Chou ,  Hung-Jui Kuo ,  Chung-Shi Liu

发明人： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Meng-Wei Chou ,  Hung-Jui Kuo ,  Chung-Shi Liu

IPC分类号： H01L21/768 ,  H01L23/48 ,  H01L23/00

摘要： The invention relates to a bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a contact pad over the substrate; a passivation layer extending over the substrate having an opening over the contact pad; and a conductive pillar over the opening of the passivation layer, wherein the conductive pillar comprises an upper portion substantially perpendicular to a surface of the substrate and a lower portion having tapered sidewalls.

公开(公告)号：US09679836B2

公开(公告)日：2017-06-13

申请号：US13298102

申请日：2011-11-16

申请人： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

发明人： Ching-Wen Hsiao ,  Ming-Da Cheng ,  Chih-Wei Lin ,  Chen-Shien Chen ,  Chih-Hua Chen ,  Chen-Cheng Kuo

IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L21/683 ,  H01L25/10 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49822 ,  H01L24/16 ,  H01L25/105 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/014 ,  H01L2924/00

摘要： A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A solder region is disposed in the polymer region and electrically coupled to the redistribution line. The solder region includes a second flat top surface not higher than the first flat top surface.

公开(公告)号：US09312214B2

公开(公告)日：2016-04-12

申请号：US13240629

申请日：2011-09-22

申请人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/60 ,  H01L21/50 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00

CPC分类号： H01L23/49816 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.

摘要翻译： 一种方法包括在载体上涂覆含聚合物的材料，并在载体上形成通孔。 通孔位于含聚合物的材料的内部，并且基本上穿透包含聚合物的材料。 在包含聚合物的材料的第一面上形成第一再分配线。 第二再分配线形成在与第一侧相对的含聚合物材料的第二侧上。 第一再分配线通过通孔电耦合到第二再分配线。

公开(公告)号：US08843860B2

公开(公告)日：2014-09-23

申请号：US13409517

申请日：2012-03-01

申请人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

发明人： Chin-Ming Lin ,  Chia-hung Huang ,  Chi-Ming Yang ,  Chin-Hsiang Lin ,  Yung-Cheng Chen ,  Chih-Wei Lin

IPC分类号： G06F17/50 ,  G03F7/20

CPC分类号： G03F7/70433

摘要： A method includes establishing an initial shot layout in which a number of shots are arranged in vertically aligned columns and horizontally aligned rows to cover a semiconductor wafer. At least one of a row of shots or a column of shots is shifted relative to an adjacent row or column of shots to establish at least one additional shot layout that differs from the initial shot layout in that shots in the at least one shifted row or column of shots are not aligned with the shots in the adjacent row or column of shots with which they were aligned in the initial shot layout. One of the initial shot layout and the at least one additional shot layout is selected as a final shot layout. The wafer is exposed to light using the final shot layout.

摘要翻译： 一种方法包括建立初始照片布局，其中多个照片布置在垂直排列的列和水平排列的行中以覆盖半导体晶片。 一排照片或一列照片中的至少一列相对于相邻的行或列发射位移，以建立与至少一个移位行中的拍摄中的初始镜头布局不同的至少一个附加镜头布局，或 一列照片不与在初始镜头布局中对齐的相邻行或照片列中的镜头对齐。 选择初始镜头布局和至少一个附加镜头布局之一作为最终镜头布局。 使用最终镜头布局将晶片曝光。

公开(公告)号：US08809117B2

公开(公告)日：2014-08-19

申请号：US13270890

申请日：2011-10-11

申请人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

摘要： Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.

摘要翻译： 公开了用于半导体器件的封装处理工具和封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括包括框架的机械结构。 框架包括适于将多个集成电路管芯保持在其中的多个孔。 框架包括至少一个中空区域。

公开(公告)号：US08570010B2

公开(公告)日：2013-10-29

申请号：US12913779

申请日：2010-10-28

申请人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

发明人： Chih-Wei Lin ,  Nung-Te Huang ,  Chih-Wan Hsu

IPC分类号： G05F1/00 ,  G05F1/565

CPC分类号： H02M3/1584

摘要： A multiphase power supply device and a current adjusting method thereof are provided in the application. The multiphase power supply device outputs power sources and currents with different phases to a microprocessor, and a detection module detects present temperature values of each phase power source to adjust currents of each phase power source to achieve thermal balance. The multiphase power supply device further can automatically measure the power efficiency and display results including the detected temperature values of each phase power source and the power efficiency on a screen, and thus the user can know the operation efficiency of the power supply device conveniently.

摘要翻译： 本申请中提供了多相电源装置及其电流调节方法。 多相电源装置向微处理器输出具有不同相位的电源和电流，并且检测模块检测每相电源的当前温度值，以调节每相电源的电流以实现热平衡。 多相电源装置还可以自动测量功率效率和显示结果，包括各相电源的检测温度值和屏幕上的电源效率，从而使用户可以方便地了解电源设备的运行效率。

公开(公告)号：US08501610B2

公开(公告)日：2013-08-06

申请号：US12714194

申请日：2010-02-26

申请人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

发明人： Chih-Wei Lin ,  Yi-Fang Lee ,  Cheng-Ta Wu ,  Cheng-Yuan Tsai

IPC分类号： H01L21/3205

CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/7881

摘要： Non-volatile memories and methods of fabrication thereof are described. In one embodiment, a method of fabricating a semiconductor device includes forming an oxide layer over a semiconductor substrate, and exposing the oxide layer to a first nitridation step to form a first nitrogen rich region. The first nitrogen rich region is disposed adjacent an interface between the oxide layer and the semiconductor substrate. After the first nitridation step, the oxide layer is exposed to a second nitridation step to form a second nitrogen rich region. A first gate electrode is formed on the oxide layer, wherein the second nitrogen rich region is disposed adjacent an interface between the oxide layer and the first gate electrode.

摘要翻译： 描述了非易失性存储器及其制造方法。 在一个实施例中，制造半导体器件的方法包括在半导体衬底上形成氧化物层，并将氧化物层暴露于第一氮化步骤以形成第一富氮区域。 第一富氮区域设置在氧化物层和半导体衬底之间的界面附近。 在第一次氮化步骤之后，将氧化物层暴露于第二氮化步骤以形成第二富氮区域。 第一栅电极形成在氧化物层上，其中第二富氮区邻近氧化物层和第一栅电极之间的界面设置。

公开(公告)号：US20130181338A1

公开(公告)日：2013-07-18

申请号：US13349405

申请日：2012-01-12

申请人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

发明人： Wen-Hsiung Lu ,  Yi-Wen Wu ,  Chih-Wei Lin ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC分类号： H01L23/498 ,  H01L21/20

CPC分类号： H01L23/3192 ,  H01L21/56 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3157 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02331 ,  H01L2224/03823 ,  H01L2224/0401 ,  H01L2224/05007 ,  H01L2224/05008 ,  H01L2224/05082 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05548 ,  H01L2224/05564 ,  H01L2224/05567 ,  H01L2224/05611 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/10126 ,  H01L2224/11464 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/73104 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01047 ,  H01L2924/01029 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： A structure comprises a post passivation interconnect layer formed over a semiconductor substrate, a metal bump formed over the post passivation interconnect layer and a molding compound layer formed over the semiconductor substrate. A lower portion of the metal bump is embedded in the molding compound layer and a middle portion of the metal bump is surrounded by a concave meniscus molding compound protection layer.

摘要翻译： 一种结构包括形成在半导体衬底上的后钝化互连层，形成在后钝化互连层上的金属凸块和形成在半导体衬底上的模塑复合层。 金属凸块的下部嵌入在模塑料层中，并且金属凸块的中间部分被凹弯月面模塑料保护层包围。