公开(公告)号：EP2731132A3

公开(公告)日：2017-05-17

申请号：EP13191021.8

申请日：2013-10-31

申请人： Delta Electronics, Inc.

发明人： Lee, Chia-Yen ,  Tsai, Hsin-Chang ,  Lee, Peng-Hsin

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L21/60 ,  H01L25/065 ,  H01L23/485

CPC分类号： H01L21/76898 ,  H01L21/268 ,  H01L21/2885 ,  H01L21/76834 ,  H01L21/76879 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/91 ,  H01L25/074 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0332 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/73221 ,  H01L2224/73255 ,  H01L2224/73257 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/13064 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.

摘要翻译： 一种封装结构，包括：第一半导体器件，包括第一半导体衬底和第一电子器件，所述第一半导体器件具有第一侧和第二侧，其中所述第一电子器件的至少一部分与所述第一侧相邻，以及 所述第一半导体器件具有穿过所述第一半导体器件形成的通孔，其中所述通孔具有与所述第一侧相邻的第一开口; 布置在所述第一半导体器件中的互连结构，其中所述互连结构包括：通孔结构，设置在所述通孔中而不超过所述第一开口; 布置在第一半导体器件的第一侧上并覆盖通孔的第一焊盘; 以及与第一半导体器件垂直集成的第二半导体器件。

公开(公告)号：EP3036762A4

公开(公告)日：2017-03-22

申请号：EP14837815

申请日：2014-03-26

申请人： LG ELECTRONICS INC

发明人： RHEE BYUNGJOON

IPC分类号： H01L23/48 ,  H01L23/492 ,  H01L33/62

CPC分类号： H01L33/62 ,  C09J9/02 ,  C09J2201/602 ,  H01L23/4828 ,  H01L23/4922 ,  H01L23/5328 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L33/36 ,  H01L33/38 ,  H01L51/5246 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/1411 ,  H01L2224/2929 ,  H01L2224/29355 ,  H01L2224/29386 ,  H01L2224/29561 ,  H01L2224/29644 ,  H01L2224/29655 ,  H01L2224/81191 ,  H01L2224/81903 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2225/1058 ,  H01L2924/12041 ,  H01L2924/156 ,  H01L2924/35 ,  H01L2924/36 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2224/83

摘要： A semiconductor device includes an electrode including a plurality of pillars, a semiconductor element configured to be electrically-connected with the electrode, a substrate having electrode patterns, and a conductive adhesive layer located between the substrate and the electrode, the conductive adhesive layer including conductive substances configured to electrically-connect the pillars and the electrode patterns to each other, and including a body which encloses the conductive substances.

摘要翻译： 一种半导体器件，包括：包括多个柱的电极;被配置为与所述电极电连接的半导体元件;具有电极图案的基板;以及位于所述基板和所述电极之间的导电粘合剂层，所述导电粘合剂层包括导电 被配置为将所述柱和所述电极图案彼此电连接的物质，并且包括包围所述导电物质的主体。

公开(公告)号：EP2002478B1

公开(公告)日：2016-09-07

申请号：EP07735213.6

申请日：2007-03-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： WYLAND, Chris

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L21/60 ,  H01L23/485 ,  H01L23/488 ,  H01L23/49

CPC分类号： H01L24/49 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2223/6611 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49175 ,  H01L2224/73277 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Consistent with an example embodiment, there is an integrated circuit (IC) device in a packaging having electrically insulated connections. The IC device comprises a semiconductor device (100) mounted onto a die attachment area (10); the semiconductor device has a plurality of bonding pads (20a, 25a, 30a, 35a). A lead frame having a plurality of bonding fingers (20b, 25b, 30b, 35b) surrounds the die attachment area. A plurality of mutually isolated connection conductors (25d, 30d, 40, 50) having respective first ends are attached to respective bonding pads on the semiconductor device and the plurality of mutually isolated connection conductors having respective second respective second ends are attached to respective bonding fingers of the lead frame. An insulating material (45) coats at least a portion of the plurality of mutually isolated connection conductors. The mutually isolated connection conductors may include a bond wire (40, 50) for the signal connection and a conductive strap (25d, 30d) for the voltage reference connection. The insulating material (45) coating the bond wires reduces the likelihood of short circuits during encapsulation.

公开(公告)号：EP2880684A1

公开(公告)日：2015-06-10

申请号：EP13748197.4

申请日：2013-07-31

申请人： Invensas Corporation

发明人： MOHAMMED, Ilyas

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10 ,  H01L25/18

CPC分类号： H01L25/0657 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/91 ,  H01L24/92 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/0233 ,  H01L2224/02371 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/24011 ,  H01L2224/24147 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/73217 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/83855 ,  H01L2224/9202 ,  H01L2224/92144 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/18161 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/00014 ,  H05K3/4661 ,  H01L2924/00012 ,  H01L2924/00

摘要： A microelectronic package includes first and second encapsulated microelectronic elements, each of which includes a semiconductor die having a front face and contacts thereon. An encapsulant contacts at least an edge surface of each semiconductor die and extends in at least one lateral direction therefrom. Electrically conductive elements extend from the contacts and over the front face to locations overlying the encapsulant. The first and second microelectronic elements are affixed to one another such that one of the front or back surfaces of one of the first and second semiconductor dies is oriented towards one of the front or back surfaces of the other of the first and second semiconductor dies. A plurality of electrically conductive interconnects extend through the encapsulants of the first and second microelectronic elements and are electrically connected with at least one semiconductor die of the first and second microelectronic elements by the conductive elements.

摘要翻译： 微电子封装包括第一和第二封装的微电子元件，每个元件包括具有正面和与其接触的半导体管芯。 密封剂与每个半导体管芯的至少边缘表面相接触，并沿其至少一个横向延伸。 导电元件从触头延伸并且在正面上延伸到覆盖密封剂的位置。 第一和第二微电子元件彼此固定，使得第一和第二半导体管芯之一的前表面或后表面中的一个朝向第一和第二半导体管芯中另一个的前表面或后表面中的一个。 多个导电互连延伸穿过第一和第二微电子元件的密封剂并且通过导电元件与第一和第二微电子元件的至少一个半导体管芯电连接。

公开(公告)号：EP2731132A2

公开(公告)日：2014-05-14

申请号：EP13191021.8

申请日：2013-10-31

申请人： Delta Electronics, Inc.

发明人： Lee, Chia-Yen ,  Tsai, Hsin-Chang ,  Lee, Peng-Hsin

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L21/60 ,  H01L25/065

CPC分类号： H01L21/76898 ,  H01L21/268 ,  H01L21/2885 ,  H01L21/76834 ,  H01L21/76879 ,  H01L21/76895 ,  H01L23/481 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/91 ,  H01L25/074 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/02372 ,  H01L2224/0332 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/17181 ,  H01L2224/73221 ,  H01L2224/73255 ,  H01L2224/73257 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/13064 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

摘要： A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.

摘要翻译： 一种封装结构，包括：第一半导体器件，包括第一半导体衬底和第一电子器件，所述第一半导体器件具有第一侧和第二侧，其中所述第一电子器件的至少一部分与所述第一侧相邻，以及 第一半导体器件具有通过第一半导体器件形成的通孔，其中通孔具有与第一侧相邻的第一开口; 布置在所述第一半导体器件中的互连结构，其中所述互连结构包括：通孔结构，其设置在所述通孔中而不超过所述第一开口; 第一焊盘，设置在第一半导体器件的第一侧并覆盖通孔; 以及与第一半导体器件垂直集成的第二半导体器件。

公开(公告)号：EP2572373A2

公开(公告)日：2013-03-27

申请号：EP11729434.8

申请日：2011-05-17

申请人： Corelase OY

发明人： KANGASTUPA, Jarno ,  AMBERLA, Tiina ,  YAMADA, Kazuo

IPC分类号： H01L21/60 ,  B23K26/00 ,  C03C27/00 ,  G02F1/13

CPC分类号： H01L24/91 ,  B23K26/0006 ,  B23K26/0054 ,  B23K26/244 ,  B23K2203/56 ,  G02F1/1339 ,  G02F1/1345 ,  H01L23/562 ,  H01L24/80 ,  H01L24/83 ,  H01L2224/056 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/29171 ,  H01L2224/2918 ,  H01L2224/80001 ,  H01L2224/80224 ,  H01L2224/80359 ,  H01L2224/80488 ,  H01L2224/83193 ,  H01L2224/83224 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83471 ,  H01L2224/8348 ,  H01L2224/9211 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01059 ,  H01L2924/01066 ,  H01L2924/01068 ,  H01L2924/0107 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01105 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2924/01014 ,  H01L2924/3512 ,  H01L2924/00

摘要： The invention concerns a method of fusing and electrically contacting a first insulating substrate (28A) having at least one first conductive layer (29A) thereon with at least one second insulating substrate (28B) having at least one second conductive layer (29B) thereon, the method comprising: stacking the first and second substrates (28A, 28B) such that an interface zone is formed between them, the interface zone comprising an electrical contacting zone where at least one first conductive layers (29A) faces and is at least partially aligned with at least one second conductive layer (29B), and a substrate fusing zone where the insulating substrates (28A, 28B) directly face each other; focusing to the interface zone of the substrates (28A, 28B) through one of the substrates (28A, 28B) a plurality of sequential focused laser pulses from a laser source, the pulse duration, pulse frequency and pulse power of the laser light being chosen to provide local melting the substrate (28A, 28B) materials and the conductive layers (29A, 29B); and moving the laser source and the substrate with respect to each other at a predetermined velocity and path so that a structurally modified zone is formed to the interface zone, the structurally modified zone overlapping with said electrical contacting zone and said substrate fusing zone. The invention provides a convenient way of manufacturing well-sealed joints and electrical contacts for multifunction electronic devices, for example.

公开(公告)号：EP2295993A1

公开(公告)日：2011-03-16

申请号：EP10183958.7

申请日：2006-05-23

申请人： ALLEGRO MICROSYSTEMS INC.

发明人： Doogue, Michael, C ,  Sharma, Nirmal ,  Gagnon, Jay ,  Dickinson, Richard

IPC分类号： G01R15/20 ,  H01L43/06

CPC分类号： G01R15/207 ,  G01R1/18 ,  G01R15/202 ,  H01L23/552 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L24/91 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2224/73221 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit comprises a lead frame portion having a plurality of leads; a first current conductor portion comprising at least two of the plurality of leads; a substrate having first and second opposing surfaces, the first surface proximate to said first current conductor portion and the second surface distal from said first current conductor portion; one or more magnetic field transducers disposed on the first surface of said substrate; and a second current conductor portion deposited on the first surface of the substrate, disposed proximate to the one or more magnetic field transducers, and coupled to the first current conductor portion.

摘要翻译： 集成电路包括具有多个引线的引线框架部分; 包括所述多个引线中的至少两个引线的第一电流导体部分; 具有第一和第二相对表面的基板，靠近所述第一电流导体部分的第一表面和远离所述第一电流导体部分的第二表面; 设置在所述基板的第一表面上的一个或多个磁场换能器; 以及沉积在所述基板的所述第一表面上的第二电流导体部分，所述第二电流导体部分设置在所述一个或多个磁场换能器附近并耦合到所述第一电流导体部分。

公开(公告)号：EP1360715A2

公开(公告)日：2003-11-12

申请号：EP02702354.8

申请日：2002-02-13

申请人： Pac Tech - Packaging Technologies GmbH

发明人： ZAKEL, Elke ,  TEUTSCH, Thorsten

IPC分类号： H01L21/56

CPC分类号： H01L21/563 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/13006 ,  H01L2224/73203 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81903 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83855 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/00014

摘要： The invention relates to a method for contacting microchips, whereby an adhesive agent is applied to a side of a substrate on which a strip conductor is arranged, and/or to a side of a microchip on which at least one bump is situated, in such a way that a liquid layer of the adhesive agent is formed on the same. After the microchip has been adjusted in such a way that the at least one bump is situated over a pre-determined position on the strip conductor of the substrate, a pressure contact is established between the at least one bump and the pre-determined position by exerting pressure between the microchip and the substrate, said adhesive agent then being hardened.

公开(公告)号：EP1039540A1

公开(公告)日：2000-09-27

申请号：EP00110728.3

申请日：1996-10-24

申请人： Oki Electric Industry Co., Ltd.

发明人： Yamada, Shigeru, c/o Oki Electric Ind. Co., Ltd. ,  Uchida, Yasufumi, c/o Oki Electric Ind. Co., Ltd. ,  Murakami, Noriko, c/o Oki Electric Ind. Co., Ltd. ,  Shizuno, Yoshinori, c/o Oki Electric Ind. Co.,Ltd.

IPC分类号： H01L23/495 ,  H01L23/31 ,  H01L21/60 ,  H01L23/498 ,  H01L23/367

CPC分类号： H01L24/11 ,  H01L23/055 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/49503 ,  H01L23/49531 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/78 ,  H01L24/81 ,  H01L24/85 ,  H01L24/91 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/81801 ,  H01L2224/85205 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01023 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2224/13099 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： According to a typical invention of the inventions disclosed in the present application, a semiconductor chip with an electronic circuit formed therein is fixed to a die pad for a lead frame having projections formed on the back thereof, with an organic dies bonding agent. Pads on the semiconductor chip, and inner leads are respectively electrically connected to one another by metal thin lines. These portions are sealed with a molding resin. Further, each inner lead extends to the outside of the molding resin and is processed into gull-wing form for substrate mounting. Moreover, the inner lead is processed by soldering so that an external terminal is formed. Thus, since the projections are provided on the back of the die pad, the back of a packing material is brought into point contact with that of the die pad as compared with the conventional face-to-face contact. It is therefore possible to minimize the transfer of organic substances from the packing material. Further, since such transfer that a reduction in adhesive property occurs in the back of the die pad, is greatly reduced, the adhesiveness between the upper surface of the die pad and the molding resin is improved, whereby the resistance of SMD to the reflow is enhanced.

公开(公告)号：EP0340466B1

公开(公告)日：1994-11-09

申请号：EP89105967.7

申请日：1989-04-05

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Saeki, Shuzo c/o Patent Division ,  Hideshima, Makoto c/o Patent Division

IPC分类号： H01L23/49 ,  H01L23/049

CPC分类号： H01L24/72 ,  H01L23/049 ,  H01L23/49562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/91 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/2076 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device includes a metallic electrode (4) formed on a semiconductor substrate (1), and a metallic terminal (11E) formed on a metal base through an insulating material, in parallel to the metal electrode (4). A metallic wire (12) electrically connects the metallic electrode to the metallic terminal. In a metallic conductor (23) having a current capacity larger than that of the metallic wire, one end is in contact with the metallic electrode, and the other end is in contact with the metallic electrode.

摘要翻译： 半导体器件包括形成在半导体衬底（1）上的金属电极（4）和与金属电极（4）平行的通过绝缘材料形成在金属基底上的金属端子（11E）。 金属线（12）将金属电极与金属端子电连接。 在具有大于金属线的电流容量的金属导体（23）中，一端与金属电极接触，另一端与金属电极接触。