公开(公告)号：EP0657932B1

公开(公告)日：2001-09-05

申请号：EP94119486.2

申请日：1994-12-09

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Tomura, Yoshihiro ,  Bessho, Yoshihiro ,  Hakotani, Yasuhiko

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H05K3/4007 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K1/181 ,  H05K3/243 ,  H05K3/321 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2201/10568 ,  H05K2201/10719 ,  H05K2201/10984 ,  H05K2203/0577 ,  H05K2203/167 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

公开(公告)号：EP1011139A4

公开(公告)日：2001-03-28

申请号：EP98905817

申请日：1998-03-09

Applicant: IBIDEN CO LTD

Inventor： TAKADA MASARU ,  MINOURA HISASHI ,  TSUKADA KIYOTAKA ,  KOBAYASHI HIROYUKI ,  KONDO MITSUHIRO

IPC: H05K3/00 ,  H01L23/12 ,  H01L23/498 ,  H01L23/50 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K3/38 ,  H05K3/46

CPC classification number: H01L24/49 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/351 ,  H05K1/021 ,  H05K1/113 ,  H05K1/114 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/3457 ,  H05K3/385 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09527 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2203/0315 ,  H05K2203/0554 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n-1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the internal insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.

公开(公告)号：EP1062634A1

公开(公告)日：2000-12-27

申请号：EP00900614.9

申请日：2000-01-19

Applicant: BULL CP8

Inventor： CARPIER, Roland ,  LAUVERNIER, Christine ,  LE LOC'H, Alain

IPC: G06K19/077

CPC classification number: G06K19/07769 ,  G06K19/07749 ,  G06K19/0775 ,  H01L2224/48227 ,  H01L2924/01057 ,  H01L2924/01078 ,  H05K1/112 ,  H05K1/183 ,  H05K3/3436 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10477 ,  H05K2203/0465 ,  Y02P70/613

Abstract: The invention concerns a chip card comprising a base body consisting of electrically insulating layers, the card bearing on one of its layers an open-loop antenna (6) having two ends, said body being provided with a cavity housing a micromodule (1) designed to be connected to said open-loop antenna by two terminals (31, 32), said micromodule comprising an electrically insulating support (2) bearing, on one first surface, a semiconductor component (3) and, on a second surface, several electric contact pads. The invention is characterised in that two contact pads (22, 23) are arranged in a strip passing through a central region of the support, said terminals being connected to said two contact pads respectively through said support, the two contact pads being connected to the antenna two ends respectively.

公开(公告)号：EP1030366A2

公开(公告)日：2000-08-23

申请号：EP00102116.1

申请日：2000-02-04

Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.

Inventor： Kimbara, Hidenori, Mitsubishi Gas Chem. Co., Inc. ,  Ikeguchi, Nobuyuki, Mitsubishi Gas Chem. Co., Inc. ,  Komatsu, Katsuji, Mitsubishi Gas Chem. Co., Inc.

IPC: H01L23/32 ,  H01L23/498

CPC classification number: H01L24/45 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49866 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/01105 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/40252 ,  H05K1/0373 ,  H05K1/112 ,  H05K3/0038 ,  H05K3/3436 ,  H05K3/4629 ,  H05K2201/0209 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0979 ,  Y02P70/613 ,  Y10T428/24917 ,  Y10T428/31681 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0002 ,  H01L2224/45099 ,  H01L2224/43

Abstract: Provided is a printed wiring board for a chip size scale package, which overcomes the poor adhesion of solder balls to a base material which poor adhesion is caused by a recent decrease in the size of the solder balls, and in the chip size scale package, the distortion of the printed wiring board is decreased and the distortion of a semiconductor plastic package formed by mounting a semiconductor chip on the printed wiring board by wire bonding or flip chip bonding is decreased. The printed wiring board has, as a substrate for a chip scale package, a double-side copper-clad laminate formed of an insulation layer and having copper foils on both surfaces,
   wherein the double-side copper-clad laminate has an upper copper foil surface and a lower copper foil surface,

the upper copper foil surface has a wire bonding or flip chip bonding terminal and has a copper pad in a position where the copper pad can be electrically connected to said wire bonding or flip chip bonding terminal and can be connected to a blind via hole formed in the lower copper surface,
the lower copper foil surface has a solder-balls-fixing pad in a position corresponding to said copper pad,
the solder-balls-fixing pad has at least 2 blind via holes within itself, and
the solder-balls-fixing pad connected to a reverse surface of the copper pad with a conductive material is electrically connected with solder balls which are melted and filled in blind via holes so as to be mounded.

公开(公告)号：EP1014096A2

公开(公告)日：2000-06-28

申请号：EP99310179.9

申请日：1999-12-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO. LTD.

Inventor： Muramatsu, Shigetsugu ,  Horiuchi, Michio ,  Kazama, Takuya

IPC: G01R1/04

CPC classification number: H05K1/112 ,  G01R31/2886 ,  H01L2224/16237 ,  H05K1/0393 ,  H05K3/06 ,  H05K3/325 ,  H05K2201/0394 ,  H05K2201/09472 ,  H05K2201/10734

Abstract: A substrate (50) is used for inspecting an electronic device (40) having bump-shaped connection terminals (42), and is used for an electrical test on the electronic device (40). The substrate includes opening sections (11), the diameter of which are determined so that a connection terminal (42) can be inserted into and drawn out from the opening (11), which are formed in a region on one side of an insulating substrate (10). The substrate (10) has an arrangement of connection terminals (20); and wiring patterns (14, 16) which corresponds to those of the electronic device (40). Each of the wiring patterns is composed of a pad section (16) exposed on a bottom face of the opening (11) so that the pad (16) can come into contact with the connection terminal (42) to accomplish electrical continuity, a connecting pad section (20) which is formed in a region outside of the region in which the pad section (16) is formed, and which comes into contact with a contact terminal (35) of an inspection device so as to accomplish electrical continuity, and a wiring section (14) for electrically connecting the pad section (16) with the connecting pad section (20). The wiring patterns (14, 16, 20) are formed on the other side of the insulating substrate (10).

Abstract translation: 基板（50）用于检查具有凸起状连接端子（42）的电子设备（40），并用于电子设备（40）的电气测试。 衬底包括开口部分（11），其直径被确定为使得可以将连接端子（42）插入并从开口（11）中拉出，该开口部分形成在绝缘衬底的一侧的区域中 （10）。 基板（10）具有连接端子（20）的布置。 以及对应于电子设备（40）的布线图案（14,16）。 每个布线图案由露出在开口（11）的底面上的垫部分（16）组成，使得垫（16）可以与连接端子（42）接触以实现电连续性，连接 衬垫部分（20），其形成在形成有所述衬垫部分（16）的区域的外侧的区域中，并且与所述检查装置的接触端子（35）接触以实现电连续性;以及 用于将焊盘部分（16）与连接焊盘部分（20）电连接的接线部分（14）。 布线图案（14,16,20）形成在绝缘基板（10）的另一侧。

公开(公告)号：EP0883173A1

公开(公告)日：1998-12-09

申请号：EP96930376.7

申请日：1996-09-12

Applicant: Ibiden Co., Ltd.

Inventor： ASAI, Motoo ,  KAWAMURA, Yoichiro ,  MORI, Yoji

IPC: H01L23/12 ,  H05K1/03

CPC classification number: H01L23/49833 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5384 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15173 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01R12/523 ,  H05K1/0271 ,  H05K1/112 ,  H05K1/114 ,  H05K3/184 ,  H05K3/4602 ,  H05K3/4661 ,  H05K2201/0212 ,  H05K2201/09227 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09727 ,  H05K2201/10674 ,  H05K2201/10734

Abstract: A board for mounting electronic circuit parts includes a first connection terminal group including a plurality of connection terminals densely formed on the top surface of a substrate having through holes formed therein, and a second connection terminal group including a plurality of connection terminals formed at at least the peripheral portion of a back surface of the substrate. The first connection terminal group is connected to the second connection terminal group by way of the through holes. A build-up multilayer interconnection layer having via holes is formed on the top surface of the substrate, so that the first connection terminal group is connected to the second connection terminal group through the build-up multilayer interconnection layer and the through holes. According to another aspect, each signal line on the top surface of the build-up multilayer interconnection layer comprises a plurality of wiring patterns having different widths and a taper-shaped pattern that connects those wiring patterns together and whose width continuously changes. Each signal line has a smaller width at an area having a relatively high wiring density than at an area having a relatively low wiring density.

Abstract translation: 用于安装电子电路部件的板包括：第一连接端子组，包括密实地形成在其上形成有通孔的基板的顶表面上的多个连接端子，以及包括至少形成有多个连接端子的第二连接端子组 衬底的背面的周边部分。 第一连接端子组通过通孔连接到第二连接端子组。 在基板的顶面形成有具有通孔的积层多层互连层，使得第一连接端子组通过积层多层互连层和通孔与第二连接端子组连接。 根据另一方面，积层多层互连层的顶表面上的每个信号线包括具有不同宽度的多个布线图案和将这些布线图案连接在一起并且其宽度连续变化的锥形图案。 每个信号线在具有比布线密度相对较低的区域具有相对高的布线密度的区域上具有较小的宽度。

公开(公告)号：EP0853342A1

公开(公告)日：1998-07-15

申请号：EP97930854.1

申请日：1997-07-22

Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA

Inventor： INOUE, Masajiro

IPC: H01L25/04 ,  H01L21/60 ,  H01L23/32

CPC classification number: H01R13/2414 ,  H01L21/563 ,  H01L24/29 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/11822 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29386 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/0106 ,  H01L2924/01063 ,  H01L2924/01067 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/12042 ,  H01L2924/15312 ,  H01L2924/1579 ,  H01L2924/351 ,  H05K1/113 ,  H05K3/0064 ,  H05K3/28 ,  H05K3/321 ,  H05K2201/0367 ,  H05K2201/09472 ,  H05K2201/09909 ,  H05K2201/10303 ,  H05K2201/10424 ,  H05K2201/10674 ,  H05K2201/10704 ,  Y10T29/4913 ,  Y10T29/49147 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/05442 ,  H01L2224/05599

Abstract: A plug-in type electronic control unit is comprised of a wiring board, a plurality of electronic parts mounted on one surface of the wiring board by utilizing a wireless bonding process, and a plug member mounted on the other surface of the wiring board by utilizing a wireless bonding process. It is possible to suppress the planar extent of the unit by such a laminated structure, and to suppress the extent of the unit in a laminating direction by the employment of the wireless bonding process. Thus, it is possible to achieve a reduction in size of the plug-in type electronic control unit.

Abstract translation: 插电式电子控制单元由布线板，通过利用无线接合工艺安装在布线板的一个表面上的多个电子部件和通过利用布线板安装在布线板的另一个表面上的插头构件 无线绑定过程。 通过这样的层叠结构，可以抑制单位的平面化程度，并且通过使用无线接合处理来抑制单元在层叠方向上的程度。 因此，可以实现插入式电子控制单元的尺寸的减小。

公开(公告)号：EP0823833A2

公开(公告)日：1998-02-11

申请号：EP97112872.3

申请日：1997-07-25

Applicant: IBIDEN CO, LTD.

Inventor： Asai, Motoo

IPC: H05K3/46

CPC classification number: H05K1/112 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/3452 ,  H05K3/3457 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2203/0338

Abstract: A multilayer printed circuit board comprises a core substrate, multilayer wiring layers formed thereon and a solder pad group formed by two-dimensionally arranging pads provided with solder bumps on the surface of the multilayer wiring layer, in which the solder pads of the solder pad group are arranged in only a peripheral portion other than a central portion to form a frame shape and the solder pads located at the outside part among the frame-shaped solder pad group are constructed with flat pads each connected to conductor pattern on their surface and solder bumps formed on the surfaces of the flat pads, while the solder pads located at the inside part are constructed with viaholes each connected to an innerlayer flat pad group located in an innerlayer and solder bumps formed in recess portions of these viaholes.

Abstract translation: 多层印刷电路板包括芯基板，其上形成有多层布线层，以及焊盘组，其通过在多层布线层的表面上设置有焊料凸块的二维布置焊盘形成，其中焊盘组的焊盘 仅布置在除了中心部分之外的周边部分中以形成框架形状，并且位于框状焊盘组中的外部部分处的焊盘被构造为平坦的焊盘，每个焊盘均在其表面上连接到导体图案，并且焊料凸块 形成在平坦焊盘的表面上，而位于内部部分的焊盘构成有通孔，每个通孔连接到位于内层中的内层平垫组和形成在这些通孔的凹部中的焊料凸块。

公开(公告)号：EP0817267A1

公开(公告)日：1998-01-07

申请号：EP97112006.8

申请日：1995-03-09

Applicant: The Panda Project

Inventor： Crane, Stanford W., Jr. ,  Portuondo, Maria M.

IPC: H01L23/498

CPC classification number: H01L23/49861 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/181 ,  H05K1/112 ,  H05K3/308 ,  H05K3/321 ,  H05K3/3421 ,  H05K3/4623 ,  H05K2201/09472 ,  H05K2201/09536 ,  H05K2201/09645 ,  H05K2201/10189 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10704 ,  H05K2201/10772 ,  H05K2201/10893 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor die package (30) includes a plurality of conductive leads (11) and a multi-layer structure (10) for carrying electrical signals, the multi-layer structure (10) including a plurality of layers of insulative material (12a-12d), each of the layers including a first surface and a second surface on an opposing side of the layer.
Each of the leads (11) extends into a corresponding well (15) extending completely through at least one of the layers and bottoming at one of the surfaces of one of the layers through which the well (15) does not extend and is electrically coupled to an electrically conductive bonding structure (13) formed within its corresponding well (15).

公开(公告)号：EP0609774B1

公开(公告)日：1997-04-09

申请号：EP94101191.8

申请日：1994-01-27

Applicant: International Business Machines Corporation

Inventor： Alpaugh, Warren A. ,  Markovich, Voya R. ,  Trivedi, Ajit K. ,  Zarr, Richard S.

IPC: H05K3/46 ,  H01L23/538

CPC classification number: H05K1/112 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L2224/16 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01087 ,  H01L2924/15173 ,  H05K3/0023 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/0094 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4652 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/0207 ,  H05K2203/1394 ,  H05K2203/1581 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49165