公开(公告)号：EP1553640A1

公开(公告)日：2005-07-13

申请号：EP03766716.9

申请日：2003-08-01

申请人： Nichia Corporation

发明人： KUSUSE, Takeshi, NICHIA CORPORATION ,  SAKAMOTO, Takahiko, NICHIA CORPORATION

IPC分类号： H01L33/00

CPC分类号： H01L33/60 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/156 ,  H01L33/08 ,  H01L33/20 ,  H01L33/32 ,  H01L33/385 ,  H01L33/62 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45169 ,  H01L2224/48091 ,  H01L2224/48139 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/49113 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01057 ,  H01L2924/01058 ,  H01L2924/01059 ,  H01L2924/0106 ,  H01L2924/01063 ,  H01L2924/01065 ,  H01L2924/01066 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/0107 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/00012

摘要： A nitride semiconductor light-emitting device includes a layered portion emitting light on a substrate. The layered portion includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer. The periphery of the layered portion is inclined, and the surface of the n-type semiconductor layer is exposed at the periphery. An n electrode is disposed on the exposed surface of the n-type semiconductor layer. This device structure can enhance the emission efficiency and the light extraction efficiency.

公开(公告)号：EP1542520A1

公开(公告)日：2005-06-15

申请号：EP03792769.6

申请日：2003-08-21

申请人： JSR Corporation

发明人： OHTA, Masaru c/o JSR CORPORATION ,  INOMATA, Katsumi c/o JSR CORPORATION ,  IWANAGA, Shinichiro c/o JSR CORPORATION

IPC分类号： H05K3/28 ,  H05K3/34

CPC分类号： H01L24/12 ,  H01L24/02 ,  H01L24/03 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10126 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H05K3/28 ,  H05K3/3473 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0577 ,  H05K2203/0793

摘要： A process for forming bumps on electrode pads performs at least the following steps (a) to (d) for a wiring board including a substrate and a plurality of electrode pads:

(a) a step of forming a laminated two-layer film on the wiring board and forming a pattern of apertures at positions corresponding to the electrode pads, the laminated two-layer film including a lower layer containing an alkali-soluble radiation-nonsensitive resin composition and an upper layer containing a negative radiation-sensitive resin composition;
(b) a step of filling a low-melting metal in the aperture pattern;
(c) a step of reflowing the low-melting metal by pressing or heating to form bumps; and
(d) a step of peeling and removing the laminated two-layer film from the board. The laminated film including two layers with different properties permits high resolution and easy peeling.

摘要翻译： 一种用于在电极焊盘上形成凸点进程执行至少下列步骤（a）至（d）为布线板，其包括基板和电极焊盘的多元性：（a）形成的层叠两层膜 - 上的的步骤 配线基板以及形成在对应于电极焊盘孔的图案，所述层叠两层膜包括下层含有超过碱可溶性辐射非敏感树脂组合物和含有负极辐射敏感性树脂组合物上层; （B）填充在孔图案的低熔点金属的工序; （C）通过压制或加热，以形成凸块回流所述低熔点金属的工序; 和（d）剥离除去层叠两层膜从基板的工序。 层压薄膜，包括两层具有不同性质允许高分辨率和容易剥离。

公开(公告)号：EP1122780A3

公开(公告)日：2004-01-02

申请号：EP01300797.6

申请日：2001-01-30

申请人： NGK INSULATORS, LTD.

发明人： Araki, Kiyoshi ,  Kida, Masahiro ,  Ishikawa, Takahiro ,  Bessyo, Yuki ,  Makino, Takuma

IPC分类号： H01L23/373

CPC分类号： H01L24/32 ,  C04B37/026 ,  C04B2235/3206 ,  C04B2235/3225 ,  C04B2235/3873 ,  C04B2235/616 ,  C04B2235/6565 ,  C04B2235/9607 ,  C04B2237/064 ,  C04B2237/083 ,  C04B2237/121 ,  C04B2237/122 ,  C04B2237/125 ,  C04B2237/127 ,  C04B2237/128 ,  C04B2237/365 ,  C04B2237/366 ,  C04B2237/368 ,  C04B2237/407 ,  C04B2237/56 ,  C04B2237/704 ,  C04B2237/706 ,  C04B2237/72 ,  C23C4/02 ,  C23C4/08 ,  C23C6/00 ,  C23C24/10 ,  C23C24/106 ,  H01L23/3733 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/473 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/351 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/252 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01022 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00015

摘要： The object is to provide a laminated radiation member and a power semiconductor apparatus in which no cracks occur due to thermal stress caused by cooling and thermal cycle and which are low in thermal resistance. This is attained by a laminated radiation member comprising a radiation plate, an insulation substrate bonded to the upper surface of the radiation plate and an electrode provided on the upper surface of the insulation substrate, which can be made by a method including a step of, if necessary, previously surface treating a bonding surface of the radiation plate and/or the insulation substrate to assure wettability with a hard solder or a metal, a step of interposing ceramic particles previously surface treated to assure wettability with a hard solder or a metal between the radiation plate and the insulation substrate, a step of disposing a hard solder above and/or below the ceramic particles, a step of heating the hard solder to a temperature higher than the melting point of the solder to melt the solder, a step of penetrating the molten hard solder into spaces between the ceramic particles to react the ceramic particles with the solder to produce a metal base composite material, and a step of bonding the radiation plate and the insulation substrate with the metal base composite material.

摘要翻译： 本发明的目的是提供一种层叠辐射构件和功率半导体装置，其中由于由冷却和热循环引起的热应力并且耐热性低而不会产生裂纹。 这是通过包括辐射板，粘合到辐射板的上表面的绝缘基板和设置在绝缘基板的上表面上的电极的层叠辐射构件来实现的，其可以通过包括以下步骤的方法制成： 如果需要，预先对辐射板和/或绝缘基板的接合表面进行表面处理，以确保用硬焊料或金属的润湿性;将预先表面处理的陶瓷颗粒插入以确保与硬焊料或金属之间的润湿性的步骤 辐射板和绝缘基板，在陶瓷颗粒上方和/或下方设置硬焊料的步骤，将硬焊料加热到高于焊料熔点的温度以熔化焊料的步骤， 将熔融的硬焊料穿透到陶瓷颗粒之间的空间中，以使陶瓷颗粒与焊料反应以产生金属基复合材料，以及a 用金属基复合材料接合辐射板和绝缘基板的步骤。

公开(公告)号：EP1334519A2

公开(公告)日：2003-08-13

申请号：EP01942135.3

申请日：2001-06-08

申请人： INTEL CORPORATION

发明人： SESHAN, Krishna

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05172 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01049 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30107 ,  Y10T428/12556 ,  H01L2224/29099 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/05655 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184

摘要： The present invention is an input/ouput for a device and it method of fabrication. The input/output of the present invention comprises a bond pad having a ball limiting metallurgy (BLM) formed thereon and a bump formed on the ball limiting metallurgy (BLM). In an embodiment of the present invention the ball limiting metallurgy comprises a first film comprising nickel, vanadium, and nitrogen. In the second embodiment of the present invention the bump limiting metallurgy includes a first alloy film comprising a nickel-niobium alloy.

公开(公告)号：EP0621981B1

公开(公告)日：2001-09-05

申请号：EP93903531.7

申请日：1993-01-08

申请人： OLIN CORPORATION

发明人： PARTHASARATHI, Arvind ,  MAHULIKAR, Deepak

IPC分类号： H01L23/48 ,  H01L23/495

CPC分类号： H01L23/10 ,  H01L23/3107 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48618 ,  H01L2224/73265 ,  H01L2224/85201 ,  H01L2224/85418 ,  H01L2224/85871 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01083 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： There is provided a lead frame with enhanced adhesion to a polymer resin. The lead frame is coated with a thin layer of containing a mixture of chromium and zinc. A mixture of chromium and zinc with the zinc-to-chromium ratio in excess of about 4:1 is most preferred. The coated lead frames exhibit improved adhesion to a polymeric resin.

摘要翻译： 提供了对聚合物树脂具有增强的粘附性的引线框架。 引线框架涂有含有铬和锌混合物的薄层。 锌与铬的比例超过约4:1的铬和锌的混合物是最优选的。 涂覆的引线框架对聚合物树脂的粘合性提高。

公开(公告)号：EP1122780A2

公开(公告)日：2001-08-08

申请号：EP01300797.6

申请日：2001-01-30

申请人： NGK INSULATORS, LTD.

发明人： Araki, Kiyoshi ,  Kida, Masahiro ,  Ishikawa, Takahiro ,  Bessyo, Yuki ,  Makino, Takuma

IPC分类号： H01L23/373

CPC分类号： H01L24/32 ,  C04B37/026 ,  C04B2235/3206 ,  C04B2235/3225 ,  C04B2235/3873 ,  C04B2235/616 ,  C04B2235/6565 ,  C04B2235/9607 ,  C04B2237/064 ,  C04B2237/083 ,  C04B2237/121 ,  C04B2237/122 ,  C04B2237/125 ,  C04B2237/127 ,  C04B2237/128 ,  C04B2237/365 ,  C04B2237/366 ,  C04B2237/368 ,  C04B2237/407 ,  C04B2237/56 ,  C04B2237/704 ,  C04B2237/706 ,  C04B2237/72 ,  C23C4/02 ,  C23C4/08 ,  C23C6/00 ,  C23C24/10 ,  C23C24/106 ,  H01L23/3733 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/473 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/451 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/0132 ,  H01L2924/01327 ,  H01L2924/0133 ,  H01L2924/13055 ,  H01L2924/15787 ,  H01L2924/19107 ,  H01L2924/351 ,  Y10T428/24917 ,  Y10T428/24926 ,  Y10T428/252 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01022 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00015

摘要： The object is to provide a laminated radiation member and a power semiconductor apparatus in which no cracks occur due to thermal stress caused by cooling and thermal cycle and which are low in thermal resistance. This is attained by a laminated radiation member comprising a radiation plate, an insulation substrate bonded to the upper surface of the radiation plate and an electrode provided on the upper surface of the insulation substrate, which can be made by a method including a step of, if necessary, previously surface treating a bonding surface of the radiation plate and/or the insulation substrate to assure wettability with a hard solder or a metal, a step of interposing ceramic particles previously surface treated to assure wettability with a hard solder or a metal between the radiation plate and the insulation substrate, a step of disposing a hard solder above and/or below the ceramic particles, a step of heating the hard solder to a temperature higher than the melting point of the solder to melt the solder, a step of penetrating the molten hard solder into spaces between the ceramic particles to react the ceramic particles with the solder to produce a metal base composite material, and a step of bonding the radiation plate and the insulation substrate with the metal base composite material.

公开(公告)号：EP1023743A4

公开(公告)日：2000-12-06

申请号：EP98934369

申请日：1998-07-08

申请人： DYTAK CORP

发明人： NANIS LEONARD ,  KEUKELAAR RONALD

IPC分类号： H05K3/00 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  H01L21/60 ,  H01L21/66 ,  H05K3/24 ,  H05K3/40 ,  H05K3/42 ,  H01L21/00 ,  G01R1/02 ,  G01S3/00

CPC分类号： G01R1/06761 ,  G01R3/00 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/241 ,  H05K3/4007 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H01L2924/00

摘要： An improved wear resistant bump contact (Fig. 1, item 16) is produced by the inclusion of small particles (18) of hard materials in the conductive material of the contact bump, preferably by co-deposition at the time of electroplating of the bump bulk material. Desirable attributes of the small particles of hard material include small particle size, hardness greater than the hardness of the bulk material of the contact bump, compatibility with the plating conditions, and electrical conductivity. In one variation, the bump of metal-particle co-deposited material is coated by a thin cap layer (19) of noble, non oxidizing metal to prevent electrical erosion by arcing as contact is made and broken from the pad.

摘要翻译： 通过在接触凸起的导电材料中包含硬质材料的小颗粒，优选通过在凸块块状材料的电镀时共沉积来制造改进的耐磨凸点接触。 硬质材料的小颗粒的理想特性包括小的粒度，硬度大于接触凸块的散装材料的硬度，与电镀条件的兼容性和导电性。 氮化物，硼化物，硅化物，碳化物是适合用于满足这些所需属性的典型间隙化合物。 在一个优选实施例中，使用镍本体材料和碳化硅颗粒。 在一个实施例中，金属 - 颗粒共沉积材料的凸起由贵金属非氧化金属的薄盖层涂覆，以防止由于与焊盘接触而断裂而产生的电弧侵蚀。 铑和钌是合适的金属，可以电沉积在复合凸块结构上。

公开(公告)号：EP1023743A2

公开(公告)日：2000-08-02

申请号：EP98934369.4

申请日：1998-07-08

申请人： Dytak Corporation

发明人： NANIS, Leonard ,  KEUKELAAR, Ronald

IPC分类号： H01L21/00

CPC分类号： G01R1/06761 ,  G01R3/00 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/241 ,  H05K3/4007 ,  H05K3/423 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/0355 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H01L2924/00

摘要： An improved wear resistant bump contact (Fig. 1, item 16) is produced by the inclusion of small particles (18) of hard materials in the conductive material of the contact bump, preferably by co-deposition at the time of electroplating of the bump bulk material. Desirable attributes of the small particles of hard material include small particle size, hardness greater than the hardness of the bulk material of the contact bump, compatibility with the plating conditions, and electrical conductivity. In one variation, the bump of metal-particle co-deposited material is coated by a thin cap layer (19) of noble, non oxidizing metal to prevent electrical erosion by arcing as contact is made and broken from the pad.

公开(公告)号：EP0977261A1

公开(公告)日：2000-02-02

申请号：EP99100834.3

申请日：1999-01-18

申请人： MITSUBISHI DENKI KABUSHIKI KAISHA

发明人： Kawamura, Toshinobu ,  Satoh, Katsumi ,  Bessho, Mikio

IPC分类号： H01L23/48

CPC分类号： H01L24/72 ,  H01L23/051 ,  H01L23/053 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/1301 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2924/00

摘要： In a GCT device which controls large current at the operating frequency of 1 kHz or more, a ring-shaped gate terminal (10) is made of a magnetic material with the maximum permeability of 15,000 or less in the CGS Gaussian system of units. Further, in the outer end portion of an outer plane portion (10O) of the ring-shaped gate terminal (10), a plurality of slits extending diametrically are provided along the circumference to be coupled to mounting holes (10b).

摘要翻译： 在1kHz以上的工作频率下控制大电流的GCT装置中，环形栅极端子（10）由CGS高斯系统的最大磁导率为15000以下的磁性材料构成。 此外，在环状栅极端子（10）的外平面部分（100）的外端部分中，沿着圆周设置多个沿直径延伸的狭缝，以与安装孔（10b）连接。

公开(公告)号：EP0836229A3

公开(公告)日：1999-06-02

申请号：EP97305828.2

申请日：1997-08-01

申请人： GENERAL ELECTRIC COMPANY

发明人： Saia, Richard Joseph ,  Durocher, Kevin Matthew ,  Cole, Herbert Stanley

IPC分类号： H01L23/538 ,  H01L25/16

CPC分类号： H01L23/5389 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/5385 ,  H01L24/19 ,  H01L24/82 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01051 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/162 ,  H05K1/167 ,  H05K3/388 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0315 ,  H05K2203/0361 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method for fabricating a flexible interconnect film includes applying a resistor layer (16,18) over one or both surfaces of a dielectric film (10); applying a metallization layer (22) over the resistor layer with the resistor layer including a material facilitating adhesion of the dielectric film and the metallization layer; applying a capacitor dielectric layer (24a) over the metallization layer; and applying a capacitor electrode layer (26a) over the capacitor dielectric layer. The capacitor electrode layer is patterned to form a first capacitor electrode; the capacitor dielectric layer is patterned; the metallization layer is patterned to form a resistor (28); and the metallization layer and the resistor layer are patterned to form an inductor (33) and a second capacitor electrode. In one embodiment, the dielectric film includes a polyimide, the resistor layer includes tantalum nitride, and the capacitor dielectric layer includes amorphous hydrogenated carbon or tantalum oxide. If the resistor and metallization layers are applied over both surfaces of the dielectric film, passive components can be fabricated on both surfaces of the dielectric film. The dielectric film can have vias therein with the resistor and metallization layers extending through the vias. A circuit chip can be attached and coupled to the passive components by metallization patterned through vias in an additional dielectric layer.