公开(公告)号：US06709899B2

公开(公告)日：2004-03-23

申请号：US10079743

申请日：2002-02-20

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L24/12 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83856 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647

Abstract: A method of manufacturing a microelectronic assembly includes providing a first microelectronic element having a first surface and a plurality of terminals exposed at the first surface, providing a second microelectronic element having a top surface and a plurality of contacts exposed at the top surface, forming a plurality of conductive elastomeric posts which connect each of the contacts to one of the terminals, and injecting a compliant material between the first surface of the first microelectronic element and the top surface of the second microelectronic element to form a compliant layer.

Abstract translation: 一种制造微电子组件的方法包括提供具有第一表面和暴露在第一表面处的多个端子的第一微电子元件，提供具有顶表面的第二微电子元件和暴露在顶表面处的多个触点，形成 多个导电弹性体柱，其将每个触点连接到其中一个端子，以及在第一微电子元件的第一表面和第二微电子元件的顶表面之间注入柔性材料以形成顺应层。

公开(公告)号：US06486547B2

公开(公告)日：2002-11-26

申请号：US09798809

申请日：2001-03-02

Applicant: John W. Smith ,  Joseph Fjelstad

Inventor： John W. Smith ,  Joseph Fjelstad

IPC: H01L2348

CPC classification number: H01L23/3107 ,  H01L23/49572 ,  H01L24/01 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/00

Abstract: A sheet such as a polymeric dielectric has elongated lead regions partially separated from the main region of the sheet by gaps in the sheet, and has conductors extending along the lead regions. The lead regions are connected to contacts on a microelectronic element, and the microelectronic element is moved away from the main region of the sheet, thereby bending the lead regions downwardly to form leads projecting from the main region of the sheet.

Abstract translation: 诸如聚合物电介质的片材具有通过片材中的间隙与片材的主要区域部分地分离的细长引线区域，并且具有沿引线区域延伸的导体。 引线区域连接到微电子元件上的触点，并且微电子元件移动离开片材的主要区域，从而将引线区域向下弯曲以形成从片材的主要区域突出的引线。

公开(公告)号：US06468836B1

公开(公告)日：2002-10-22

申请号：US09547200

申请日：2000-04-12

Applicant: Thomas H. Distefano ,  Joseph Fjelstad ,  John W. Smith

Inventor： Thomas H. Distefano ,  Joseph Fjelstad ,  John W. Smith

IPC: H01L2182

CPC classification number: H01L24/48 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

Abstract: A semiconductor chip package having an internal laterally curved lead in order to compensate for the CTE mismatch between a semiconductor chip and a supporting substrate, such as a PWB.

Abstract translation: 一种具有内部横向弯曲引线的半导体芯片封装，以补偿半导体芯片和诸如PWB的支撑基板之间的CTE失配。

公开(公告)号：US06465747B2

公开(公告)日：2002-10-15

申请号：US09951046

申请日：2001-09-13

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H01R909

CPC classification number: H01L24/81 ,  H01L23/49838 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/0105 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/19043 ,  H05K1/111 ,  H05K3/3452 ,  H05K2201/0397 ,  H05K2201/09381 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10734 ,  H05K2201/2081 ,  H05K2203/041 ,  Y02P70/611 ,  Y10T29/49004 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A microelectronic assembly includes a component having one or more conductive pads, with each conductive pad having a plurality of solder-wettable strips extending outwardly away from a center, the solder wettable strips being bounded by non solder-wettable material. The microelectronic assembly also includes a composite conductive element positioned atop at least one of the conductive pads, the composite conductive element including a solid conductive core and a layer of solder material overlying the solid conductive core, the solid conductive core having a higher melting temperature than the layer of solder material.

Abstract translation: 微电子组件包括具有一个或多个导电焊盘的部件，每个导电焊盘具有从中心向外延伸的多个可焊接润湿的条，焊料可润湿条由非焊料可润湿材料限定。 微电子组件还包括位于至少一个导电焊盘顶部的复合导电元件，复合导电元件包括​​固体导电芯和覆盖在固体导电芯上的焊料层，该固体导电芯的熔化温度高于 该焊料层。

公开(公告)号：US06417029B1

公开(公告)日：2002-07-09

申请号：US08989306

申请日：1997-12-12

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L24/12 ,  H01L21/563 ,  H01L23/498 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/83856 ,  H01L2224/92125 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05647

Abstract: A method of making a semiconductor chip assembly includes the steps of providing a semiconductor chip with contacts and a dielectric substrate wiring layer with terminals, forming a plurality of conductive elastomeric posts such that each post connects one terminal to one contact, and injecting a compliant material between the semiconductor chip and the dielectric substrate wiring layer to form a compliant layer. Another method of making a semiconductor chip assembly includes the steps providing a semiconductor chip with contacts and a dielectric substrate wiring layer with terminals, dispensing a conductive elastomeric material over each of the contacts or over each of the terminals; juxtaposing the chip and the wiring layer such that conductive elastomeric material connects each of the contact to one of the terminals; injecting a compliant material between the chip and the wiring layer and around the conductive elastomeric material to form a compliant layer, and curing the conductive elastomeric material and the compliant material.

Abstract translation: 制造半导体芯片组件的方法包括以下步骤：为半导体芯片提供触点和具有端子的电介质基底布线层，形成多个导电弹性体柱，使得每个支柱将一个端子连接到一个触点，并且注入柔性材料 在半导体芯片和电介质基板布线层之间形成柔性层。制造半导体芯片组件的另一种方法包括提供具有触点的半导体芯片和带端子的介电基板布线层的步骤， 触点或每个端子上; 将芯片和布线层并置，使得导电弹性体材料将每个触点连接到一个端子; 在所述芯片和所述布线层之间以及所述导电弹性材料周围注入柔性材料以形成柔顺层，以及固化所述导电弹性体材料和柔性材料。

公开(公告)号：US06373128B1

公开(公告)日：2002-04-16

申请号：US09722906

申请日：2000-11-27

Applicant: Konstantine Karavakis ,  Joseph Fjelstad

Inventor： Konstantine Karavakis ,  Joseph Fjelstad

IPC: H01L2348

CPC classification number: H01L24/05 ,  H01L23/3157 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/85399

Abstract: A semiconductor chip assembly with a compliant layer overlying the chip and a flexible dielectric layer overlying the compliant layer. Connecting terminals are provided on the dielectric layer for connection to a larger substrate. The connecting terminals are moveable in vertical directions toward the chip. Bonding terminals, electrically connected to the connecting terminals, are also provided on the top layer. A reinforcing element resists vertical movement of the bonding terminals, and thereby facilitates connection of leads between the bonding terminals and the chip.

Abstract translation: 具有覆盖在芯片上的柔性层的半导体芯片组件和覆盖柔顺层的柔性介电层。 在电介质层上提供连接端子，以连接到较大的基板。 连接端子可沿垂直方向朝芯片移动。 电连接到连接端子的接合端子也设置在顶层上。 增强元件抵抗接合端子的垂直移动，从而便于接合端子和芯片之间的引线的连接。

公开(公告)号：US06361959B1

公开(公告)日：2002-03-26

申请号：US09317675

申请日：1999-05-24

Applicant: Masud Beroz ,  Joseph Fjelstad ,  Belgacem Haba ,  Christopher M. Pickett ,  John Smith

Inventor： Masud Beroz ,  Joseph Fjelstad ,  Belgacem Haba ,  Christopher M. Pickett ,  John Smith

IPC: C12Q154

CPC classification number: C12Q1/00 ,  C12Q1/54 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Electrically conductive elements such as terminals and leads are held on a support structure by a degradable connecting layer such as a adhesive degradable by heat or radiant energy. After connecting these elements to a microelectronic element such as a chip or wafer, the conductive elements are released from the support structure by degrading the connecting layer. The support structure desirably has a predictable, isotropic coefficient of thermal expansion and such coefficient of thermal expansion may be close to that of silicon to minimize the effect of the temperature changes. The conductive elements may be mounted on a plurality of individual tiles rather than on an unitary sheet covering an entire wafer to minimize dimensional changes when the dielectric is released from the support structure.

Abstract translation: 诸如端子和引线的导电元件通过可降解的连接层（例如通过热或辐射能降解的粘合剂）保持在支撑结构上。 在将这些元件连接到诸如芯片或晶片的微电子元件之后，通过降低连接层而将导电元件从支撑结构释放。 支撑结构理想地具有可预测的各向同性热膨胀系数，并且这种热膨胀系数可能接近于硅的热膨胀系数以最小化温度变化的影响。 导电元件可以安装在多个单独的瓦片上，而不是在覆盖整个晶片的整体片材上安装，以便当电介质从支撑结构释放时最小化尺寸变化。

公开(公告)号：US06294830B1

公开(公告)日：2001-09-25

申请号：US09409205

申请日：1999-09-30

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2334

CPC classification number: H01L21/568 ,  H01L21/4832 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/18 ,  H01L2221/68377 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48475 ,  H01L2224/49171 ,  H01L2224/49433 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/85001 ,  H01L2224/85051 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10162 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/19043 ,  H01L2924/19107 ,  H01L2924/3011 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A microelectronic assembly includes a microelectronic element having a front face including contacts and a back surface remote therefrom, and a mass of a dielectric material at least partially encapsulating the microelectronic element so that the encapsulated microelectronic element forms a body having exterior surfaces, whereby the back surface of the microelectronic element is exposed at an exterior surface of the body. The microelectronic assembly also includes conductive units secured to the mass of dielectric material, the units including bottom flange portions overlying a surface of the body, top flange portions remote from the bottom flange portions and posts extending from the flange portions into the body, the bottom and top flange portions having larger cross-sectional dimensions than the posts, and conductive elements extending through the mass of dielectric material, the conductive elements electrically interconnecting the contacts with the conductive units.

Abstract translation: 微电子组件包括微电子元件，其具有包括触点和远离其的后表面的前表面，以及至少部分地封装微电子元件的电介质材料块，使得封装的微电子元件形成具有外表面的主体，由此背面 微电子元件的表面暴露在身体的外表面。 微电子组件还包括固定到介电材料块的导电单元，所述单元包括覆盖在主体表面上的底部凸缘部分，远离底部凸缘部分的顶部凸缘部分和从凸缘部分延伸到主体中的柱子，底部 以及具有比柱更大的横截面尺寸的顶部凸缘部分，以及延伸穿过介电材料块的导电元件，导电元件将触点与导电单元电连接。

公开(公告)号：US06266874B1

公开(公告)日：2001-07-31

申请号：US09118735

申请日：1998-07-17

Applicant: Thomas H. DiStefano ,  John W. Smith ,  Konstantine N. Karavakis ,  Zlata Kovac ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  John W. Smith ,  Konstantine N. Karavakis ,  Zlata Kovac ,  Joseph Fjelstad

IPC: H05K310

CPC classification number: H01R13/2414 ,  H01R12/714 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/445 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0382 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method of making a microelectronic component by providing a conductive element, providing a resist at selected locations on said conductive element and electrophoretically depositing an uncured dielectric material on the conductive element, wherein the uncured material will be deposited on the conductive element except at locations covered by the resist. The deposited material is cured to form a dielectric layer and the resist is removed so that the dielectric layer has openings extending to the conductive element at locations the locations which were covered by the resist.

Abstract translation: 一种通过提供导电元件制造微电子元件的方法，在所述导电元件上的选定位置提供抗蚀剂并在导电元件上电泳沉积未固化的介电材料，其中未固化的材料将沉积在导电元件上，除了覆盖的位置 由抗蚀剂。 固化沉积的材料以形成电介质层，并且去除抗蚀剂，使得电介质层具有在被抗蚀剂覆盖的位置的位置处延伸到导电元件的开口。

公开(公告)号：US06253992B1

公开(公告)日：2001-07-03

申请号：US09270988

申请日：1999-03-17

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: B23K3512

CPC classification number: H05K3/3478 ,  B23K3/0623 ,  B23K35/0244 ,  B23K2101/40 ,  H01L21/4853 ,  H01L24/11 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11005 ,  H01L2224/11334 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H05K2203/0126 ,  H05K2203/0182 ,  H05K2203/041 ,  H05K2203/0557 ,  H01L2224/05599

Abstract: Bonding material balls such as solder balls are applied onto contacts of a semiconductor chip or other microelectronic unit using an escapement mechanism which feeds one solder ball per cycle into each aperture of a stencil. The apparatus reliably places one solder ball on each contact of the microelectronic unit.

Abstract translation: 使用擒纵机构将半导体芯片或其他微电子单元的接合材料球施加到半导体芯片或其他微电子单元的触点上，每个周期将一个焊球每个馈送到模板的每个孔中。 该设备可靠地将一个焊球放置在微电子单元的每个触点上。