公开(公告)号：US20050208914A1

公开(公告)日：2005-09-22

申请号：US11135103

申请日：2005-05-23

Applicant: Tsuyoshi Ogawa

Inventor： Tsuyoshi Ogawa

IPC: H05K1/16 ,  H01L21/48 ,  H01L21/60 ,  H01L21/68 ,  H01L23/498 ,  H01L23/552 ,  H01L23/66 ,  H01L25/00 ,  H01P3/02 ,  H04B1/40 ,  H04B1/52 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18 ,  H05K3/00 ,  H05K3/26 ,  H05K3/28 ,  H05K3/46

CPC classification number: H05K3/4694 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H04B1/52 ,  H05K1/0237 ,  H05K1/141 ,  H05K1/16 ,  H05K3/007 ,  H05K3/4614 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0352 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A high frequency module device having a high frequency circuit block unit including a passive device. A plural number of unit wiring layers, each formed by an insulating layer, having a passive device unit in its portion, and by a pattern wiring, are layered on a dummy substrate, and are released from the dummy substrate to form the high frequency circuit block unit (2), which is mounted on a motherboard (3). The major surfaces of the respective unit wiring layers are planarized. The passive device unit and the pattern wiring, formed on the major surface of each unit wiring layer in the high frequency circuit block unit (2), can be formed with high accuracy to improve high frequency characteristics. The high frequency circuit block unit (2) is not in need of a base substrate, thus achieves reduction in size and cost.

Abstract translation: 一种具有包括无源器件的高频电路块单元的高频模块装置。 在虚拟基板上层叠多个单位布线层，每个单位布线层由绝缘层形成，其部分具有无源器件单元和图案布线，并从虚设基板释放以形成高频电路 块单元（2），其安装在主板（3）上。 各个单元布线层的主表面被平坦化。 可以高精度地形成在高频电路块单元（2）中的每个单元布线层的主表面上形成的无源器件单元和图案布线，以改善高频特性。 高频电路块单元（2）不需要基底，从而实现了尺寸和成本的降低。

公开(公告)号：US20050179136A1

公开(公告)日：2005-08-18

申请号：US11108638

申请日：2005-04-19

Applicant: Takatoshi Katsura ,  Kenji Itoh ,  Hiroaki Nagano ,  Youji Isota ,  Mitsuhiro Shimozawa ,  Tadashi Takagi ,  Noriharu Suematsu ,  Masayoshi Ono ,  Kenichi Maeda

Inventor： Takatoshi Katsura ,  Kenji Itoh ,  Hiroaki Nagano ,  Youji Isota ,  Mitsuhiro Shimozawa ,  Tadashi Takagi ,  Noriharu Suematsu ,  Masayoshi Ono ,  Kenichi Maeda

IPC: H01L23/48 ,  H01L23/50 ,  H01L23/538 ,  H01L23/552 ,  H01L23/64 ,  H01L23/66 ,  H03H3/00 ,  H03H7/01 ,  H05K1/00 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18 ,  H05K9/00

CPC classification number: H05K1/0216 ,  H01L23/50 ,  H01L23/5383 ,  H01L23/552 ,  H01L23/645 ,  H01L2924/0002 ,  H01L2924/15312 ,  H01L2924/3011 ,  H03H3/00 ,  H03H7/01 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/141 ,  H05K9/0039 ,  H05K2201/0715 ,  H05K2201/09254 ,  H05K2201/09972 ,  H01L2924/00

Abstract: In a multi-layer substrate module receiving from an external earth node (20) supply of a reference potential (Vss) for grounding, a plurality of ground lines (170-1, 170-2, 170-3) are provided respectively corresponding to a plurality of internal circuits (210, 220, 230). Moreover, a common node (Ncmn) for coupling the ground lines (170-1, 170-2, 170-3) is provided in an insulating layer (105C) of the multi-layer substrate module. The common node (Ncmn) is electrically coupled to the earth node 20 through a ground pin terminal 204 shared by the plurality of internal circuits (210, 220, 230). Preferably, the common node (Ncmn) is provided in the lowest insulating layer of the multi-layer substrate module. Thus, parasitic inductance of the portion through which an earth current flows, that is, the portion common to the plurality of internal circuits (210, 220, 230), can be suppressed with a small number of ground pin terminals. Accordingly, the inflow phenomenon of the earth current between the plurality of internal circuits (210, 220, 230) is prevented, enabling stable operation.

Abstract translation: 在从外部接地节点（20）接收用于接地的参考电位（Vss）的多层衬底模块中，分别提供多个接地线（170-1,170-2,170-3），其对应于 多个内部电路（210,220,230）。 此外，用于耦合接地线（170-1,170-2,170-3）的公共节点（Ncmn）设置在多层衬底模块的绝缘层（105C）中。 公共节点（Ncmn）通过由多个内部电路（210,220,230）共享的接地引脚端子204电耦合到接地节点20。 优选地，公共节点（Ncmn）设置在多层基板模块的最低绝缘层中。 因此，可以用少量的接地引脚端子来抑制接地电流流过的部分的寄生电感，即多个内部电路（210,220,230）共同的部分的寄生电感。 因此，防止了多个内部电路（210,220,230）之间的接地电流的流入现象，从而能够稳定地工作。

公开(公告)号：US20050176380A1

公开(公告)日：2005-08-11

申请号：US11013337

申请日：2004-12-17

Applicant: Hiroshi Okabe ,  Hidetoshi Matsumoto

Inventor： Hiroshi Okabe ,  Hidetoshi Matsumoto

IPC: H01L25/00 ,  H04B1/38 ,  H04B1/40 ,  H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/34 ,  H05K3/46

CPC classification number: H04B1/38 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2924/15184 ,  H01L2924/15192 ,  H01L2924/19105 ,  H01L2924/30111 ,  H05K1/0237 ,  H05K1/0298 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/09972 ,  H01L2924/00

Abstract: An RF circuit module, in which a power amplifier and a transceiver are united, with reduced interference between its electronic circuit blocks, downsized and still having high performance, and with a stable performance not dependent on the ground land structure on the motherboard, is provided. The ground plane 110 for at least a last-stage amplifier 11 of the power amplifier 10 where the greatest power is generated in the whole RF circuit block, that is, the source of generating the greatest noise and heat for the RF circuit block, is isolated from the ground plane for at least one circuit portion of the transceiver 9 including an LNA 51, receiver 52, transmitter 30, and VCO 70. These ground planes are connected to a common ground plane 480 through different connection conductors, respectively.

Abstract translation: 提供了一种RF电路模块，其中功率放大器和收发器组合在一起，其电子电路块之间的干扰减小，尺寸小且仍然具有高性能，并且具有不依赖于主板上的地面结构的稳定性能 。 在整个RF电路块中产生最大功率的功率放大器10的至少最后一级放大器11的接地平面110，即产生RF电路块的最大噪声和热的源是 与收发机9的至少一个电路部分的接地平面隔离，包括LNA 51，接收机52，发射机30和VCO70。 这些接地层分别通过不同的连接导体连接到公共接地层480。

公开(公告)号：US20050142852A1

公开(公告)日：2005-06-30

申请号：US11063131

申请日：2005-02-22

Applicant: Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

Inventor： Hiroshi Asami ,  Hidetoshi Kusano ,  Yuji Nishitani ,  Ken Orui

IPC: H05K3/22 ,  H01L23/12 ,  H05K3/00 ,  H05K3/20 ,  H05K3/46 ,  H01L21/4763 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/4694 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49833 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K3/0023 ,  H05K3/205 ,  H05K3/4617 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/09536 ,  H05K2201/09881 ,  H05K2201/09972 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

Abstract: The present invention provides a method of manufacturing a multilayer wiring substrate, which can preserve the dimensional stability of a conductor pattern at a fine pitch, solve the restriction on a process from the viewpoint of material selection, and further reduce a manufacturing cost, and a multilayer wiring substrate. A second wiring substrate formed on a supporting sheet made of metal and an adhesive layer are partially stacked on a predetermined region of a first wiring substrate by using the supporting sheet. After the lamination of the second wiring substrate, the supporting sheet is finally etched and removed. The second wiring substrate is stacked only on the portion required to be multilayered on the first wiring substrate to thereby reduce the amount of the construction material of the second wiring substrate.

Abstract translation: 本发明提供一种制造多层布线基板的方法，其可以以细间距保持导体图案的尺寸稳定性，从材料选择的角度解决对工艺的限制，并且进一步降低制造成本，并且 多层布线基板。 形成在由金属制成的支撑片和粘合剂层上的第二布线基板通过使用支撑片部分堆叠在第一布线基板的预定区域上。 在第二布线基板的层叠之后，最后蚀刻并去除支撑片。 第二布线基板仅堆叠在第一布线基板上需要多层的部分上，从而减少第二布线基板的结构材料的量。

公开(公告)号：US20050121986A1

公开(公告)日：2005-06-09

申请号：US10998573

申请日：2004-11-30

Applicant: Tatsuhiro Matsuki

Inventor： Tatsuhiro Matsuki

IPC: H02K9/02 ,  H02K5/18 ,  H02K9/00 ,  H02K11/00 ,  H02K11/04 ,  H02K23/68 ,  H05K1/02

CPC classification number: H05K1/0203 ,  H02K11/33 ,  H05K2201/066 ,  H05K2201/09972

Abstract: A heat sink member divides a circuit board into a first circuit part and a second circuit part. The first circuit part includes circuit elements, such as a transistor, an electric current sensing resistor and a choke coil, which generate heat upon operation thereof. The second circuit part includes a control circuit, which controls operation of the motor.

Abstract translation: 散热构件将电路板分成第一电路部分和第二电路部分。 第一电路部分包括诸如晶体管，电流感测电阻器和扼流线圈的电路元件，其在其工作时产生热量。 第二电路部分包括控制电路，其控制电动机的操作。

公开(公告)号：US20050109532A1

公开(公告)日：2005-05-26

申请号：US10887484

申请日：2004-07-08

Applicant: Gerald Hermkens ,  Marcel Smeets ,  Roger Theelen ,  Peter Thoolen ,  Frank Speetjens

Inventor： Gerald Hermkens ,  Marcel Smeets ,  Roger Theelen ,  Peter Thoolen ,  Frank Speetjens

IPC: H05K3/30 ,  H05K3/46 ,  H05K1/14

CPC classification number: H05K1/18 ,  H05K3/306 ,  H05K3/308 ,  H05K3/4623 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/044 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/09536 ,  H05K2201/09972 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/2036 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T428/24917

Abstract: A method for manufacturing a mid-plane. a multi-layer board having a connection assembly is provided and a dielectric layer with a channel formed therein to define a perimeter of a connector area is provided. The dielectric layer is bonded to the multi-layer board such that the connector area overlaps the part of the connection assembly of the multi-layer board. At least a portion of the connector area in the dielectric layer is removed to expose the connection assembly of the multi-layer board. A rigid multilayer is also disclosed. The rigid multilayer includes a multi-layer board and a dielectric layer. The multi-layer board has a connection assembly. The dielectric layer has a channel formed therein to define a perimeter of a connector area. The dielectric layer is bonded to the multi-layer board such that the connector area overlaps the connection assembly of the multi-layer board. The connector area can then be removed such as by depth controlled routing. As will be understood by one skilled in the art, the depth tolerance is not critical because the dielectric layer is pre-formed with the channel prior to formation of the rigid multi-layer.

Abstract translation: 一种制造中平面的方法。 提供了具有连接组件的多层板，并且提供了形成在其中以限定连接器区域的周边的通道的介电层。 电介质层与多层板结合，使得连接器区域与多层板的连接组件的部分重叠。 绝缘层中的连接器区域的至少一部分被去除以暴露多层板的连接组件。 还公开了一种刚性多层。 刚性多层包括多层板和电介质层。 多层板具有连接组件。 介电层具有形成在其中的通道，以限定连接器区域的周边。 电介质层与多层板接合，使得连接器区域与多层板的连接组件重叠。 然后可以通过深度控制路由来去除连接器区域。 如本领域技术人员将理解的，深度公差不是关键的，因为介电层在形成刚性多层之前用通道预先形成。

公开(公告)号：US20050023659A1

公开(公告)日：2005-02-03

申请号：US10897098

申请日：2004-07-23

Applicant: Sang-Yeop Lee ,  Cheul-Joong Youn

Inventor： Sang-Yeop Lee ,  Cheul-Joong Youn

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/31 ,  H01L25/00 ,  H01L25/065 ,  H01L25/07 ,  H01L25/10 ,  H01L25/18 ,  H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H01L23/02

CPC classification number: H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L25/16 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1076 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/023 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/09972 ,  H05K2201/10477 ,  H05K2201/10515 ,  H05K2201/10674 ,  H05K2201/2036 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A semiconductor chip package may include functional and packaging parts, which may be separated into first and second areas respectively, and designated only for a specific type of semiconductor material. The first area may be designated only for functional material, while the second area may be designated only for packaging material. The first area may include a semiconductor chip and/or passive elements, while the second area may include packaging material for example, solder and/or contact pads.

Abstract translation: 半导体芯片封装可以包括功能和封装部件，其可分别分成第一和第二区域，并且仅被指定用于特定类型的半导体材料。 第一个区域可以仅用于功能材料，而第二个区域可以仅用于包装材料。 第一区域可以包括半导体芯片和/或无源元件，而第二区域可以包括例如焊料和/或接触焊盘的封装材料。

公开(公告)号：US20040228099A1

公开(公告)日：2004-11-18

申请号：US10437721

申请日：2003-05-13

Inventor： John C. Estes ,  Rodolfo Lucero ,  Anthony M. Pavio

IPC: H05K007/06

CPC classification number: H03H9/0557 ,  H01P1/203 ,  H03H9/02913 ,  H05K1/0218 ,  H05K1/0237 ,  H05K1/0243 ,  H05K1/16 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/09618 ,  H05K2201/09972 ,  H05K2201/10371 ,  Y10T29/4913 ,  Y10T29/49137 ,  Y10T29/49146 ,  Y10T29/49165 ,  Y10T29/53174 ,  Y10T29/53178

Abstract: An exemplary system and method for providing differential adjustment of the height of a multilayer substrate in localized areas for improved Q-factor performance of RF devices is disclosed as comprising inter alia: a multilayer substrate (200); an RF component (210) embedded in the substrate (200); a surface mounted component (220); and an RF shield (260) disposed next to the surface mounted component (220), wherein the height of the shield (260) does not extend substantially beyond the height of the surface mounted component (220). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize Q, RF performance and/or material characteristics. Exemplary embodiments of the present invention representatively provide for high-performance, high-quality RF devices that may be readily incorporated with existing technologies for the improvement of frequency response, device package form factors, weights and/or other manufacturing, device or material performance metrics.

Abstract translation: 公开了一种用于在局部区域中对多层基板的高度进行差分调整以提高RF器件的Q因子性能的示例性系统和方法，其特别包括：多层衬底（200）; 嵌入在所述基板（200）中的RF部件（210）; 表面安装部件（220）; 以及靠近所述表面安装部件（220）设置的RF屏蔽件（260），其中所述屏蔽件（260）的高度基本上不超过所述表面安装部件（220）的高度。 公开的特征和规范可以被不同地控制，配置，适配或以其他方式任意地修改，以进一步改善或者优化Q，RF性能和/或材料特性。 本发明的示例性实施例代表性地提供了可以容易地与用于改进频率响应，设备包装形状因子，重量和/或其他制造，设备或材料性能度量的现有技术结合的高性能，高质量的RF设备 。

公开(公告)号：US20040077124A1

公开(公告)日：2004-04-22

申请号：US10466731

申请日：2003-07-18

Inventor： Tsuyoshi Ogawa

IPC: H01L021/44 ,  H01L021/48 ,  H01L021/50

CPC classification number: H05K3/4694 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025 ,  H04B1/52 ,  H05K1/0237 ,  H05K1/141 ,  H05K1/16 ,  H05K3/007 ,  H05K3/4614 ,  H05K3/4644 ,  H05K3/4682 ,  H05K2201/0352 ,  H05K2201/09972 ,  H05K2203/016 ,  H05K2203/061 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A high frequency module device having a high frequency circuit block unit including a passive device. A plural number of unit wiring layers, each formed by an insulating layer, having a passive device unit in its portion, and by a pattern wiring, are layered on a dummy substrate, and are released from the dummy substrate to form the high frequency circuit block unit (2), which is mounted on a motherboard (3). The major surfaces of the respective unit wiring layers are planarized. The passive device unit and the pattern wiring, formed on the major surface of each unit wiring layer in the high frequency circuit block unit (2), can be formed with high accuracy to improve high frequency characteristics. The high frequency circuit block unit (2) is not in need of a base substrate, thus achieves reduction in size and cost.

Abstract translation: 一种具有包括无源器件的高频电路块单元的高频模块装置。 在虚拟基板上层叠多个单位布线层，每个单位布线层由绝缘层形成，其部分具有无源器件单元和图案布线，并从虚设基板释放以形成高频电路 块单元（2），其安装在主板（3）上。 各个单元布线层的主表面被平坦化。 可以高精度地形成在高频电路块单元（2）中的每个单元布线层的主表面上形成的无源器件单元和图案布线，以改善高频特性。 高频电路块单元（2）不需要基底，从而实现了尺寸和成本的降低。

公开(公告)号：US06650203B2

公开(公告)日：2003-11-18

申请号：US09812433

申请日：2001-03-20

Applicant: Bruno Gerstenberg ,  Hans-Joachim Michling ,  Helmut Messmer

Inventor： Bruno Gerstenberg ,  Hans-Joachim Michling ,  Helmut Messmer

IPC: H03H701

CPC classification number: H05K1/0233 ,  H03H2001/0014 ,  H05K1/0216 ,  H05K1/0242 ,  H05K1/0298 ,  H05K1/162 ,  H05K2201/0715 ,  H05K2201/09481 ,  H05K2201/09627 ,  H05K2201/09672 ,  H05K2201/09972 ,  H05K2201/1003

Abstract: The invention relates to a filter arrangement for separating radio frequency energy from signal energy in a signal line. The signal line extends at least partly in a first layer of a multi-layer printed circuit board. A grounded surface is arranged in a second layer of the printed circuit board. The signal line to be filtered is interrupted in the first layer in the filter region and continued in a third layer, the second and the third layers being located on opposite sides of the first layer. Due to the skin effect the radio frequency energy will be concentrated on the side of the signal line facing the grounded surface. The side of the signal line remote from the grounded surface is then to a large extent decoupled from radio frequency energy, such that the actual signal path can be continued without being disturbed by radio frequency energy.

Abstract translation: 本发明涉及一种用于将射频能量与信号线中的信号能分离的滤波器装置。 信号线至少部分地延伸到多层印刷电路板的第一层中。 接地表面布置在印刷电路板的第二层中。 要滤波的信号线在滤波器区域的第一层中断，并在第三层中继续，第二和第三层位于第一层的相对侧。 由于皮肤效应，射频能量将集中在面向接地表面的信号线的一侧。 远离接地表面的信号线的一侧在很大程度上与射频能量解耦，使得实际的信号路径可以继续而不受射频能量的干扰。