公开(公告)号：US07524763B2

公开(公告)日：2009-04-28

申请号：US11145994

申请日：2005-06-07

Applicant: Soon-Bum Kim ,  Ung-Kwang Kim ,  Keum-Hee Ma ,  Young-Hee Song ,  Sung-Min Sim ,  Se-Yong Oh ,  Kang-Wook Lee ,  Se-Young Jeong

Inventor： Soon-Bum Kim ,  Ung-Kwang Kim ,  Keum-Hee Ma ,  Young-Hee Song ,  Sung-Min Sim ,  Se-Yong Oh ,  Kang-Wook Lee ,  Se-Young Jeong

IPC: H01L21/44

CPC classification number: C25D7/12 ,  C25D5/02 ,  H01L21/2885 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00

Abstract: A method of fabricating wafer level chip scale packages may involve forming a hole to penetrate through a chip pad of an IC chip. A base metal layer may be formed on a first face of a wafer to cover inner surfaces of the hole. An electrode metal layer may fill the hole and rise over the chip pad. A second face of the wafer may be grinded such that the electrode metal layer in the hole may be exposed through the second face. By electroplating, a plated bump may be formed on the electrode metal layer exposed through the second face. The base metal layer may be selectively removed to isolate adjacent electrode metal layers. The wafer may be sawed along scribe lanes to separate individual packages from the wafer.

Abstract translation: 制造晶片级芯片级封装的方法可包括形成穿透IC芯片的芯片焊盘的孔。 基底金属层可以形成在晶片的第一面上以覆盖孔的内表面。 电极金属层可以填充孔并在芯片垫上升起。 可以研磨晶片的第二面，使得孔中的电极金属层可以通过第二面露出。 通过电镀，可以在通过第二面暴露的电极金属层上形成电镀凸块。 可以选择性地去除贱金属层以隔离相邻的电极金属层。 可以沿着划线锯切晶片以将单独的封装与晶片分开。

公开(公告)号：US07521657B2

公开(公告)日：2009-04-21

申请号：US11149298

申请日：2005-06-10

Applicant: Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Keum-Hee Ma ,  Seong-Il Han

Inventor： Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Keum-Hee Ma ,  Seong-Il Han

IPC: H01L27/00

CPC classification number: H01L27/14618 ,  H01L24/48 ,  H01L24/49 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14685 ,  H01L2224/05553 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/16235 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00

Abstract: An assembly may include a wafer and a plate may be mounted on the wafer. The wafer may have image sensor chips and scribe lines demarcating each image sensor chip. The image sensor chip may include an active surface. Chip pads and a micro-lens may be provided on the active surface. A photo-sensitive adhesive pattern may be provided between the plate and a region of the active surface between the chip pads and the micro-lens. An image sensor device implementing an image sensor chip having an individual plate may also be provided.

Abstract translation: 组件可以包括晶片，并且板可以安装在晶片上。 晶片可以具有划分每个图像传感器芯片的图像传感器芯片和划线。 图像传感器芯片可以包括有源表面。 芯片焊盘和微透镜可以设置在有源表面上。 可以在平板与芯片垫和微透镜之间的活性表面的区域之间设置光敏粘合剂图案。 还可以提供实现具有单独板的图像传感器芯片的图像传感器装置。

公开(公告)号：US20080233755A1

公开(公告)日：2008-09-25

申请号：US11689570

申请日：2007-03-22

Applicant: Claude Blais ,  Eric Duchesne ,  Kang-Wook Lee ,  Sylvain Ouimet ,  Gerald J. Scilla

Inventor： Claude Blais ,  Eric Duchesne ,  Kang-Wook Lee ,  Sylvain Ouimet ,  Gerald J. Scilla

IPC: H01L21/302 ,  C23F1/00

CPC classification number: H01L21/02057 ,  H01L23/3128 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2224/0401

Abstract: A method of removing and/or reducing undesirable contaminants removes residues including graphitic layers, fluorinate layers, calcium sulfate (CaSO4) particles, tin oxides and organotin, from a chip passivation layer surface. The method uses a plasma process with an argon and oxygen mixture with optimized plasma parameters to remove both the graphitic and fluorinated layers and to reduce the level of the inorganic/tin oxides/organotin residue from an integrated circuit wafer while keeping the re-deposition of metallic compounds is negligible. This invention discloses the plasma processes that organics are not re-deposited from polymers to solder ball surfaces and tin oxide thickness does not increase on solder balls. The ratio of argon/oxygen is from about 50% to about 99% Ar and about 1% to about 50% O2 by volume. Incoming wafers, after treatment, are then diced to form individual chips that are employed to produce flip chip plastic ball grid array packages.

Abstract translation: 去除和/或减少不需要的污染物的方法从芯片钝化层表面去除残留物，包括石墨层，氟化物层，硫酸钙（CaSO 4）颗粒，氧化锡和有机锡。 该方法使用具有优化的等离子体参数的具有氩和氧混合物的等离子体处理以除去石墨和氟化层，并且从集成电路晶片中降低无机/锡氧化物/有机锡残余物的水平，同时保持重新沉积 金属化合物可忽略不计。 本发明公开了等离子体方法，有机物不会从聚合物重新沉积到焊球表面，氧化锡厚度在焊球上不增加。 氩/氧的比例为约50％至约99％Ar和约1％至约50％O 2体积％。 接下来的处理后的晶片被切割成用于制造倒装芯片塑料球栅阵列封装的单个芯片。

公开(公告)号：US20070020913A1

公开(公告)日：2007-01-25

申请号：US11529377

申请日：2006-09-29

Applicant: Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

Inventor： Se-Young Jeong ,  Jin-Hak Choi ,  Nam-Seog Kim ,  Kang-Wook Lee

IPC: H01L21/44

CPC classification number: H01L24/11 ,  H01L24/02 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  Y10S438/951 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method of forming a solder bump may involve forming a first photoresist pattern on a wafer having a pad. The first photoresist pattern may have an opening that exposes a portion of the pad. A first under bump metallurgy (UBM) layer may be formed on the pad, and a second UBM layer may be formed on the first photoresist pattern. A second photoresist pattern may be formed that exposes the first UBM layer and covers the second UBM layer. A solder bump may be formed in the opening. The second photoresist pattern and the first photoresist pattern may be removed using a stripper, thereby removing the second UBM layer by a lift-off method.

Abstract translation: 形成焊料凸点的方法可以包括在具有焊盘的晶片上形成第一光致抗蚀剂图案。 第一光致抗蚀剂图案可以具有露出垫的一部分的开口。 可以在焊盘上形成第一凸点下冶金（UBM）层，并且可以在第一光致抗蚀剂图案上形成第二UBM层。 可以形成第二光致抗蚀剂图案，其暴露第一UBM层并覆盖第二UBM层。 可以在开口中形成焊料凸块。 可以使用剥离剂除去第二光致抗蚀剂图案和第一光致抗蚀剂图案，从而通过剥离方法去除第二UBM层。

公开(公告)号：US20060151847A1

公开(公告)日：2006-07-13

申请号：US11177335

申请日：2005-07-11

Applicant: Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Seong-Il Han ,  Keum-Hee Ma ,  Suk-Chae Kang ,  Dong-Hyeon Jang

Inventor： Yong-Chai Kwon ,  Kang-Wook Lee ,  Gu-Sung Kim ,  Seong-Il Han ,  Keum-Hee Ma ,  Suk-Chae Kang ,  Dong-Hyeon Jang

IPC: H01L27/00

CPC classification number: H01L27/14618 ,  H01L27/1464 ,  H01L27/14685 ,  H01L2224/48091 ,  H04N5/2257 ,  H01L2924/00014

Abstract: An image sensor device including a protective plate may be manufactured from an image sensor chip having an active surface and a back surface opposite to the active surface. The image sensor chip may include chip pads formed in a peripheral region of the active surface, a microlens formed in a central region of the active surface and an intermediate region between the peripheral and central regions. A protective plate may be attached to the intermediate region of the active surface of the image sensor chip using an adhesive pattern that is sized and configured to maintain a separation distance between the protective plate and the microlens formed on the image sensor chip. Conductive plugs, formed before, during or after the manufacture of the image sensor chip circuitry may provide electrical connection between the chip pads and external connectors.

Abstract translation: 包括保护板的图像传感器装置可以由具有与活性表面相对的活性表面和背面的图像传感器芯片制造。 图像传感器芯片可以包括形成在有源表面的周边区域中的芯片焊盘，形成在有源表面的中心区域中的微透镜和在周边区域和中心区域之间的中间区域。 可以使用粘合剂图案将保护板附接到图像传感器芯片的有效表面的中间区域，该粘合剂图案的尺寸和构造用于保持保护板和形成在图像传感器芯片上的微透镜之间的间隔距离。 在图像传感器芯片电路制造之前，期间或之后形成的导电插塞可以提供芯片焊盘和外部连接器之间的电连接。

公开(公告)号：US20060033118A1

公开(公告)日：2006-02-16

申请号：US11128233

申请日：2005-05-13

Applicant: Kang-Wook Lee ,  Se-Young Jeong

Inventor： Kang-Wook Lee ,  Se-Young Jeong

IPC: H01L33/00 ,  H01L29/24

CPC classification number: H01L21/485 ,  B23K26/351 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2224/0401

Abstract: Exemplary embodiments of the selective laser repair apparatus and method may allow the repair of metal bumps in a semiconductor device stack by applying a laser beam to a damaged and/or defective bump. Metal bumps may be repaired and individual chips and/or packages forming a device stack need not be separated. The operation of a control unit and a driving unit may position a laser unit such that a laser beam may be irradiated at the damaged and/or defective metal bump. An X-ray inspection unit may obtain information about the damaged and/or defective metal bump.

Abstract translation: 选择性激光修复装置和方法的示例性实施例可以允许通过将激光束施加到损坏和/或缺陷凸起来修复半导体器件堆叠中的金属凸块。 可以修复金属凸块，并且不需要分离形成器件堆叠的各个芯片和/或封装。 控制单元和驱动单元的操作可以定位激光单元，使得可以在损坏的和/或有缺陷的金属凸块处照射激光束。 X射线检查单元可以获得有关损坏和/或有缺陷的金属凸块的信息。

公开(公告)号：US20050241731A1

公开(公告)日：2005-11-03

申请号：US10834293

申请日：2004-04-28

Applicant: Eric Duchesne ,  Michael Gaynes ,  Timothy Gosselin ,  Kang-Wook Lee ,  Valerie Oberson

Inventor： Eric Duchesne ,  Michael Gaynes ,  Timothy Gosselin ,  Kang-Wook Lee ,  Valerie Oberson

IPC: B23K35/34 ,  B23K35/36 ,  H05K3/34

CPC classification number: B23K35/3618 ,  B23K35/3615 ,  B23K35/3616 ,  H05K3/3484 ,  H05K3/3489

Abstract: The present invention is directed to soldering techniques and compositions for use therein. In one aspect, a flux composition is provided. The flux composition comprises a fluxing agent comprising organic acid, an organic tacking agent and an organic wetting agent. In another aspect, a soldering method for joining objects is provided comprising the following steps. A flux composition and a solder compound are applied to at least a portion of one or more of the objects. The flux composition comprises a fluxing agent comprising organic acid, an organic tacking agent and an organic wetting agent. The objects are then joined.

Abstract translation: 本发明涉及用于其中的焊接技术和组合物。 一方面，提供助焊剂组合物。 助熔剂组合物包含助熔剂，其包含有机酸，有机粘合剂和有机润湿剂。 另一方面，提供了一种用于连接物体的焊接方法，包括以下步骤。 将助焊剂组合物和焊料化合物施加到一个或多个物体的至少一部分上。 助熔剂组合物包含助熔剂，其包含有机酸，有机粘合剂和有机润湿剂。 然后连接对象。

公开(公告)号：US06844257B2

公开(公告)日：2005-01-18

申请号：US10601387

申请日：2003-06-23

Applicant: Ann R Fornof ,  Jeffrey C Hedrick ,  Kang-Wook Lee ,  Christy S Tyberg

Inventor： Ann R Fornof ,  Jeffrey C Hedrick ,  Kang-Wook Lee ,  Christy S Tyberg

IPC: H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/4763

CPC classification number: H01L21/22 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/02362 ,  H01L21/31695 ,  H01L21/76801 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  Y10T428/31663 ,  H01L2924/00

Abstract: An electrical interconnect structure on a substrate, includes a first porous dielectric layer with surface region from which a porogen has been removed; and an etch stop layer disposed upon the first porous dielectric layer so that the etch stop layer extends to partially fill pores in the surface region of the first porous dielectric layer from which the porogen has been removed, thus improving adhesion during subsequent processing. The porogen may be removed from the surface region by heating, and in particular by hot plate baking. A second porous dielectric layer, which may have the same composition as the first porous dielectric layer, may be formed over the etch stop layer. Electrical vias and lines may be formed in the first and second porous dielectric layer, respectively. The layers may be part of a multilayer stack, wherein all of the layers are cured simultaneously in a spin application tool porous dielectric layer.

Abstract translation: 衬底上的电互连结构包括具有表面区域的第一多孔电介质层，致孔剂从其中被除去; 以及设置在所述第一多孔介电层上的蚀刻停止层，使得所述蚀刻停止层延伸以部分地填充所述第一多孔介电层的表面区域中的致孔剂从其去除的表面区域中的孔，从而改善随后处理期间的粘附性。 致孔剂可以通过加热从表面区域去除，特别是通过热板烘烤除去。 可以在蚀刻停止层上形成第二多孔介电层，其可以具有与第一多孔介电层相同的组成。 可以分别在第一和第二多孔介电层中形成电气通孔和管线。 这些层可以是多层堆叠的一部分，其中所有层在旋涂施工工具多孔介电层中同时固化。

公开(公告)号：US5593720A

公开(公告)日：1997-01-14

申请号：US447564

申请日：1995-05-23

Applicant: Kie Y. Ahn ,  James L. Hedrick, Jr. ,  Jeffrey W. Labadie ,  Kang-Wook Lee ,  Robert J. Twieg ,  Alfred Viehbeck ,  George F. Walker

Inventor： Kie Y. Ahn ,  James L. Hedrick, Jr. ,  Jeffrey W. Labadie ,  Kang-Wook Lee ,  Robert J. Twieg ,  Alfred Viehbeck ,  George F. Walker

IPC: C08G73/18 ,  C08L71/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L23/532 ,  H05K1/00 ,  H05K1/03 ,  B05D5/12

CPC classification number: H01L23/5329 ,  C08G73/18 ,  C08L71/00 ,  H01L23/293 ,  H01L23/49894 ,  H01L2924/0002 ,  H05K1/0346 ,  H05K3/4676 ,  Y10S428/901 ,  Y10T29/49155 ,  Y10T29/49171 ,  Y10T428/24917 ,  Y10T428/31605 ,  Y10T428/31721

Abstract: A multilevel electronic package comprising at least two levels, each level including a poly(aryl ether benzimidazole), a polymide and copper. A process of preparing this package is disclosed. Several novel poly(aryl ether benzimidazoles) useful in preparing this package are also set forth.

Abstract translation: 包括至少两个级别的多级电子封装，每个级别包括聚（芳基醚苯并咪唑），聚酰亚胺和铜。 公开了制备该包装的过程。 还介绍了可用于制备该包装的几种新颖的聚（芳基醚苯并咪唑）。

公开(公告)号：US5326643A

公开(公告)日：1994-07-05

申请号：US771929

申请日：1991-10-07

Applicant: Eleftherios Adamopoulos ,  Jungihl Kim ,  Kang-Wook Lee ,  Tae S. Oh ,  Terrence R. O'Toole ,  Sampath Purushothaman ,  John J. Ritsko ,  Jane M. Shaw ,  Alfred Viehbeck ,  George F. Walker

Inventor： Eleftherios Adamopoulos ,  Jungihl Kim ,  Kang-Wook Lee ,  Tae S. Oh ,  Terrence R. O'Toole ,  Sampath Purushothaman ,  John J. Ritsko ,  Jane M. Shaw ,  Alfred Viehbeck ,  George F. Walker

IPC: B32B7/10 ,  B32B15/08 ,  B32B15/088 ,  B32B27/00 ,  C08G73/00 ,  C08G73/10 ,  H01B3/30 ,  H01L21/52 ,  H05K1/03 ,  H05K3/46 ,  B32B9/00

CPC classification number: C08G73/1089 ,  C08G73/1003 ,  C08G73/1007 ,  C08G73/101 ,  H01B3/306 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/31721

Abstract: The disclosure describes a multilayer article of manufacture comprising a substrate having adhered to it a terminally unsaturated adhesive polyimide, where the surface of the adhesive opposite the substrate is adhered to a polyimide, the article further characterized in having one set or a plurality of alternating layers of the terminally unsaturated adhesive polyimide and the polyimide. In another embodiment, the article has at least one adhesive polyimide layer adhered to a metal substrate or an electrical circuit component such as an integrated circuit, or means for forming electrical connections in an electrical circuit such as metal conduits on the circuit or a wiring network embedded within a ceramic and/or polymer substrate.In manufacturing the article of manufacture, a surface treatment technique such as wet process or a plasma/optional silane coupling agent may be applied to either the substrate, adhesive polyimide film or polyimide film prior to the bonding operation.A novel adhesive polyimide is also described which is an adhesive polyimide such as ODPA-APB terminated with unsaturated heterocyclic monoamines such as azaadenines, aminobenzotriazoles, aminopurines or aminopyrazolopyrimidines and optionally anhydrides, aminoacetylenes, vinylamines or amino phosphines. The novel polyimide may also contain unsaturated heterocyclic groups in the polymer backbone or chain, either as a partial or complete replacement for the aromatic diamines used in synthesizing the polyimide. This novel adhesive polyimide in this invention acts as an adhesive layer for the polymer-substrate (copper, polymer, glass ceramic) interface as well as a copper diffusion barrier layer for the polymer-copper interface.

Abstract translation: 本公开描述了一种多层制品，其包括粘附到其上的末端不饱和粘合聚酰亚胺的基底，其中与基底相对的粘合剂的表面粘附到聚酰亚胺上，该制品进一步的特征在于具有一组或多个交替层 的末端不饱和粘合聚酰亚胺和聚酰亚胺。 在另一个实施方案中，制品具有粘附到金属基底或诸如集成电路的电路部件的至少一个粘合聚酰亚胺层，或用于在电路中形成电连接的装置，例如电路上的金属管道或布线网络 嵌入在陶瓷和/或聚合物基材内。 在制造该制品时，可以在接合操作之前将表面处理技术如湿法或等离子体/任选的硅烷偶联剂施加到基底，粘合聚酰亚胺膜或聚酰亚胺膜上。 还描述了一种新型粘合聚酰亚胺，其是粘合聚酰亚胺，例如用不饱和杂环单胺如氮杂腺嘌呤，氨基苯并三唑，氨基嘌呤或氨基吡唑并嘧啶和任选的酸酐，氨基乙炔，乙烯胺或氨基膦封端的ODPA-APB。 新型聚酰亚胺还可以在聚合物主链或链中含有不饱和杂环基团，作为用于合成聚酰亚胺的芳族二胺的部分或完全替代物。 本发明中的这种新型粘合聚酰亚胺作为聚合物基材（铜，聚合物，玻璃陶瓷）界面的粘合剂层以及用于聚合物 - 铜界面的铜扩散阻挡层。