公开(公告)号：US20080308915A1

公开(公告)日：2008-12-18

申请号：US12198526

申请日：2008-08-26

申请人： Geng-Shin Shen ,  David Wei Wang

发明人： Geng-Shin Shen ,  David Wei Wang

IPC分类号： H01L23/495

CPC分类号： H01L23/4951 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3185 ,  H01L23/49513 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A chip package including a circuit substrate, a first chip, first bonding wires, a component, a first adhesive layer and a molding compound is provided. The first chip has a first active surface, a first rear surface and first bonding pads, the first rear surface is adhered on the circuit substrate and the first chip is electrically connected with the circuit substrate. The first bonding wires are electrically connected with the circuit substrate and the first bonding pads of the first chip. The component is disposed over the first active surface of the first chip. The first adhesive layer adhered between the first active surface and the component without covering the first bonding pads and includes a first B-staged adhesive layer adhered on a portion of the first active surface of the first chip and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the component.

摘要翻译： 提供了包括电路基板，第一芯片，第一接合线，部件，第一粘合层和模塑料的芯片封装。 第一芯片具有第一有源面，第一后表面和第一接合焊盘，第一后表面粘附在电路基板上，第一芯片与电路基板电连接。 第一接合线与电路基板和第一芯片的第一接合焊盘电连接。 该部件设置在第一芯片的第一有源表面上。 所述第一粘合剂层粘附在所述第一活性表面和所述组分之间，而不覆盖所述第一接合焊盘，并且包括附着在所述第一芯片的所述第一有源表面的一部分上的第一B阶粘合剂层和粘附到所述第一有源表面的第二B阶粘合剂层 在第一B阶粘合剂层和组分之间。

公开(公告)号：US20080308914A1

公开(公告)日：2008-12-18

申请号：US12198517

申请日：2008-08-26

申请人： Geng-Shin Shen ,  David Wei Wang

发明人： Geng-Shin Shen ,  David Wei Wang

IPC分类号： H01L23/12

CPC分类号： H01L23/4951 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/3185 ,  H01L23/49513 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32265 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2225/0651 ,  H01L2225/06558 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19107 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/48227 ,  H01L2924/00012

摘要： A chip package including a circuit substrate having an opening, a first chip, first bonding wires, a component, a first adhesive layer and a molding compound is provided. The first chip has a first active surface and a first rear surface opposite to the first active surface, the first chip is flipped on and electrically connected with the circuit substrate. The first bonding wires are electrically connected with the circuit substrate and the first chip, and each first bonding wire passes through the opening. The component is disposed over the first rear surface. The first adhesive layer adhered between the first rear surface and the component includes a first B-staged adhesive layer adhered on the first rear surface and the component and a second B-staged adhesive layer adhered between the first B-staged adhesive layer and the component. The molding compound is disposed on the circuit substrate.

摘要翻译： 提供了包括具有开口的电路基板，第一芯片，第一接合线，部件，第一粘合层和模塑料的芯片封装。 第一芯片具有第一有源表面和与第一有源表面相对的第一后表面，第一芯片被翻转并与电路基板电连接。 第一接合线与电路基板和第一芯片电连接，并且每个第一接合线穿过开口。 该部件设置在第一后表面上。 附着在第一后表面和部件之间的第一粘合剂层包括附着在第一后表面上的第一B阶粘合剂层和部件，以及粘附在第一B阶粘合剂层和部件之间的第二B阶粘合剂层 。 模塑料配置在电路基板上。

公开(公告)号：US07436074B2

公开(公告)日：2008-10-14

申请号：US11302736

申请日：2005-12-13

申请人： Yu-Tang Pan ,  Cheng-Ting Wu ,  Shih-Wen Chou ,  Hui-Ping Liu

发明人： Yu-Tang Pan ,  Cheng-Ting Wu ,  Shih-Wen Chou ,  Hui-Ping Liu

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/6835 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49534 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

摘要： A chip package without a core, including a patterned circuit layer, a chip, a solder mask, a molding compound and multiple outer terminals, is provided. The patterned circuit layer has a first surface and a second surface opposite to each other. The chip disposed on the first surface is electrically connected to the patterned circuit layer. The solder mask disposed on the second surface has a plurality of first openings by which part of the patterned circuit layer is exposed. The molding compound with a plurality of through holes cover the pattern circuit layer and fix the chip onto the patterned circuit layer. Each outer terminal disposed in the through hole is electrically connected to the patterned circuit layer.

摘要翻译： 提供了不具有芯的芯片封装，包括图案化电路层，芯片，焊接掩模，模塑料和多个外部端子。 图案化电路层具有彼此相对的第一表面和第二表面。 布置在第一表面上的芯片电连接到图案化电路层。 设置在第二表面上的焊料掩模具有多个第一开口，图案化电路层的一部分露出。 具有多个通孔的成型复合物覆盖图形电路层，并将芯片固定在图案化电路层上。 布置在通孔中的每个外部端子电连接到图案化电路层。

公开(公告)号：US20080246131A1

公开(公告)日：2008-10-09

申请号：US11755753

申请日：2007-05-31

申请人： Yu-Tang Pan ,  Shih-Wen Chou

发明人： Yu-Tang Pan ,  Shih-Wen Chou

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  H01L23/4334 ,  H01L23/495 ,  H01L24/31 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48247 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A chip package structure including a circuit pattern, a frame, a first adhesive layer, a plurality of leads, an insulating adhesive layer, a chip, a plurality of first bonding wires, a plurality of second bonding wires, and a molding compound is provided. The frame and leads are disposed around the circuit pattern. The first adhesive layer fastens the frame and the circuit pattern. The insulating adhesive layer is disposed between the leads and the frame. The chip has a plurality of bonding pads and is disposed on the first adhesive layer. The first bonding wires electrically connect the bonding pads individually to the circuit pattern. The second bonding wires electrically connect the leads individually to the circuit pattern. Thus, the bonding pads are electrically connected with the leads through the first bonding wires, the circuit pattern, and the second bonding wires. The molding compound covers foregoing components.

摘要翻译： 提供包括电路图案，框架，第一粘合剂层，多个引线，绝缘粘合剂层，芯片，多个第一接合线，多个第二接合线和模制化合物的芯片封装结构 。 框架和引线设置在电路图案周围。 第一粘合层紧固框架和电路图案。 绝缘粘合剂层设置在引线和框架之间。 芯片具有多个接合焊盘并设置在第一粘合剂层上。 第一接合线将接合焊盘分别电连接到电路图案。 第二接合线将引线单独地电连接到电路图案。 因此，接合焊盘通过第一接合线，电路图案和第二接合线与引线电连接。 模塑料覆盖上述组分。

公开(公告)号：US20080197475A1

公开(公告)日：2008-08-21

申请号：US11822113

申请日：2007-07-02

申请人： Cheng Tang Huang

发明人： Cheng Tang Huang

IPC分类号： H01L23/488

CPC分类号： H01L24/11 ,  H01L23/525 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A packaging conductive structure for a semiconductor substrate and a method for forming the structure are provided. The dielectric layer of the packaging conductive structure partially overlays the metallic layer of the semiconductor substrate and has a receiving space. The lifting layer and conductive layer are formed in the receiving space, wherein the conductive layer extends for connection to a bump. The lifting layer is partially connected to the dielectric layer. As a result, the conductive layer can be stably deposited on the edge of the dielectric layer for enhancing the reliability of the packaging conductive structure.

摘要翻译： 提供了一种用于半导体衬底的封装导电结构以及用于形成该结构的方法。 包装导电结构的电介质层部分覆盖半导体衬底的金属层并具有接收空间。 提升层和导电层形成在接收空间中，其中导电层延伸以连接到凸块。 提升层部分连接到电介质层。 结果，导电层可以稳定地沉积在电介质层的边缘上，以提高封装导电结构的可靠性。

公开(公告)号：US20080197467A1

公开(公告)日：2008-08-21

申请号：US11898612

申请日：2007-09-13

申请人： J.B. Chyi ,  Cheng Tang Huang

发明人： J.B. Chyi ,  Cheng Tang Huang

IPC分类号： H01L23/495 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/12 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/114 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/116 ,  H01L2224/13007 ,  H01L2224/13144 ,  H01L2224/1357 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/013

摘要： A conductive structure for a semiconductor integrated circuit and method for forming the conductive structure are provided. The semiconductor integrated circuit has a pad and a passivation layer partially covering the pad to define a first opening portion having a first lateral size. The conductive structure electrically connects to the pad via the first opening portion. The conductive structure comprises a support layer defining a second opening portion. A conductor is formed in the second opening portion to serve as a bump having a planar top surface.

摘要翻译： 提供了一种用于半导体集成电路的导电结构和用于形成导电结构的方法。 半导体集成电路具有焊盘和钝化层，其部分地覆盖焊盘以限定具有第一横向尺寸的第一开口部分。 导电结构经由第一开口部分电连接到焊盘。 导电结构包括限定第二开口部分的支撑层。 导体形成在第二开口部分中以用作具有平坦顶表面的凸块。

公开(公告)号：US20080029903A1

公开(公告)日：2008-02-07

申请号：US11826302

申请日：2007-07-13

申请人： Hung Tsun Lin

发明人： Hung Tsun Lin

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L23/3121 ,  H01L23/49575 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L25/0657 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2224/83136 ,  H01L2224/83191 ,  H01L2224/83856 ,  H01L2224/85051 ,  H01L2224/85399 ,  H01L2224/85986 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85186 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/4554

摘要： The present invention provides a chip-stacked structure, comprising: a substrate with a plurality of terminals and a chip-stacked structure formed by a plurality of stacked chips and fixedly connected to the substrate. Wherein an active surface of each chip in the chip-stacked structure is provided with a plurality of pads and the back surface of each chip is provided with an insulation layer. The plurality of chips is connected by an adhesive layer provided between the active surface of one chip and the insulation layer on the back surface of another chip and thus the chip-stacked structure is formed. The plurality of pads is electrically connected to the plurality of terminals on the substrate with a plurality of metal wires.

摘要翻译： 本发明提供了一种芯片堆叠结构，包括：具有多个端子的基板和由多个堆叠的芯片形成并且固定地连接到基板的芯片堆叠结构。 其中芯片堆叠结构中的每个芯片的有源表面设置有多个焊盘，并且每个芯片的背表面设置有绝缘层。 多个芯片通过设置在一个芯片的有源表面和另一芯片的背面上的绝缘层之间的粘合层连接，从而形成芯片堆叠结构。 多个焊盘通过多个金属线电连接到衬底上的多个端子。

公开(公告)号：US20080017961A1

公开(公告)日：2008-01-24

申请号：US11530165

申请日：2006-09-08

申请人： Chun-Hung Lin ,  Shih-Wen Chou ,  Yu-Tang Pan

发明人： Chun-Hung Lin ,  Shih-Wen Chou ,  Yu-Tang Pan

IPC分类号： H01L21/00

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method of a chip package structure is provided. A circuit substrate having a first surface, a second surface, and a through hole connecting the first surface and the second surface is provided. A chip having an active surface and bonding pads disposed on the active surface is provided. The chip is fixed on the circuit substrate, wherein the second surface is opposite to the active surface and the bonding pads are exposed to the through hole. Bonding wires connecting the bonding pads and the first surface are formed through the through hole. A film having an opening is formed on the first surface. The bonding wires, the bonding pads, the through hole, and part of the first surface are exposed by the opening. An encapsulant is formed to encapsulate part of the active surface, the bonding wires, and part of the first surface. The film is removed.

摘要翻译： 提供了一种芯片封装结构的制造方法。 提供具有第一表面，第二表面和连接第一表面和第二表面的通孔的电路基板。 提供具有有源表面的芯片和设置在有源表面上的接合焊盘。 芯片固定在电路基板上，其中第二表面与有源表面相对，并且焊盘暴露于通孔。 通过通孔形成连接接合焊盘和第一表面的接合线。 具有开口的膜形成在第一表面上。 接合线，接合焊盘，通孔和第一表面的一部分由开口露出。 形成密封剂以封装部分活性表面，接合线和第一表面的一部分。 电影被删除。

公开(公告)号：US07316065B2

公开(公告)日：2008-01-08

申请号：US11364330

申请日：2006-03-01

申请人： Yi-Chang Lee ,  An-Hong Liu ,  Yeong-Her Wang ,  Yeong-Ching Chao ,  Hsiang-Ming Huang

发明人： Yi-Chang Lee ,  An-Hong Liu ,  Yeong-Her Wang ,  Yeong-Ching Chao ,  Hsiang-Ming Huang

IPC分类号： G01R3/00

CPC分类号： G01R3/00 ,  G01R1/06716 ,  G01R1/06744 ,  G01R1/07342 ,  H01R13/2414 ,  H01R43/007 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

摘要： A method of forming a plurality of elastic probes in a row is disclosed. Firstly, a substrate is provided, then, a shaping layer is formed on the substrate so as to offer two flat surfaces in parallel. A photoresist layer is formed on the substrate and on the shaping layer. Then, the photoresist layer is patterned to form a plurality of slots crossing an interface between the two flat surfaces where a plurality of elastic probes are formed in the slots. In one embodiment, the interface is an edge slope of the shaping layer so that each of the elastic probes has at least an elastic bending portion. During chip probing, the shifting direction of the elastic probes due to overdrives is perpendicular to the arranging direction of the bonding pads so that the elastic probes are suitable for probing chips with high-density and fine-pitch bonding pads.

摘要翻译： 公开了一排形成多个弹性探针的方法。 首先，提供基板，然后在基板上形成成形层，以便平行地提供两个平坦表面。 在基板上和形成层上形成光致抗蚀剂层。 然后，对光致抗蚀剂层进行图案化以形成与两个平坦表面之间的界面交叉的多个槽，其中在槽中形成有多个弹性探针。 在一个实施例中，界面是成形层的边缘斜率，使得每个弹性探针具有至少一个弹性弯曲部分。 在芯片探测期间，由于过驱动导致的弹性探针的移动方向垂直于接合焊盘的布置方向，使得弹性探头适用于探测具有高密度和细间距接合焊盘的芯片。

公开(公告)号：US20070152689A1

公开(公告)日：2007-07-05

申请号：US11322408

申请日：2006-01-03

申请人： Yi-Chang Lee ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Yao-Jung Lee ,  Yeong-Her Wang

发明人： Yi-Chang Lee ,  An-Hong Liu ,  Hsiang-Ming Huang ,  Yao-Jung Lee ,  Yeong-Her Wang

IPC分类号： G01R31/02

CPC分类号： G01R1/07378

摘要： A modular probe card comprises a printed circuit board, an interposer, and a probe head where the printed circuit board has a plurality of first contact pads, the probe head has a plurality of second contact pads. The interposer is disposed between the printed circuit board and the probe head where the interposer includes a substrate and a plurality of pogo pins. The substrate has a first surface, a second surface, and a plurality of through holes penetrating from the first surface to the second surface. The pogo pins are secured in the through holes of the substrate. Each of the pogo pins has a first contact point, a second contact point, and a spring therebetween, whereby the first contact points are elastically extruded from the first surface to contact the first contact pad, and the second contact points are elastically extruded from the second surface to contact the second contact pad, so as to overcome the poor electrical connections between the printed circuit board and the probe head through the interposer due to poor coplanarity of the first contact pads of the printed circuit board.

摘要翻译： 模块化探针卡包括印刷电路板，插入件和探针头，其中印刷电路板具有多个第一接触焊盘，探头具有多个第二接触焊盘。 插入器设置在印刷电路板和探针头之间，其中插入器包括基板和多个弹簧销。 基板具有从第一表面到第二表面的第一表面，第二表面和多个通孔。 弹簧销固定在基板的通孔中。 每个弹簧销具有第一接触点，第二接触点和它们之间的弹簧，由此第一接触点从第一表面弹性挤出以接触第一接触垫，并且第二接触点从 第二表面接触第二接触焊盘，以便克服印刷电路板和探针头之间通过插入器的不良电连接，因为印刷电路板的第一接触焊盘的共面性差。