公开(公告)号：US20050146821A1

公开(公告)日：2005-07-07

申请号：US11033354

申请日：2005-01-07

Applicant: Joseph Fjelstad ,  Kevin Grundy

Inventor： Joseph Fjelstad ,  Kevin Grundy

IPC: H01L23/62 ,  H02H9/00

CPC classification number: H01L23/62 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An IC package substrate having integral ESD protection features and elements and a method for construction of the same are disclosed

Abstract translation: 公开了具有整体ESD保护特征和元件的IC封装基板及其构造方法

公开(公告)号：US06706973B2

公开(公告)日：2004-03-16

申请号：US10200941

申请日：2002-07-23

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad

IPC: H05K116

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

公开(公告)号：US06700072B2

公开(公告)日：2004-03-02

申请号：US09779117

申请日：2001-02-08

Applicant: Thomas H. Distefano ,  Joseph Fjelstad

Inventor： Thomas H. Distefano ,  Joseph Fjelstad

IPC: H05K103

CPC classification number: H05K3/462 ,  H01L23/49827 ,  H01L23/5385 ,  H01L2924/0002 ,  H01R12/523 ,  H01R12/714 ,  H01R13/2414 ,  H01R43/0256 ,  H05K1/0272 ,  H05K1/036 ,  H05K1/056 ,  H05K1/116 ,  H05K3/0032 ,  H05K3/326 ,  H05K3/4623 ,  H05K3/4641 ,  H05K2201/0195 ,  H05K2201/0382 ,  H05K2201/0397 ,  H05K2201/09536 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10378 ,  H05K2203/0554 ,  H05K2203/0582 ,  H05K2203/135 ,  H05K2203/308 ,  Y10T29/49126 ,  Y10T29/49133 ,  Y10T29/49137 ,  Y10T29/49139 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1744 ,  H01L2924/00

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract translation: 用于微电子电路板之间的互连的插入件在其表面具有接触。 每个接触件从中心导体延伸，并且具有适于从中心导体径向向内收缩的外围部分，以响应由在所接合的电路板上限定中心孔的接触垫施加的力。 因此，当电路板被内插件压缩时，触头径向向内收缩并且擦拭穿过焊盘。 擦拭动作有助于通过摩擦焊接将接触件接合到焊盘，或者通过接触件本身承载的导电接合材料。

公开(公告)号：US06690186B2

公开(公告)日：2004-02-10

申请号：US09999615

申请日：2001-10-24

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: G01R1073

CPC classification number: G01R1/07342 ,  G01R1/0491 ,  G01R1/06727 ,  G01R3/00

Abstract: A probe card for testing an electrical element such as a semiconductor wafer or a printed wiring board includes a substrate with circuitry thereon, an encapsulant layer overlying the substrate and a multiplicity of leads extending upwardly from the substrate through the encapsulant layer to terminals, the terminals projecting above the encapsulant layer. The probe card can be engaged with the electronic element so that the tips of the leads bear on the contact pads of the electronic element, and so that the leads and encapsulant layer deform to accommodate irregularities in the electronic element or probe card. The card can be made by providing the substrate, a sacrificial layer and leads extending between the sacrificial layer and substrate, moving the substrate and sacrificial layer away from one another to deform the leads and injecting a curable material around the leads to form the encapsulant layer.

Abstract translation: 用于测试诸如半导体晶片或印刷线路板的电气元件的探针卡包括其上具有电路的衬底，覆盖衬底的密封剂层和从衬底通过密封剂层向上延伸到端子的多个引线，端子 突出在密封剂层上方。 探针卡可以与电子元件接合，使得引线的尖端承载在电子元件的接触垫上，并且使得引线和密封剂层变形以适应电子元件或探针卡中的不规则。 可以通过提供衬底，牺牲层和在牺牲层和衬底之间延伸的引线来制造该卡，使衬底和牺牲层彼此远离地移动以使引线变形并且在引线周围注入可固化材料以形成密封层 。

公开(公告)号：US06573609B2

公开(公告)日：2003-06-03

申请号：US09771412

申请日：2001-01-26

Applicant: Joseph Fjelstad ,  John Myers

Inventor： Joseph Fjelstad ,  John Myers

IPC: H01L2940

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K3/284 ,  H05K3/4084 ,  H05K2201/049 ,  H05K2201/10234 ,  H05K2201/10378 ,  H05K2201/10977 ,  H05K2203/041 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A connection component is provided. The connection component includes (1) a first interposer having a first surface to which a microelectronic may be mounted and a second surface opposite from the first surface, (2) a second interposer that is more flexible than the first interposer and that is disposed under the second surface of the rigid interposer, and (3) a plurality of conductive parts that may be positioned in the first and second interposers and that may be exposed at the first surface of the first interposer, a bottom surface of the second interposer, or both the first and bottom surfaces. The electrically conductive parts may include leads. A socket assembly or a microelectronic element such as semiconductor chip may be mounted onto the first surface of the rigid interposer. The connection component may be mounted onto a support substrate.

Abstract translation: 提供连接组件。 连接部件包括：（1）具有可安装微电子的第一表面的第一插入件和与第一表面相对的第二表面;（2）比第一插入件更柔性的第二插入件， 刚性插入件的第二表面，以及（3）可以位于第一和第二插入件中并且可以暴露在第一插入件的第一表面处的多个导电部件，第二插入件的底表面或 第一和第二表面。 导电部件可以包括引线。 插座组件或诸如半导体芯片的微电子元件可以安装在刚性插入件的第一表面上。 连接部件可以安装在支撑基板上。

公开(公告)号：US06518160B1

公开(公告)日：2003-02-11

申请号：US09245227

申请日：1999-02-05

Applicant: Joseph Fjelstad ,  Belgacem Haba ,  David Light

Inventor： Joseph Fjelstad ,  Belgacem Haba ,  David Light

IPC: H01L2144

CPC classification number: H01L21/486 ,  H05K3/0041 ,  H05K3/061 ,  H05K3/108 ,  H05K3/421 ,  H05K2201/0394 ,  H05K2203/0554 ,  H05K2203/0585

Abstract: A connection component is made by providing an assembly comprising a base layer of a dielectric material, a metal layer overlying the base layer, and a top layer of a plasma-etchable material overlying the metal layer; forming openings in the top layer to produce a top layer mask; and forming first conductive elements from the metal layer by removing metal from regions of the metal layer aligned with the openings in the top layer mask. This method may be used to form a connection component having vias or bond windows formed therein for connection with other elements of a microelectronic device and conductive elements may be formed on either or both sides of the base layer.

Abstract translation: 通过提供包括电介质材料的基底层，覆盖在基底层上的金属层和覆盖在金属层上的等离子体可蚀刻材料的顶层的组件来制造连接部件; 在顶层中形成开口以产生顶层掩模; 以及通过从与顶层掩模中的开口对准的金属层的区域中去除金属，从金属层形成第一导电元件。 该方法可以用于形成具有形成在其中的通孔或接合窗口的连接部件，用于与微电子器件的其它元件连接，并且可以在基底层的一侧或两侧上形成导电元件。

公开(公告)号：US06357112B1

公开(公告)日：2002-03-19

申请号：US09200100

申请日：1998-11-25

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad ,  Belgacem Haba ,  Owais Jamil ,  Konstantine Karavakis ,  David Light ,  John W. Smith

IPC: H01R906

CPC classification number: H01L24/72 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12042 ,  H05K3/4092 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  H01L2924/00

Abstract: A connection component for use in making microelectronic element assemblies, has peelable leads that are formed on a dielectric support structure. One end of each lead is permanently connected to the support structure and the opposite end of the lead is releasably connected to the support structure. When the releasable end of the lead is bonded to a contact on a semiconductor chip, the releasable end of the lead can be peeled from the support structure such that the chip may be moved away from the support structure. A compliant layer may be disposed between the chip and the support structure. If a compliant material is injected between the chip and the support structure to form the compliant layer, the compliant material will lift the chip away from the support structure and facilitate the peeling of the leads from the support structure.

Abstract translation: 用于制造微电子元件组件的连接部件具有形成在电介质支撑结构上的可剥离引线。 每个引线的一端永久地连接到支撑结构，并且引线的相对端可释放地连接到支撑结构。 当引线的可释放端接合到半导体芯片上的触点时，引线的可释放端可以从支撑结构剥离，使得芯片可以从支撑结构移开。 柔性层可以设置在芯片和支撑结构之间。 如果柔性材料在芯片和支撑结构之间注入以形成顺应性层，柔性材料将使芯片从支撑结构上提升，并促进引线从支撑结构的剥离。

公开(公告)号：US06307260B1

公开(公告)日：2001-10-23

申请号：US09395105

申请日：1999-09-14

Applicant: John W. Smith ,  Joseph Fjelstad

Inventor： John W. Smith ,  Joseph Fjelstad

IPC: H01L2348

CPC classification number: H01L23/22 ,  H01L21/4839 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/642 ,  H01L24/13 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15174 ,  H01L2924/351 ,  H05K1/118 ,  H05K3/361 ,  H05K3/4084 ,  H05K2201/0133 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/09081 ,  H05K2203/063 ,  H01L2924/00

Abstract: A structure including a conductive, preferably metallic conductive layer is provided with leads on a bottom surface. The leads have fixed ends permanently attached to the structure and free ends detachable from the structure. The structure is engaged with a microelectronic element such as a semiconductor chip or wafer, the free ends of the leads are bonded to the microelectronic element, and the leads are bent by moving the structure relative to the microelectronic element. Portions of the conductive layer are removed, leaving residual portions of the conductive layer as separate electrical terminals connected to at least some of the leads. The conductive layer mechanically stabilizes the structure before bonding, and facilitates precise registration of the leads with the microelectronic element. After the conductive layer is converted to separate terminals, it does not impair free movement of the terminals relative to the microelectronic element.

Abstract translation: 包括导电优选金属导电层的结构在底表面上设置有引线。 引线具有永久地附接到结构的固定端部和从结构可拆卸的自由端。 该结构与诸如半导体芯片或晶片的微电子元件接合，引线的自由端接合到微电子元件，并且通过相对于微电子元件移动结构而使引线弯曲。 导电层的一部分被去除，导致导电层的剩余部分作为分开的电端子连接到至少一些引线。 导电层在结合之前机械稳定结构，并且有助于引线与微电子元件的精确对准。 在将导电层转换成单独的端子之后，它不会损害端子相对于微电子元件的自由移动。

公开(公告)号：US06265759B1

公开(公告)日：2001-07-24

申请号：US09120006

申请日：1998-07-21

Applicant: Thomas H. DiStefano ,  Joseph Fjelstad ,  John W. Smith

Inventor： Thomas H. DiStefano ,  Joseph Fjelstad ,  John W. Smith

IPC: H01L23495

CPC classification number: H01L24/48 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49171 ,  H01L2224/85207 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399

Abstract: A semiconductor chip package having an internal laterally curved lead in order to compensate for the CTE mismatch between a semiconductor chip and a supporting substrate, such as a PWB.

Abstract translation: 一种具有内部横向弯曲引线的半导体芯片封装，以补偿半导体芯片和诸如PWB的支撑基板之间的CTE失配。

公开(公告)号：US06221750B1

公开(公告)日：2001-04-24

申请号：US09428158

申请日：1999-10-27

Applicant: Joseph Fjelstad

Inventor： Joseph Fjelstad

IPC: H01L2144

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/02335 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05027 ,  H01L2224/05548 ,  H01L2224/13099 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3025

Abstract: An element such as a semiconductor wafer or other body is provided with leads by applying a sacrificial layer over the front surface of the body depositing leads onto the sacrificial layer so that the leads are connected to contact pads on the body and removing the sacrificial layer from beneath the leads. The sacrificial layer may incorporate thin and thick regions so that portions of the leads projecting upwardly away from the body will be formed on the thick regions of the sacrificial layer.

Abstract translation: 诸如半导体晶片或其它主体的元件通过在主体的前表面上施加牺牲层而设置有引线，从而将引线沉积到牺牲层上，使得引线连接到主体上的接触焊盘，并且将牺牲层从 在线下面 牺牲层可以结合薄且厚的区域，使得在牺牲层的较厚区域上形成向上远离主体的部分引线。