Chip capacitor embedment method
    15.
    发明申请
    Chip capacitor embedment method 审中-公开
    片式电容器嵌入法

    公开(公告)号:US20110179642A1

    公开(公告)日:2011-07-28

    申请号:US13064542

    申请日:2011-03-30

    IPC分类号: H05K3/30

    摘要: A method of embedding a chip capacitor in a printed circuit board including a first conductive layer and a dielectric layer placed on the first conductive layer includes removing the dielectric layer to form a cavity exposing the first conductive layer; seating a chip capacitor in the cavity; filling a filled material at a space excluding a space occupied by the chip capacitor in the cavity; forming a via penetrating the filled material and being connected to the chip capacitor; and stacking a conductive material to constitute a second conductive layer in surfaces of the via and the dielectric layer and in an surface of the filled material filled in the cavity.

    摘要翻译: 将片状电容器嵌入到包括放置在第一导电层上的第一导电层和介电层的印刷电路板中的方法包括去除电介质层以形成露出第一导电层的空腔; 将片状电容器放置在空腔中; 在不包括空腔中的片状电容器占据的空间的空间填充填充材料; 形成穿过填充材料并连接到片式电容器的通孔; 并且在通孔和电介质层的表面和填充在空腔中的填充材料的表面中堆叠导电材料以构成第二导电层。

    Printed circuit board with embedded cavity capacitor
    16.
    发明授权
    Printed circuit board with embedded cavity capacitor 有权
    带嵌入式腔体电容器的印刷电路板

    公开(公告)号:US07983055B2

    公开(公告)日:2011-07-19

    申请号:US12010436

    申请日:2008-01-24

    IPC分类号: H05K1/18 H01L27/108

    摘要: A printed circuit board having an embedded cavity capacitor is disclosed. According to an embodiment of the present invention, the printed circuit board having the embedded cavity capacitor, the printed circuit board can include two conductive layers to be used as a power layer and a ground layer, respectively; and a first dielectric layer, placed between the two conductive layers, wherein at least one cavity capacitor is arranged in a noise-transferable path between a noise source and a noise prevented destination which are placed on the printed circuit board, the cavity capacitor being formed to allow a second dielectric layer to have a lower stepped region than the first dielectric layer, the second dielectric layer using the two conductive layers as a first electrode and a second electrode, respectively, and placed between the first electrode and the second electrode.

    摘要翻译: 公开了一种具有嵌入式腔体电容器的印刷电路板。 根据本发明的实施例,具有嵌入式空腔电容器的印刷电路板,印刷电路板可以分别包括用作功率层和接地层的两个导电层; 以及放置在所述两个导电层之间的第一电介质层,其中至少一个空腔电容器被布置在放置在所述印刷电路板上的噪声源和被噪声阻止的目的地之间的可噪声转移路径中,形成所述空腔电容器 以允许第二电介质层具有比第一电介质层更低的台阶区域,第二电介质层分别使用两个导电层作为第一电极和第二电极,并且放置在第一电极和第二电极之间。

    Method of manufacturing optical board
    19.
    发明申请
    Method of manufacturing optical board 审中-公开
    制造光板的方法

    公开(公告)号:US20090133444A1

    公开(公告)日:2009-05-28

    申请号:US12149517

    申请日:2008-05-02

    IPC分类号: C03B37/022

    摘要: A method of manufacturing an optical board is disclosed. The method of manufacturing an optical board may include stacking an optical waveguide core layer over a first optical waveguide cladding layer, forming an inclined surface by diffracting a laser with a mask to remove a portion of the optical waveguide core layer, and stacking a reflective layer over the inclined surface.

    摘要翻译: 公开了一种制造光学板的方法。 制造光学板的方法可以包括在第一光波导包层上层叠光波导芯层,通过用掩模衍射激光来形成倾斜表面以去除光波导芯层的一部分,并且将反射层 在倾斜的表面上。

    Optical wiring board and manufacturing method thereof
    20.
    发明申请
    Optical wiring board and manufacturing method thereof 审中-公开
    光接线板及其制造方法

    公开(公告)号:US20090130390A1

    公开(公告)日:2009-05-21

    申请号:US12149952

    申请日:2008-05-09

    IPC分类号: B32B3/00 B29D11/00

    摘要: An optical wiring board and a method of manufacturing the optical wiring board are disclosed. The method of manufacturing an optical wiring board may include forming a lower cladding over an insulating layer; forming a side cladding, which has an indentation corresponding with the core, over the lower cladding; filling a core material in the indentation; and forming an upper cladding such that the core material is covered. Embodiments of the invention can be utilized to readily control the thickness of the core.

    摘要翻译: 公开了一种光布线板及其制造方法。 制造光布线板的方法可以包括在绝缘层上形成下包层; 在所述下包层上形成具有与所述芯对应的凹陷的侧包层; 填充压痕中的芯材; 并且形成上覆层,使得芯材被覆盖。 本发明的实施例可用于容易地控制芯的厚度。