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    Formation of a metallic interlocking structure
    261.
    发明申请
    Formation of a metallic interlocking structure 失效

    公开(公告)号：US20020056890A1

    公开(公告)日：2002-05-16

    申请号：US10039710

    申请日：2002-01-04

    Applicant: International Business Machines Corporation

    Inventor： Gerald G. Advocate JR. ,  Francis J. Downes JR. ,  Luis J. Matienzo ,  Ronald A. Kaschak ,  John S. Kresge ,  Daniel C. Van Hart

    IPC: H01L029/93

    CPC classification number: H01L23/5226 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K3/0035 ,  H05K3/027 ,  H05K3/06 ,  H05K3/383 ,  H05K3/421 ,  H05K3/4644 ,  H05K2201/0248 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/0353 ,  H01L2924/00

    Abstract: An electronic structure including a metallic interlocking structure for bonding a conductive plated layer to metal surface, and a method of forming the electronic structure. The method provides a substrate having a metallic sheet within a dielectric layer. The metallic sheet includes a metal such as copper. An opening in the substrate, such as a blind via, is formed by laser drilling through the dielectric layer and partially through the metallic sheet. If the opening is a blind via, then the laser drilling is within an outer ring of the blind via cross section using a laser beam having a target diameter between about 20% and about 150% of a radius of the blind via cross section. A surface at the bottom of the opening, called a nullblind surface,null includes a metallic protrusion formed by the laser drilling, such that the metallic protrusion is integral with a portion of the blind surface. The metallic protrusion includes the metal of the metallic sheet and at least one constituent element from the dielectric layer. The metallic protrusion is then etched to form a metallic interlocking structure that is integral with the portion of the blind surface. The metallic interlocking structure includes discrete metallic fibers, with each metallic fiber having a curved (or curled) geometry. Each metallic fiber has its own unique composition that includes the metal, at least one constituent element of the dielectric layer, or both.

    Method for making a printed circuit board
    262.
    发明授权
    Method for making a printed circuit board 失效
    制造印刷电路板的方法

    公开(公告)号：US06378201B1

    公开(公告)日：2002-04-30

    申请号：US08497614

    申请日：1995-06-30

    Applicant: Yutaka Tsukada ,  Shuhei Tsuchida

    Inventor： Yutaka Tsukada ,  Shuhei Tsuchida

    IPC: H01K310

    CPC classification number: H05K3/4602 ,  H05K1/0265 ,  H05K3/0023 ,  H05K3/181 ,  H05K3/426 ,  H05K3/429 ,  H05K3/4661 ,  H05K2201/0352 ,  H05K2201/09327 ,  H05K2201/09509 ,  H05K2203/1438 ,  H05K2203/1581 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165

    Abstract: A multilayer printed circuit board and a corresponding fabrication method are disclosed, which circuit board achieves a relatively high degree of wiring density and a relatively high degree of wiring design freedom. These advantages are obtained in the inventive printed circuit board by electrically connecting power conductors or ground conductors using through holes. On the other hand, signal conductors in any two adjacent signal wiring layers are electrically connected using via holes extending only through an intervening electrically insulating layer. Preferably, the electrically insulating layer is a layer of photosensitive resin and the via holes are formed using conventional photolithographic techniques.

    Abstract translation: 公开了一种多层印刷电路板和相应的制造方法，该电路板实现相对高的布线密度和相对高的布线设计自由度。 通过使用通孔电连接电源导体或接地导体，在本发明的印刷电路板中获得这些优点。 另一方面，任何两个相邻信号布线层中的信号导体使用仅通过中间电绝缘层延伸的通孔电连接。 优选地，电绝缘层是感光树脂层，并且通孔使用常规的光刻技术形成。

    Printed wiring board and method of producing the same
    264.
    发明申请
    Printed wiring board and method of producing the same 失效
    印刷电路板及其制造方法

    公开(公告)号：US20020020555A1

    公开(公告)日：2002-02-21

    申请号：US09921202

    申请日：2001-08-01

    Applicant: International Business Machines Corporation

    Inventor： Yukiko Daido

    IPC: H05K001/11

    CPC classification number: H05K3/242 ,  H05K1/117 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/0919 ,  H05K2201/09509 ,  H05K2201/09781

    Abstract: A printed wiring board comprises an insulating layer having a plurality of recesses formed along a predetermined edge portion of the insulating layer to extend through a side surface of the insulating layer, tabs for establishing electrical connection with an external electronic apparatus and which are formed on a surface of the insulating layer along the predetermined edge portion in correspondence with the plurality of recesses, and extensions connected electrically to the respective tabs and extending into the respective recesses. The printed wiring board may further comprise a plurality of dummy pads which are buried under the insulating layer in correspondence with the tabs and the extensions and which are electrically insulated from each other. The extensions are joined to the dummy pads through the recesses. The resulting board comprises a structure in which tabs are not easily peeled from an insulating layer.

    Abstract translation: 印刷电路板包括绝缘层，绝缘层具有沿着绝缘层的预定边缘部分形成的多个凹槽，以延伸穿过绝缘层的侧表面，用于与外部电子设备建立电连接的接片，并形成在 所述绝缘层的表面沿着与所述多个凹部对应的所述预定边缘部分，以及延伸部，其电连接到相应的突片并延伸到相应的凹部中。 印刷电路板还可以包括多个虚拟焊盘，这些虚拟焊盘相对于突出部和延伸部被掩埋在绝缘层的下方并且彼此电绝缘。 延伸部分通过凹槽连接到虚拟焊盘。 所得到的板包括其中突片不容易从绝缘层剥离的结构。

    Mounting structure of semiconductor package
    265.
    发明申请
    Mounting structure of semiconductor package 审中-公开
    半导体封装的安装结构

    公开(公告)号：US20020014346A1

    公开(公告)日：2002-02-07

    申请号：US09872256

    申请日：2001-06-01

    Applicant: NEC Corporation

    Inventor： Kimio Tsunemasu ,  Yasunori Tanaka

    IPC: H02G003/08

    CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L2224/13 ,  H01L2924/00014 ,  H05K1/112 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09572 ,  Y02P70/613 ,  H01L2224/0401

    Abstract: A mounting structure of a semiconductor package can improve resistance against thermal and mechanical external force. The mounting structure of a semiconductor package establishes electrical connection of a pad on a printing circuit board to a connection wiring by soldering the semiconductor package. The pad may be integrally formed with a via. The soldering may be performed by penetrating a part of solder within the via so that the connection wiring is connected to the pad through the via at a layer different from a layer of the pad.

    Abstract translation: 半导体封装的安装结构可以提高对热和机械外力的抵抗力。 半导体封装的安装结构通过焊接半导体封装而将印刷电路板上的焊盘电连接到连接布线。 垫可以与通孔一体地形成。 可以通过穿过通孔内的焊料的一部分来进行焊接，使得连接布线通过​​通孔在不同于焊盘层的层处连接到焊盘。

    Method for producing copper-clad laminate
    266.
    发明申请
    Method for producing copper-clad laminate 失效
    覆铜层压板的制造方法

    公开(公告)号：US20020005249A1

    公开(公告)日：2002-01-17

    申请号：US09904386

    申请日：2001-07-12

    Inventor： Fujio Kuwako ,  Tomohiro Ishino

    IPC: B32B031/00

    CPC classification number: B32B15/08 ,  B32B15/20 ,  B32B37/0023 ,  B32B2311/12 ,  B32B2457/08 ,  H05K1/09 ,  H05K3/025 ,  H05K3/4602 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/0358 ,  H05K2201/09509 ,  Y10S428/914 ,  Y10T428/1438 ,  Y10T428/24843 ,  Y10T428/24917 ,  Y10T428/2804

    Abstract: An object of the invention is to prevent dent faults generated during bonding of an outer copper foil layer onto an inner layer substrate having a through hole or a cavity serving as an interlayer electrical connection means such as an interstitial via hole (IVH) or a blind via hole (BVH). In order to attain the object, there is provided a method for producing a copper-clad laminate employing the following copper foil serving as an outer layer: (1) a resin-coated copper foil being formed of copper foil having a thickness of 15 nullm or more and a rupture strength of 275 kN/m2 or more as measured through a bulge test performed after the foil is heated, wherein the resin-coated copper foil has a resin layer on one side of the copper foil; (2) a copper foil with etchable carrier, wherein the total thickness of the carrier layer and the copper foil layer is 20 nullm or more; or (3) a copper foil with peelable carrier, wherein the total thickness of the carrier layer and the copper foil layer is 20 nullm or more, the releasing layer formed between the carrier layer and the copper foil layer having a peel strength of 5 gf/cm to 300 gf/cm as measured after heating.

    Abstract translation: 本发明的目的是防止外部铜箔层在具有通孔或空洞的内层基板上产生的凹陷缺陷，所述内壁基板具有间隙通孔（IVH）或盲孔 通孔（BVH）。 为了实现该目的，提供了一种使用以下铜箔作为外层的覆铜层压板的制造方法：（1）由厚度为15μm的铜箔形成的树脂被覆铜箔 通过在箔加热后进行的隆起试验测定的破裂强度为275kN / m 2以上，其中，树脂被覆铜箔在铜箔的一侧具有树脂层; （2）具有可蚀刻载体的铜箔，其中载体层和铜箔层的总厚度为20μm以上; 或（3）具有可剥离载体的铜箔，其中载体层和铜箔层的总厚度为20μm以上，剥离强度为5gf的载体层与铜箔层之间形成的剥离层 / cm至300gf / cm。

    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device
    268.
    发明申请
    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device 失效
    多层布线基板，半导体装置及制造这种多层布线基板及半导体装置的方法

    公开(公告)号：US20010038145A1

    公开(公告)日：2001-11-08

    申请号：US09848799

    申请日：2001-05-04

    Inventor： Naohiro Mashino

    IPC: H01L023/10 ,  H01L023/34

    CPC classification number: H01L23/49822 ,  H01L23/642 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/053 ,  H05K1/056 ,  H05K1/141 ,  H05K1/162 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09809 ,  H05K2203/0315

    Abstract: A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser and the condenser electrode metal layer. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

    Abstract translation: 多层布线板包括：作为芯的金属基板，形成为覆盖金属层的电容器电介质层，以及形成为覆盖电容器电介质层的电容器电极金属层，由金属基板限定冷凝器， 冷凝器和电容器电极金属层。 电容电介质层设置有与金属基板连通的第一接触孔，并且电容器电极金属层设置有与第一接触孔连通的第二接触孔，第二接触孔的直径大于 第一接触孔。 绝缘层形成在电容器电极金属层上，并且设置有通孔，以通过第二和第一接触孔与金属基板连通。 金属基板接触金属层形成在通孔的内壁上，金属基板接触金属层与金属基板电接触。

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