公开(公告)号：US09502381B2

公开(公告)日：2016-11-22

申请号：US14817502

申请日：2015-08-04

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Jing-En Luan

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/92 ,  H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/29 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/49513 ,  H01L23/49575 ,  H01L23/49838 ,  H01L23/49861 ,  H01L24/05 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/94 ,  H01L24/96 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0569 ,  H01L2224/2741 ,  H01L2224/27416 ,  H01L2224/29082 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/85207 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/181 ,  H01L2224/27 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/43 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2224/85399

Abstract: Embodiments of the present disclosure provide a semiconductor device, a semiconductor package, and a method for manufacturing a semiconductor device. The semiconductor device comprises: a semiconductor die; an electrical isolation layer formed on a surface of the semiconductor die; a substrate; and a non-conductive adhesive layer disposed between the electrical isolation layer and the substrate, so as to adhere the electrical isolation layer to the substrate.

Abstract translation: 本公开的实施例提供半导体器件，半导体封装以及半导体器件的制造方法。 半导体器件包括：半导体管芯; 形成在所述半导体管芯的表面上的电隔离层; 底物; 以及设置在电绝缘层和基板之间的非导电粘合剂层，以将电隔离层粘附到基板。

公开(公告)号：US09466550B2

公开(公告)日：2016-10-11

申请号：US14741535

申请日：2015-06-17

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Jing-En Luan

IPC: H01L23/48 ,  H01L23/373 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/562 ,  H01L21/4846 ,  H01L21/4853 ,  H01L21/4871 ,  H01L21/4882 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L23/18 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3672 ,  H01L23/3675 ,  H01L23/373 ,  H01L23/3737 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16235 ,  H01L2224/18 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2924/3511

Abstract: An electronic device may include an integrated circuit (IC), electrically conductive connectors coupled to the IC, and a heat sink layer adjacent the IC and opposite the electrically conductive connectors. The electronic device may include an encapsulation material surrounding the IC and the electrically conductive connectors, a redistribution layer having electrically conductive traces coupled to the electrically conductive connectors, a stiffener between the heat sink layer and the redistribution layer, and a fan-out component between the heat sink layer and the redistribution layer and being in the encapsulation material.

Abstract translation: 电子设备可以包括集成电路（IC），耦合到IC的导电连接器以及与IC相邻并与导电连接器相对的散热层。 电子设备可以包括围绕IC和导电连接器的封装材料，具有耦合到导电连接器的导电迹线的再分布层，散热层和再分布层之间的加强件，以及在散热层之间的扇出部分， 散热层和再分配层，并且在封装材料中。

公开(公告)号：US09448198B2

公开(公告)日：2016-09-20

申请号：US13176599

申请日：2011-07-05

Applicant: Olivier Le Neel ,  Suman Cherian ,  Ravi Shankar

Inventor： Olivier Le Neel ,  Suman Cherian ,  Ravi Shankar

IPC: G01K1/00 ,  G01K13/00 ,  G01K17/00 ,  G01N25/00 ,  G01N27/327 ,  G01N33/49

CPC classification number: G01N27/3272 ,  G01N33/49

Abstract: Microsensors that include an integrated thermal energy source and an integrated temperature sensor are capable of providing localized heating and temperature control of individual sensing regions within the microsensor. Localized temperature control allows analyte detection to be carried out at the same temperatures or substantially the same temperatures at which the sensor is calibrated. By carrying out the sensing near the calibration temperature, more accurate results can be obtained. In addition, the temperature of the sensing region can be controlled so that chemical reactions involving the analyte in the sensing region occur near their peak reaction rate. Carrying out the sensing near the peak reaction rate improves the sensitivity of the sensor which is important as sensor dimensions decrease and the magnitude of the generated signals decreases.

Abstract translation: 包括集成热能源和集成温度传感器的微型传感器能够提供微传感器内各个感测区域的局部加热和温度控制。 局部温度控制允许分析物检测在相同的温度或基本相同的温度下进行，在此温度下传感器被校准。 通过在校准温度附近进行感测，可以获得更准确的结果。 此外，可以控制感测区域的温度，使得涉及感测区域中的分析物的化学反应在峰值反应速率附近发生。 在峰值反应速率附近进行感测提高了传感器的灵敏度，这在传感器尺寸减小并且产生的信号的幅度减小时是重要的。

公开(公告)号：US09430328B2

公开(公告)日：2016-08-30

申请号：US14597845

申请日：2015-01-15

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS PTE LTD

Inventor： Antonino Conte ,  Kailash Khairnar

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/52 ,  G06F11/08 ,  G11C13/00

CPC classification number: G06F11/1068 ,  G06F11/08 ,  G06F11/1048 ,  G11C13/0004 ,  G11C13/004 ,  G11C29/52 ,  G11C2013/0054

Abstract: A memory device may include memory cells. The method may include receiving a request of reading a selected data word associated with a selected code word stored with an error correction code, and reading a first code word representing a first version of the selected code word by comparing a state of each selected memory cell with a first reference. The method may include verifying the first code word, setting the selected code word according to the first code word in response to a positive verification, reading at least one second code word representing a second version of the selected code word, verifying the second code word, and setting the selected code word according to the second code word in response to a negative verification of the first code word and to a positive verification of the second code word.

Abstract translation: 存储器件可以包括存储器单元。 该方法可以包括：接收读取与通过纠错码存储的所选码字相关联的所选择的数据字的请求，以及通过比较所选择的存储单元的状态来读取表示所选码字的第一版本的第一码字 第一个参考。 该方法可以包括验证第一代码字，响应于正验证，根据第一代码字设置所选择的代码字，读取表示所选代码字的第二版本的至少一个第二代码字，验证第二代码字 并且响应于第一代码字的否定验证和第二代码字的肯定验证，根据第二代码字设置所选择的代码字。

公开(公告)号：US09318459B2

公开(公告)日：2016-04-19

申请号：US14548090

申请日：2014-11-19

Applicant: STMicroelectronics Pte Ltd

Inventor： How Yuan Hwang ,  Kah Wee Gan

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L23/538 ,  H01L23/48 ,  H01L23/31

CPC classification number: H01L24/14 ,  H01L21/4857 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3171 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/19 ,  H01L24/96 ,  H01L2224/023 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/13025 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: An integrated circuit package includes an integrated circuit die in a reconstituted substrate. The active side is processed then covered in molding compound while the inactive side is processed. The molding compound on the active side is then partially removed and solder balls are placed on the active side.

Abstract translation: 集成电路封装包括在复原衬底中的集成电路管芯。 然后将活性侧加工成模塑料，同时处理非活性侧。 然后部分地去除活性侧上的模塑料，并且在活性侧上放置焊球。

公开(公告)号：US09254596B2

公开(公告)日：2016-02-09

申请号：US13340319

申请日：2011-12-29

Applicant: Jerome Teysseyre ,  Glenn de los Reyes

Inventor： Jerome Teysseyre ,  Glenn de los Reyes

IPC: B29C45/24 ,  B29C45/17 ,  B29C45/27

CPC classification number: B29C45/17 ,  B29C45/1753 ,  B29C45/2701

Abstract: A top-gate molding system for encapsulating semiconductor devices includes a plurality of mold cavities formed between a middle plate and a bottom plate, and a runner system formed between an upper plate and the middle plate. The runner system includes a runner with a plurality of reservoirs along its length, with a gate extending from each of the reservoirs to one of the cavities. A particle trap is positioned on the bottom of the runner between a sprue and a first one of the reservoirs, to capture contaminating particles in a flow of molding compound before the particles enter any of the reservoirs. The particle trap can be, for example, a notch or a channel extending transversely across the bottom of the runner, or a dummy reservoir upstream of the first of the plurality of reservoirs.

Abstract translation: 用于封装半导体器件的顶栅模制系统包括形成在中间板和底板之间的多个模腔，以及形成在上板和中板之间的浇道系统。 流道系统包括沿着其长度具有多个储存器的流道，门从每个储存器延伸到其中一个空腔。 颗粒捕集器位于浇道和第一储存器之间的流道底部，以在颗粒进入任何储存器之前捕获模制化合物流中的污染颗粒。 颗粒捕获器可以是例如横向延伸穿过流道的底部的凹口或通道，或者在多个储存器中的第一个的上游的虚拟储存器。

公开(公告)号：US09244334B2

公开(公告)日：2016-01-26

申请号：US13853598

申请日：2013-03-29

Applicant: STMicroelectronics Pte Ltd.

Inventor： Hk Looi ,  Wee Chin Judy Lim ,  Cheng-Hai Cheh ,  Bs Aw ,  David Gani ,  Tin-Tun Maung ,  Choon Lee Lai

IPC: H04N5/225 ,  G03B3/10 ,  G02B7/09

CPC classification number: G03B3/10 ,  G02B7/08 ,  G02B7/09 ,  H02K41/031 ,  Y10T29/4913

Abstract: Described herein are various embodiments of contacts that include different portions angled with respect to one another and methods of manufacturing devices that include such contacts. In some embodiments, a module may include a first portion of a contact that is disposed within a housing and a second portion that is disposed outside of the housing, with the second portion angled with respect to the first portion. Manufacturing such devices may include depositing a conductive material to electrically connect the contact to a contact pad of a substrate. In some embodiments, a deposition process for depositing the conductive material may have a minimum dimension, which defines a minimum dimension of a conductive material once deposited. In some such embodiments, a distance between a terminal end of the contact pin and the contact pad may be greater than the minimum dimension of the deposition process.

Abstract translation: 这里描述的触点的各种实施例包括相对于彼此成角度的不同部分和制造包括这种触点的装置的方法。 在一些实施例中，模块可以包括设置在壳体内的接触件的第一部分和设置在壳体外部的第二部分，其中第二部分相对于第一部分成角度。 制造这样的器件可以包括沉积导电材料以将触点电连接到衬底的接触焊盘。 在一些实施例中，用于沉积导电材料的沉积工艺可以具有最小尺寸，其限定一旦沉积的导电材料的最小尺寸。 在一些这样的实施例中，接触针的末端与接触垫之间的距离可以大于沉积过程的最小尺寸。

公开(公告)号：US09159413B2

公开(公告)日：2015-10-13

申请号：US12981379

申请日：2010-12-29

Applicant: Olivier Le Neel ,  Jean Jimenez

Inventor： Olivier Le Neel ,  Jean Jimenez

IPC: G11C13/00 ,  G11C11/56 ,  G11C17/18 ,  H01L27/10 ,  H01L27/105 ,  H01L49/02 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C13/0069 ,  G11C11/5692 ,  G11C17/18 ,  G11C2013/008 ,  G11C2213/33 ,  H01L27/101 ,  H01L27/1052 ,  H01L27/2436 ,  H01L27/2463 ,  H01L27/2481 ,  H01L28/20 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/1286 ,  H01L45/14 ,  H01L45/148

Abstract: An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has an adjustable resistor and a heating element. A dielectric material separates the heating element from the adjustable resistor. The heating element alters the resistance of the resistor by applying heat thereto. The magnitude of the resistance of the adjustable resistor represents the value of data stored in the memory cell.

Abstract translation: 形成集成电路，其具有位于半导体衬底上方的电介质堆叠中的存储器单元的阵列。 每个存储单元具有可调电阻器和加热元件。 电介质材料将加热元件与可调电阻器分开。 加热元件通过向其施加热量来改变电阻器的电阻。 可调电阻器的电阻的大小表示存储在存储单元中的数据的值。

公开(公告)号：US09082681B2

公开(公告)日：2015-07-14

申请号：US13853886

申请日：2013-03-29

Applicant: STMicroelectronics Pte Ltd.

Inventor： Olivier Le Neel ,  Shian-Yeu Kam ,  Tien-Choy Loh ,  Ditto Adnan ,  Tze Wei Dennis Chew

IPC: H01L21/44 ,  H01L25/16 ,  H01L21/56 ,  H01L25/00 ,  G01N27/22

CPC classification number: H01L25/16 ,  B81C1/0023 ,  G01N27/223 ,  H01L21/56 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/00 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/854 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: A micro-sensor device that includes a passivation-protected ASIC module and a micro-sensor module bonded to a patterned cap provides protection for signal conditioning circuitry while allowing one or more sensing elements in the micro-sensor module to be exposed to an ambient environment. According to a method of fabricating the micro-sensor device, the patterned cap can be bonded to the micro-sensor module using a planarizing adhesive that is chemically compatible with the sensing elements. In one embodiment, the adhesive material is the same material used for the dielectric active elements, for example, a photo-sensitive polyimide film.

Abstract translation: 包括钝化保护ASIC模块和结合到图案化盖的微传感器模块的微传感器装置为信号调节电路提供保护，同时允许微传感器模块中的一个或多个感测元件暴露于周围环境 。 根据制造微传感器装置的方法，图案化盖可以使用与感测元件化学相容的平面化粘合剂结合到微传感器模块。 在一个实施例中，粘合剂材料是用于介电活性元件的材料，例如光敏聚酰亚胺膜。

公开(公告)号：US20150194303A1

公开(公告)日：2015-07-09

申请号：US14151188

申请日：2014-01-09

Applicant: STMICROELECTRONICS PTE LTD

Inventor： ChongJieh CHEW

IPC: H01L21/02 ,  H01L21/033

CPC classification number: H01L21/02252 ,  H01L21/02129 ,  H01L21/02274 ,  H01L21/02321 ,  H01L21/02334 ,  H01L21/0234 ,  H01L21/033 ,  H01L21/31144

Abstract: A method for making semiconductor devices may include forming a phosphosilicate glass (PSG) layer on a semiconductor wafer, with the PSG layer having a phosphine residual surface portion. The method may further include exposing the phosphine residual surface portion to a reactant plasma to integrate at least some of the phosphine residual surface portion into the PSG layer. The method may additionally include forming a mask layer on the PSG layer after the exposing.

Abstract translation: 制造半导体器件的方法可以包括在半导体晶片上形成磷硅玻璃（PSG）层，其中PSG层具有磷化氢残留表面部分。 该方法可以进一步包括将磷化氢残余表面部分暴露于反应物等离子体以将至少一些磷化氢残余表面部分整合到PSG层中。 该方法还可以包括在曝光之后在PSG层上形成掩模层。