公开(公告)号：US20140175671A1

公开(公告)日：2014-06-26

申请号：US13722189

申请日：2012-12-20

Applicant: INVENSAS CORPORATION

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Terrence Caskey ,  Reynaldo Co ,  Ellis Chau

IPC: H01L23/528 ,  H01L23/00 ,  H05K1/18

CPC classification number: H05K1/11 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/49811 ,  H01L23/528 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/10126 ,  H01L2224/11334 ,  H01L2224/1134 ,  H01L2224/1191 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13101 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14135 ,  H01L2224/16105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/32225 ,  H01L2224/45012 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45101 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45155 ,  H01L2224/45624 ,  H01L2224/45655 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H05K1/0298 ,  H05K1/181 ,  H05K1/185 ,  H05K2201/10515 ,  H05K2201/10977 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/014

Abstract: A structure may include bond elements having bases joined to conductive elements at a first portion of a first surface and end surfaces remote from the substrate. A dielectric encapsulation element may overlie and extend from the first portion and fill spaces between the bond elements to separate the bond elements from one another. The encapsulation element has a third surface facing away from the first surface. Unencapsulated portions of the bond elements are defined by at least portions of the end surfaces uncovered by the encapsulation element at the third surface. The encapsulation element at least partially defines a second portion of the first surface that is other than the first portion and has an area sized to accommodate an entire area of a microelectronic element. Some conductive elements are at the second portion and configured for connection with such microelectronic element.

Abstract translation: 结构可以包括在第一表面的第一部分和远离基底的端表面处具有连接到导电元件的基底的结合元件。 电介质封装元件可以从第一部分覆盖并延伸并填充接合元件之间的空间，以将接合元件彼此分开。 封装元件具有背离第一表面的第三表面。 粘合元件的未封装部分由在第三表面处被封装元件未覆盖的至少部分端面限定。 封装元件至少部分地限定除了第一部分之外的第一表面的第二部分，并且具有尺寸适于容纳微电子元件的整个区域的区域。 一些导电元件位于第二部分并被配置为与这种微电子元件连接。

公开(公告)号：US20140141597A1

公开(公告)日：2014-05-22

申请号：US14146080

申请日：2014-01-02

Applicant: INVENSAS CORPORATION

Inventor： Ilyas Mohammed

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L23/3107 ,  H01L23/562 ,  H01L23/585 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of making an edge-reinforced microelectronic element is disclosed. The steps include mechanically cutting along dicing lanes of a substrate at least partially through a thickness thereof to form a plurality of edge surfaces extending away from a front surface thereof and forming a continuous monolithic metallic edge-reinforcement ring that covers each of the plurality of edge surfaces and extends onto the front surface. The front surface may have a plurality of contacts thereat and the substrate may embody a plurality of microelectronic elements.

Abstract translation: 公开了制造边缘增强微电子元件的方法。 这些步骤包括至少部分地通过其厚度机械地切割衬底的切割通道，以形成远离其前表面延伸的多个边缘表面，并形成连续的整体金属边缘加强环，其覆盖多个边缘 表面并延伸到前表面。 前表面可以具有多个触点，并且衬底可以实现多个微电子元件。

公开(公告)号：US20140045285A1

公开(公告)日：2014-02-13

申请号：US14058141

申请日：2013-10-18

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Liang Wang ,  Steven D. Gottke

IPC: H01L33/60

CPC classification number: H01L33/60 ,  F21K9/23 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/156 ,  H01L33/62 ,  H01L2224/48463 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/19107 ,  H01L2933/0066

Abstract: In accordance with an embodiment of the present invention, an article of manufacture includes a side-emitting light emitting diode configured to emit light from more than two surfaces. The article of manufacture includes a first sheet electrically and thermally coupled to a first side of the light emitting diode, and a second sheet electrically and thermally coupled to a second side of the light emitting diode. The article of manufacture further includes a plurality of reflective surfaces configured to reflect light from all of the surfaces of the light emitting diode through holes in the first sheet. The light may be reflected via total internal reflection.

Abstract translation: 根据本发明的实施例，制品包括被配置为从多于两个表面发射光的侧面发光发光二极管。 该制品包括电和热耦合到发光二极管的第一侧的第一片，以及电耦合到发光二极管的第二侧的第二片。 制品还包括多个反射表面，其被配置为通过第一片材中的孔反射来自发光二极管的所有表面的光。 光可以通过全内反射来反射。

公开(公告)号：US20200212013A1

公开(公告)日：2020-07-02

申请号：US16814175

申请日：2020-03-10

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Javier A. Delacruz

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78

Abstract: A three-dimensional stacking technique performed in a wafer-to-wafer fashion reducing the machine movement in production. The wafers are processed with metallic traces and stacked before dicing into separate die stacks. The traces of each layer of the stacks are interconnected via electroless plating.

公开(公告)号：US10593651B2

公开(公告)日：2020-03-17

申请号：US16368219

申请日：2019-03-28

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Javier A. Delacruz

IPC: H01L21/50 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78

Abstract: A three-dimensional stacking technique performed in a wafer-to-wafer fashion reducing the machine movement in production. The Wafers are processed with metallic traces and stacked before dicing into separate die stacks. The traces of each layer of the stacks are interconnected via electroless plating.

公开(公告)号：US20190371765A1

公开(公告)日：2019-12-05

申请号：US16368219

申请日：2019-03-28

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Javier A. Delacruz

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78

Abstract: A three-dimensional stacking technique performed in a wafer-to-wafer fashion reducing the machine movement in production. The Wafers are processed with metallic traces and stacked before dicing into separate die stacks. The traces of each layer of the stacks are interconnected via electroless plating.

公开(公告)号：US20190341361A1

公开(公告)日：2019-11-07

申请号：US16514104

申请日：2019-07-17

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/683 ,  H01L23/544 ,  H01L25/00 ,  H01L33/00 ,  H01L27/02

Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

公开(公告)号：US20180130757A1

公开(公告)日：2018-05-10

申请号：US15346397

申请日：2016-11-08

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Ilyas Mohammed

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H05K1/02

CPC classification number: H01L23/562 ,  H01L21/4857 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/4985 ,  H01L23/5387 ,  H01L25/065

Abstract: A foldable microelectronic assembly and a method for forming the same are provided. One or more packages comprising encapsulated microelectronic elements are formed, along with a compliant layer. The packages and the compliant layer are coupled to a redistribution layer. The compliant layer and the redistribution layer are bent such that the redistribution layer is non-planar.

公开(公告)号：US09947643B2

公开(公告)日：2018-04-17

申请号：US15075899

申请日：2016-03-21

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Masud Beroz ,  Liang Wang

IPC: H01L33/62 ,  H01L25/16 ,  H01L33/06 ,  H01L33/22 ,  H01L33/32 ,  H01L33/60 ,  H01L33/00 ,  H01L33/58

CPC classification number: H01L25/167 ,  H01L33/0079 ,  H01L33/06 ,  H01L33/22 ,  H01L33/32 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.

公开(公告)号：US09615451B2

公开(公告)日：2017-04-04

申请号：US14887674

申请日：2015-10-20

Applicant: Invensas Corporation

Inventor： Rajesh Katkar ,  Cyprian Emeka Uzoh ,  Belgacem Haba ,  Ilyas Mohammed

IPC: H05K1/09 ,  H05K1/00 ,  H05K1/16 ,  H05K1/11 ,  H05K7/10 ,  H05K1/03 ,  H01L23/498 ,  H01L21/48 ,  H01L23/13 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K1/0306 ,  H01L21/481 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3731 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/5381 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/17 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16113 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H05K1/09 ,  H05K1/112 ,  H05K1/115 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/09545 ,  H05K2201/10378 ,  H05K2203/0323

Abstract: Interposers and methods of making the same are disclosed herein. In one embodiment, an interposer includes a region having first and second oppositely facing surfaces and a plurality of pores, each pore extending in a first direction from the first surface towards the second surface, wherein alumina extends along a wall of each pore; a plurality of electrically conductive connection elements extending in the first direction, consisting essentially of aluminum and being electrically isolated from one another by at least the alumina; a first conductive path provided at the first surface for connection with a first component external to the interposer; and a second conductive path provided at the second surface for connection with a second component external to the interposer, wherein the first and second conductive paths are electrically connected through at least some of the connection elements.