公开(公告)号：US07761982B2

公开(公告)日：2010-07-27

申请号：US11612419

申请日：2006-12-18

申请人： Kenji Nagase ,  Kenichi Kawabata

发明人： Kenji Nagase ,  Kenichi Kawabata

IPC分类号： H05K3/30 ,  H01L23/48

CPC分类号： H01L25/16 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24226 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/30107 ,  H05K1/185 ,  H05K3/0044 ,  H05K3/4652 ,  H05K2201/0209 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/10674 ,  H05K2203/025 ,  H05K2203/0554 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49139 ,  Y10T29/49151 ,  Y10T29/49155

摘要： A method for manufacturing an IC-embedded substrate comprises a first step for encapsulating at least an IC chip having a pad electrode in an insulating layer, a second step for forming a metal layer having at least a first aperture in a location directly above the pad electrode of the IC chip and a second aperture in a location above an area other than the area in which the IC chip is mounted, and a third step for selectively removing the insulating layer by a blasting treatment in which the metal layer is used as a mask, whereby forming a first via hole that corresponds to the first aperture and a second via hole that corresponds to the second aperture.

摘要翻译： 一种用于制造嵌入IC的衬底的方法包括：第一步骤，用于将至少具有焊盘电极的IC芯片封装在绝缘层中;第二步骤，用于形成金属层，所述金属层至少具有位于衬垫上方的位置的第一孔 IC芯片的电极和除了安装IC芯片的区域之外的区域上方的位置的第二孔，以及第三步骤，通过其中使用金属层的喷砂处理来选择性地去除绝缘层， 从而形成对应于第一孔的第一通孔和对应于第二孔的第二通孔。

公开(公告)号：US20090218678A1

公开(公告)日：2009-09-03

申请号：US12435385

申请日：2009-05-04

申请人： Kenichi Kawabata ,  Takaaki Morita

发明人： Kenichi Kawabata ,  Takaaki Morita

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/544 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2221/68368 ,  H01L2223/54473 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13171 ,  H01L2224/24225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83132 ,  H01L2224/83136 ,  H01L2224/92244 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/185 ,  H05K3/4652 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/1469 ,  H05K2203/166 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor IC-embedded substrate suitable for embedding a semiconductor IC in which the electrode pitch is extremely narrow. The substrate comprises a semiconductor IC 120 in which stud bumps 121 are provided to the principal surface 120a, a first resin layer 111 for covering the principal surface 120a of the semiconductor IC 120, and a second resin layer 112 for covering the back surface 120b of the semiconductor IC 120. The stud bumps 121 of the semiconductor IC 120 protrude from the surface of the first resin layer 111. The method for causing the stud bumps 121 to protrude from the surface of the first resin layer 111 may involve using a wet blasting method to cause an overall reduction of the thickness of the first resin layer 111. The stud bumps 121 can thereby be properly uncovered even when the electrode pitch of the semiconductor IC 120 is narrow.

摘要翻译： 适用于嵌入电极间距极窄的半导体IC的半导体IC嵌入式基板。 基板包括半导体IC 120，其中将柱状凸块121设置在主表面120a上，第一树脂层111用于覆盖半导体IC 120的主表面120a，第二树脂层112用于覆盖半导体IC 120的背面120b 半导体IC 120的柱状突起121从第一树脂层111的表面突出。使柱状突起121从第一树脂层111的表面突出的方法可以涉及使用湿式喷砂 导致第一树脂层111的厚度的总体减小的方法。即使当半导体IC 120的电极间距窄时，也可以适当地覆盖柱形突起121。

公开(公告)号：US20090025961A1

公开(公告)日：2009-01-29

申请号：US12219354

申请日：2008-07-21

申请人： Yoshikazu Kanemaru ,  Hiroshige Ohkawa ,  Kenichi Kawabata

发明人： Yoshikazu Kanemaru ,  Hiroshige Ohkawa ,  Kenichi Kawabata

IPC分类号： H05K1/00 ,  H05K3/10

CPC分类号： H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/04105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01047 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3511 ,  H05K3/0052 ,  H05K3/4644 ,  H05K2201/10204 ,  H05K2201/10636 ,  H05K2201/10674 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2224/82 ,  H01L2924/00

摘要： A method of manufacturing an electronic component-embedded board is provided which is capable of suppressing warpage without requiring complicated processes at low cost and which offers high productivity and economic efficiency. A worksheet 100 includes insulating layers 21 and 31 on one surface of an approximately rectangular substrate 11, and electronic components 41 and chip-like dummy parts 51 primarily made from the same material as the primary material of the electronic component 41 are embedded into the insulating layer 21. Chip-like dummy parts 51 are disposed in an unmounted portion of the electronic components 41 in, for example, a frame-like arrangement so as to surround the plurality of electronic components (groups) 41.

摘要翻译： 提供一种电子部件嵌入式基板的制造方法，其能够抑制翘曲而不需要以低成本进行复杂的加工，并且提供高生产率和经济效率。 工作片100在大致矩形的基板11的一个表面上包括绝缘层21和31，并且主要由与电子部件41的主要材料相同的材料制成的电子部件41和芯片状的虚拟部分51嵌入绝缘层 芯片状虚拟部件51以例如框状的方式设置在电子部件41的未安装部分中，以围绕多个电子部件（组）41。

公开(公告)号：US20090015621A1

公开(公告)日：2009-01-15

申请号：US12164377

申请日：2008-06-30

申请人： Tetsuro Hirota ,  Takumi Hagiwara ,  Kenichi Kawabata ,  Mamoru Yorimoto ,  Tetsu Morino ,  Noboru Sawayama

发明人： Tetsuro Hirota ,  Takumi Hagiwara ,  Kenichi Kawabata ,  Mamoru Yorimoto ,  Tetsu Morino ,  Noboru Sawayama

IPC分类号： B41J29/393

CPC分类号： B41J29/393 ,  B41J2/2142 ,  B41J19/207 ,  B41J29/38

摘要： An image forming apparatus includes a recording head, a water-repellent transfer belt, a pattern formation controller, a read unit, and a detection unit. The recording head has a plurality of nozzles aligned in a given direction, and ejects droplets of a liquid therefrom. The pattern formation controller directs each of the plurality of nozzles to eject the liquid to form a detection pattern on the transfer belt. The detection pattern has multiple droplets ejected from each of the plurality of nozzles sequentially arranged and spaced apart from each other both in the given direction and in a direction orthogonal to the given direction. The read unit includes a light emitting element and a light receiving element, and reads the detection pattern to output a read result. The detection unit detects a defective nozzle according to the read result.

摘要翻译： 图像形成装置包括记录头，防水转印带，图案形成控制器，读取单元和检测单元。 记录头具有沿给定方向排列的多个喷嘴，并从其喷出液滴。 图案形成控制器引导多个喷嘴中的每一个喷射液体以在转印带上形成检测图案。 检测图案具有从给定方向和与给定方向正交的方向上顺序排列和间隔开的多个喷嘴中的每一个排出的多个液滴。 读取单元包括发光元件和光接收元件，并且读取检测图案以输出读取结果。 检测单元根据读取结果来检测有缺陷的喷嘴。

公开(公告)号：US20090010852A1

公开(公告)日：2009-01-08

申请号：US12163244

申请日：2008-06-27

申请人： Rei ASAMI ,  Kenichi Kawabata

发明人： Rei ASAMI ,  Kenichi Kawabata

IPC分类号： A61B8/00

CPC分类号： A61K47/488 ,  A61K47/6907 ,  A61K49/223

摘要： Provided are a preparation process of a diagnostic or therapeutic agent having a step of adding, to a first fine emulsion having a particle size of 0.5 μm or less prepared by applying a predetermined pressure to a first mixture containing a first hydrophobic compound, an emulsifying agent, and an aqueous phase, a second hydrophobic compound compatible with the first hydrophobic compound, thereby preparing a second mixture; and a step of stirring and shaking the second mixture in a hermetically sealed state, thereby embedding the second hydrophobic compound in the first fine emulsion to prepare a second fine emulsion having a particle size of 0.5 μm or less; a diagnostic or therapeutic agent prepared by the process; and an apparatus for carrying out the process.

摘要翻译： 提供了一种诊断或治疗剂的制备方法，其具有以下步骤：向通过对包含第一疏水性化合物的第一混合物施加预定压力制备的粒径为0.5μm或更小的第一微乳液，乳化剂 和水相，与第一疏水性化合物相容的第二疏水性化合物，从而制备第二混合物; 以及密闭状态下搅拌和摇动第二混合物的步骤，从而将第二疏水性化合物包埋在第一微细乳液中以制备粒径为0.5μm以下的第二细乳液; 通过该方法制备的诊断或治疗剂; 以及用于执行该过程的装置。

公开(公告)号：US20080208054A1

公开(公告)日：2008-08-28

申请号：US11947020

申请日：2007-11-29

申请人： Takashi Azuma ,  Kenichi Kawabata

发明人： Takashi Azuma ,  Kenichi Kawabata

IPC分类号： A61B8/13

CPC分类号： A61B8/463 ,  A61B8/481 ,  G01S7/52022 ,  G01S7/52038 ,  G01S15/102 ,  G01S15/895 ,  G01S15/8977

摘要： An ultrasonic imaging apparatus, detecting a signal peculiar to a contrast agent emitted when liquid formed in a fine particle vaporizes due to ultrasonic waves and imaging space distribution thereof. A narrow band is used for transmission, a broad band is used for a received signal, and in a state of high space resolution of the received signal, a transmission signal and the received signal are discriminated.

摘要翻译： 一种超声波成像装置，用于检测由于超微波而产生的微粒子中形成的液体发生的造影剂特有的信号及其成像空间分布。 窄带用于传输，宽频带用于接收信号，并且在接收信号的高空间分辨率的状态下，识别发射信号和接收信号。

公开(公告)号：US20070069363A1

公开(公告)日：2007-03-29

申请号：US11527829

申请日：2006-09-27

申请人： Kenichi Kawabata ,  Takaaki Morita

发明人： Kenichi Kawabata ,  Takaaki Morita

IPC分类号： H01L23/04

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/544 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2221/68368 ,  H01L2223/54473 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13171 ,  H01L2224/24225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/83132 ,  H01L2224/83136 ,  H01L2224/92244 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/185 ,  H05K3/4652 ,  H05K2201/09518 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09781 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/1469 ,  H05K2203/166 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： A semiconductor IC-embedded substrate suitable for embedding a semiconductor IC in which the electrode pitch is extremely narrow. The substrate comprises a semiconductor IC 120 in which stud bumps 121 are provided to the principal surface 120a, a first resin layer 111 for covering the principal surface 120a of the semiconductor IC 120, and a second resin layer 112 for covering the back surface 120b of the semiconductor IC 120. The stud bumps 121 of the semiconductor IC 120 protrude from the surface of the first resin layer 111. The method for causing the stud bumps 121 to protrude from the surface of the first resin layer 111 may involve using a wet blasting method to cause an overall reduction of the thickness of the first resin layer 111. The stud bumps 121 can thereby be properly uncovered even when the electrode pitch of the semiconductor IC 120 is narrow.

摘要翻译： 适用于嵌入电极间距极窄的半导体IC的半导体IC嵌入式基板。 基板包括：半导体IC 120，其中将柱状凸块121设置在主表面120a上;第一树脂层111，用于覆盖半导体IC 120的主表面120a;以及第二树脂层112，用于覆盖背面 120b的半导体IC 120.半导体IC 120的柱状突起121从第一树脂层111的表面突出。使柱状凸块121从第一树脂层111的表面突出的方法可以包括使用 即使在半导体IC 120的电极间距窄的情况下也可以适当地覆盖柱状突起121。

公开(公告)号：US20070057366A1

公开(公告)日：2007-03-15

申请号：US11521156

申请日：2006-09-14

申请人： Masashi Katsumata ,  Kenichi Kawabata ,  Toshikazu Endo

发明人： Masashi Katsumata ,  Kenichi Kawabata ,  Toshikazu Endo

IPC分类号： H01L23/34

CPC分类号： H01L25/18 ,  H01L23/5386 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/0655 ,  H01L2224/24137 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0216 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0298 ,  H05K1/0373 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/0715 ,  H05K2201/086 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09618 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10674

摘要： A semiconductor IC-embedded module 100 comprises a multilayer substrate 101 having first and second insulating layers 101a and 101b, and a controller IC 012 and memory IC 103 that are embedded in the multilayer substrate 101. A wiring layer 104 is formed as an internal layer in the multilayer substrate 101. Part of the wiring layer 104 constitutes a bus line 104X. The controller IC 102 or memory IC 103 is embedded in the second insulating layer 101b. First and second ground layers 105a and 105b are provided respectively in the first and second insulating layers 101a and 101b. The effect of noise generated by bus lines is reduced, and an additional reduction in noise and a decrease in size and thickness are achieved by laying out bus lines that connect the semiconductor ICs so that distances are minimized.

摘要翻译： 半导体IC嵌入式模块100包括具有嵌入在多层基板101中的第一绝缘层101a和第二绝缘层101b以及控制器IC 012和存储器IC 103的多层基板101。 在多层基板101中形成布线层104作为内层。 布线层104的一部分构成总线104 X.控制器IC 102或存储器IC 103嵌入第二绝缘层101b中。 第一和第二接地层105a和105b分别设置在第一和第二绝缘层101a和101b中。 由总线产生的噪声的影响减小，通过布置连接半导体IC的总线，使距离最小化，可以实现额外的噪声降低和尺寸和厚度的减小。

公开(公告)号：US20060273451A1

公开(公告)日：2006-12-07

申请号：US11445082

申请日：2006-05-31

申请人： Kenichi Kawabata ,  Hisayuki Abe

发明人： Kenichi Kawabata ,  Hisayuki Abe

IPC分类号： H01L23/34

CPC分类号： H01L31/02002 ,  H01L23/3114 ,  H01L23/4334 ,  H01L24/19 ,  H01L24/82 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/04105 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13171 ,  H01L2224/16 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/214

摘要： A semiconductor IC includes a semiconductor IC main body having a predetermined circuit formed on a main surface, a metal layer selectively provided on substantially the whole back surface of the semiconductor IC main body excluding the periphery. According to the present invention, the metal layer provided on the semiconductor IC main body can dissipate heat at a high level. Because the metal layer is selectively provided, even when the semiconductor IC main body is thinned by polishing, warpage does not occur easily in a wafer state. The metal layer is selectively provided at the center of the back surface of the semiconductor IC. Therefore, a laminate of a semiconductor wafer and a thick metal does not need to be diced. As a result, chipping on the disconnected surface can be prevented effectively.

摘要翻译： 半导体IC包括：半导体IC主体，其具有形成在主表面上的预定电路;金属层，选择性地设置在除了周边以外的半导体IC主体的大致整个背面上。 根据本发明，设置在半导体IC主体上的金属层可以以高水平散发热量。 由于选择性地设置金属层，所以即使通过研磨使半导体IC主体变薄，在晶片状态下也不容易发生翘曲。 金属层选择性地设置在半导体IC的背面的中心。 因此，不需要切割半导体晶片和厚金属的叠层体。 结果，可以有效地防止断开的表面上的碎裂。

公开(公告)号：US20050130447A1

公开(公告)日：2005-06-16

申请号：US11045286

申请日：2005-01-31

申请人： Minoru Takaya ,  Hisashi Kobuke ,  Toshikazu Endo ,  Seiji Takahara ,  Toshiyuki Abe ,  Hiroshige Ohkawa ,  Masami Sasaki ,  Kenichi Kawabata

发明人： Minoru Takaya ,  Hisashi Kobuke ,  Toshikazu Endo ,  Seiji Takahara ,  Toshiyuki Abe ,  Hiroshige Ohkawa ,  Masami Sasaki ,  Kenichi Kawabata

IPC分类号： H01B3/44 ,  H01P1/203 ,  H01P1/205 ,  H01P5/10 ,  H01P5/18 ,  H01P7/04 ,  H01P7/08 ,  H01Q1/38 ,  H05K1/02 ,  H05K1/03 ,  H05K1/16 ,  H05K9/00 ,  H01L21/20 ,  C08J3/00 ,  C08K3/34 ,  C08L1/00 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01P5/185 ,  H01B3/442 ,  H01P1/203 ,  H01P1/20345 ,  H01P1/2056 ,  H01P5/10 ,  H01P5/187 ,  H01P7/04 ,  H01P7/082 ,  H01P7/084 ,  H01Q1/38 ,  H05K1/024 ,  H05K1/0326 ,  H05K1/0373 ,  H05K1/162 ,  H05K1/165 ,  H05K9/0075 ,  H05K2201/012 ,  H05K2201/0209 ,  H05K2201/086 ,  Y10T428/31692 ,  Y10T428/31855

摘要： A composite dielectric material comprising a resin resulting from a polyvinylbenzyl ether compound and a dielectric ceramic powder dispersed therein is useful in the high-frequency region. A composite magnetic material comprising a polyvinylbenzyl ether compound and a magnetic powder is also provided as well as a flame retardant material comprising a polyvinylbenzyl ether compound and a flame retardant. These materials may be used in the fabrication of substrates, prepreg sheets, coated metal foils, molded items, and metal foil-clad substrates.

摘要翻译： 包含由聚乙烯基苄基醚化合物和分散在其中的介电陶瓷粉末产生的树脂的复合电介质材料可用于高频区域。 还提供了包含聚乙烯基苄基醚化合物和磁性粉末的复合磁性材料以及包含聚乙烯基苄基醚化合物和阻燃剂的阻燃材料。 这些材料可用于制造基材，预浸薄片，涂覆金属箔，模塑制品和覆盖金属箔的基板。