-
公开(公告)号：US08922006B2
公开(公告)日：2014-12-30
申请号：US13559840
申请日：2012-07-27
申请人： Yen-Liang Lin , Chen-Shien Chen , Tin-Hao Kuo , Sheng-Yu Wu , Tsung-Shu Lin , Chang-Chia Huang
发明人： Yen-Liang Lin , Chen-Shien Chen , Tin-Hao Kuo , Sheng-Yu Wu , Tsung-Shu Lin , Chang-Chia Huang
IPC分类号： H01L23/488
CPC分类号： H01L23/3192 , H01L23/293 , H01L23/49811 , H01L24/05 , H01L24/13 , H01L24/16 , H01L2224/0401 , H01L2224/05005 , H01L2224/05015 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05166 , H01L2224/05541 , H01L2224/05555 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/13012 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2924/00014 , H01L2924/01029 , H01L2924/00012 , H01L2924/206 , H01L2924/01047
摘要： A device includes a substrate, a metal pad over the substrate, and a passivation layer covering edge portions of the metal pad. The passivation layer has a first opening overlapping the metal pad, wherein the first opening has a first lateral dimension measured in a direction parallel to a major surface of the substrate. A polymer layer is over the passivation layer and covering the edge portions of the metal pad. The polymer layer has a second opening overlapping the metal pad. The second opening has a second lateral dimension measured in the direction. The first lateral dimension is greater than the second lateral dimension by more than about 7 μm. A Under-Bump metallurgy (UBM) includes a first portion in the second opening, and a second portion overlying portions of the polymer layer.
摘要翻译： 一种器件包括衬底，衬底上的金属焊盘以及覆盖金属焊盘的边缘部分的钝化层。 钝化层具有与金属焊盘重叠的第一开口，其中第一开口具有在平行于衬底的主表面的方向上测量的第一横向尺寸。 聚合物层在钝化层上方并覆盖金属焊盘的边缘部分。 聚合物层具有与金属垫重叠的第二开口。 第二开口具有在该方向上测量的第二横向尺寸。 第一横向尺寸大于第二横向尺寸大于约7μm。 下冲击冶金（UBM）包括第二开口中的第一部分和覆盖聚合物层部分的第二部分。
-
公开(公告)号：US09053989B2
公开(公告)日：2015-06-09
申请号：US13228094
申请日：2011-09-08
申请人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
发明人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
CPC分类号： H01L24/13 , H01L24/11 , H01L24/14 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05026 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/13005 , H01L2224/13013 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/1312 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/141 , H01L2224/14135 , H01L2224/16059 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01073 , H01L2924/01049 , H01L2924/0105 , H01L2924/0103 , H01L2924/01025 , H01L2924/01024 , H01L2924/01022 , H01L2924/01032 , H01L2924/01038 , H01L2924/01078 , H01L2924/0104 , H01L2924/206 , H01L2924/01082 , H01L2924/01046 , H01L2924/01079 , H01L2924/01047 , H01L2924/01083 , H01L2924/01051 , H01L2224/13012 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A device includes a chip attached to a substrate. The chip includes a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar. The substrate includes a conductive trace and a mask layer overlying the conductive trace, wherein the mask layer has an opening exposing a portion of the conductive trace. An interconnection is formed between the conductive pillar and the exposed portion of the conductive trace. The opening has a first dimension (d1) measured along the long axis of the conductive pillar and a second dimension (d2) measured along the short axis of the conductive pillar. A ratio of L to d1 is greater than a ratio of W to d2.
摘要翻译： 一种器件包括附接到衬底的芯片。 该芯片包括具有沿着导电柱的长轴测量的长度（L）和沿导电柱的短轴测量的宽度（W）的导电柱。 衬底包括覆盖导电迹线的导电迹线和掩模层，其中掩模层具有暴露导电迹线的一部分的开口。 在导电柱和导电迹线的暴露部分之间形成互连。 开口具有沿着导电柱的长轴测量的第一尺寸（d1）和沿着导电柱的短轴测量的第二尺寸（d2）。 L与d1的比值大于W与d2的比。
-
公开(公告)号：US20130062755A1
公开(公告)日：2013-03-14
申请号：US13228094
申请日：2011-09-08
申请人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
发明人： Chen-Cheng Kuo , Chita Chuang , Tsung-Shu Lin , Chen-Shien Chen
IPC分类号： H01L23/485
CPC分类号： H01L24/13 , H01L24/11 , H01L24/14 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05026 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05572 , H01L2224/05611 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05671 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/13005 , H01L2224/13013 , H01L2224/1308 , H01L2224/13082 , H01L2224/13083 , H01L2224/13109 , H01L2224/13111 , H01L2224/1312 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13169 , H01L2224/141 , H01L2224/14135 , H01L2224/16059 , H01L2224/16145 , H01L2224/16225 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/01012 , H01L2924/01029 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01073 , H01L2924/01049 , H01L2924/0105 , H01L2924/0103 , H01L2924/01025 , H01L2924/01024 , H01L2924/01022 , H01L2924/01032 , H01L2924/01038 , H01L2924/01078 , H01L2924/0104 , H01L2924/206 , H01L2924/01082 , H01L2924/01046 , H01L2924/01079 , H01L2924/01047 , H01L2924/01083 , H01L2924/01051 , H01L2224/13012 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A device includes a chip attached to a substrate. The chip includes a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar. The substrate includes a conductive trace and a mask layer overlying the conductive trace, wherein the mask layer has an opening exposing a portion of the conductive trace. An interconnection is formed between the conductive pillar and the exposed portion of the conductive trace. The opening has a first dimension (d1) measured along the long axis of the conductive pillar and a second dimension (d2) measured along the short axis of the conductive pillar. A ratio of L to d1 is greater than a ratio of W to d2.
摘要翻译： 一种器件包括附接到衬底的芯片。 该芯片包括具有沿着导电柱的长轴测量的长度（L）和沿导电柱的短轴测量的宽度（W）的导电柱。 衬底包括覆盖导电迹线的导电迹线和掩模层，其中掩模层具有暴露导电迹线的一部分的开口。 在导电柱和导电迹线的暴露部分之间形成互连。 开口具有沿着导电柱的长轴测量的第一尺寸（d1）和沿着导电柱的短轴测量的第二尺寸（d2）。 L与d1的比值大于W与d2的比。
-
公开(公告)号：US20120012997A1
公开(公告)日：2012-01-19
申请号：US12835189
申请日：2010-07-13
申请人： Wen-Wei Shen , Yao-Chun Chuang , Chen-Shien Chen , Ming-Fa Chen
发明人： Wen-Wei Shen , Yao-Chun Chuang , Chen-Shien Chen , Ming-Fa Chen
CPC分类号： H01L24/13 , H01L23/3114 , H01L23/3192 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/023 , H01L2224/0239 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05073 , H01L2224/05083 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05166 , H01L2224/05184 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/10126 , H01L2224/10156 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11474 , H01L2224/11849 , H01L2224/11903 , H01L2224/1308 , H01L2224/13099 , H01L2224/13111 , H01L2224/13116 , H01L2224/13564 , H01L2224/13566 , H01L2224/1357 , H01L2224/13582 , H01L2224/13583 , H01L2224/13639 , H01L2224/13644 , H01L2224/13647 , H01L2224/13669 , H01L2224/13684 , H01L2224/16148 , H01L2224/81193 , H01L2224/81898 , H01L2225/06513 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15788 , H01L2924/01007 , H01L2224/13655 , H01L2224/13664 , H01L2924/00
摘要： A bump structure that may be used to interconnect one substrate to another substrate is provided. A recessed conductive pillar is formed on a first substrate such that the recessed conductive pillar has a recess formed therein. The recess may be filled with a solder material. A conductive pillar on a second substrate may be formed having a contact surface with a width less than or equal to a width of the recess. The first substrate may be attached to the second substrate such that the conductive pillar on the second substrate is positioned over or in the recess of the first substrate. The substrates may each be an integrated circuit die, an interposer, a printed circuit board, a high-density interconnect, or the like.
摘要翻译： 提供了可用于将一个衬底互连到另一衬底的凸块结构。 凹陷的导电柱形成在第一基板上，使得凹入的导电柱具有形成在其中的凹部。 凹部可以填充有焊料材料。 第二基板上的导电柱可以形成为具有宽度小于或等于凹部宽度的接触表面。 第一衬底可以附接到第二衬底，使得第二衬底上的导电柱位于第一衬底的凹部中或其中。 基板可以各自为集成电路管芯，插入件，印刷电路板，高密度互连等。
-
公开(公告)号：US08241963B2
公开(公告)日：2012-08-14
申请号：US12835189
申请日：2010-07-13
申请人： Wen-Wei Shen , Yao-Chun Chuang , Chen-Shien Chen , Ming-Fa Chen
发明人： Wen-Wei Shen , Yao-Chun Chuang , Chen-Shien Chen , Ming-Fa Chen
IPC分类号： H01L21/00
CPC分类号： H01L24/13 , H01L23/3114 , H01L23/3192 , H01L23/49816 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L24/81 , H01L2224/023 , H01L2224/0239 , H01L2224/0345 , H01L2224/03462 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05073 , H01L2224/05083 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05166 , H01L2224/05184 , H01L2224/05582 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/10126 , H01L2224/10156 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11474 , H01L2224/11849 , H01L2224/11903 , H01L2224/1308 , H01L2224/13099 , H01L2224/13111 , H01L2224/13116 , H01L2224/13564 , H01L2224/13566 , H01L2224/1357 , H01L2224/13582 , H01L2224/13583 , H01L2224/13639 , H01L2224/13644 , H01L2224/13647 , H01L2224/13669 , H01L2224/13684 , H01L2224/16148 , H01L2224/81193 , H01L2224/81898 , H01L2225/06513 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15788 , H01L2924/01007 , H01L2224/13655 , H01L2224/13664 , H01L2924/00
摘要： A bump structure that may be used to interconnect one substrate to another substrate is provided. A recessed conductive pillar is formed on a first substrate such that the recessed conductive pillar has a recess formed therein. The recess may be filled with a solder material. A conductive pillar on a second substrate may be formed having a contact surface with a width less than or equal to a width of the recess. The first substrate may be attached to the second substrate such that the conductive pillar on the second substrate is positioned over or in the recess of the first substrate. The substrates may each be an integrated circuit die, an interposer, a printed circuit board, a high-density interconnect, or the like.
摘要翻译： 提供了可用于将一个衬底互连到另一衬底的凸块结构。 凹陷的导电柱形成在第一基板上，使得凹入的导电柱具有形成在其中的凹部。 凹部可以填充有焊料材料。 第二基板上的导电柱可以形成为具有宽度小于或等于凹部宽度的接触表面。 第一衬底可以附接到第二衬底，使得第二衬底上的导电柱位于第一衬底的凹部中或其中。 基板可以各自为集成电路管芯，插入件，印刷电路板，高密度互连等。
-
公开(公告)号：US20130270699A1
公开(公告)日：2013-10-17
申请号：US13449078
申请日：2012-04-17
申请人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
发明人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
IPC分类号： H01L23/498
CPC分类号： H01L24/13 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L2224/0361 , H01L2224/03912 , H01L2224/11462 , H01L2224/11464 , H01L2224/11472 , H01L2224/11474 , H01L2224/11903 , H01L2224/13012 , H01L2224/13014 , H01L2224/13017 , H01L2224/13025 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16238 , H01L2224/81191 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/3512 , H01L2924/35121 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A pillar structure for a substrate is provided. The pillar structure may have one or more tiers, where each tier may have a conical shape or a spherical shape. In an embodiment, the pillar structure is used in a bump-on-trace (BOT) configuration. The pillar structures may have circular shape or an elongated shape in a plan view. The substrate may be coupled to another substrate. In an embodiment, the another substrate may have raised conductive traces onto which the pillar structure may be coupled.
摘要翻译： 提供了一种用于衬底的柱结构。 支柱结构可以具有一个或多个层，其中每个层可以具有圆锥形或球形。 在一个实施例中，柱结构用于跟踪跟踪（BOT）配置。 支柱结构在平面图中可以具有圆形或细长形状。 衬底可以耦合到另一衬底。 在一个实施例中，另一衬底可以具有凸起的导电迹线，柱结构可以联接到该导电迹线上。
-
公开(公告)号：US09425136B2
公开(公告)日：2016-08-23
申请号：US13449078
申请日：2012-04-17
申请人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
发明人： Tin-Hao Kuo , Chen-Shien Chen , Mirng-Ji Lii , Chen-Hua Yu , Sheng-Yu Wu , Yao-Chun Chuang
IPC分类号： H01L29/49 , H01L23/498 , H01L23/00
CPC分类号： H01L24/13 , H01L23/49816 , H01L24/11 , H01L24/16 , H01L2224/0361 , H01L2224/03912 , H01L2224/11462 , H01L2224/11464 , H01L2224/11472 , H01L2224/11474 , H01L2224/11903 , H01L2224/13012 , H01L2224/13014 , H01L2224/13017 , H01L2224/13025 , H01L2224/1308 , H01L2224/13083 , H01L2224/13111 , H01L2224/13147 , H01L2224/13155 , H01L2224/13184 , H01L2224/16238 , H01L2224/81191 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/15787 , H01L2924/15788 , H01L2924/181 , H01L2924/3512 , H01L2924/35121 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： A pillar structure for a substrate is provided. The pillar structure may have one or more tiers, where each tier may have a conical shape or a spherical shape. In an embodiment, the pillar structure is used in a bump-on-trace (BOT) configuration. The pillar structures may have circular shape or an elongated shape in a plan view. The substrate may be coupled to another substrate. In an embodiment, the another substrate may have raised conductive traces onto which the pillar structure may be coupled.
摘要翻译： 提供了一种用于衬底的柱结构。 支柱结构可以具有一个或多个层，其中每个层可以具有圆锥形或球形。 在一个实施例中，柱结构用于跟踪跟踪（BOT）配置。 支柱结构在平面图中可以具有圆形或细长形状。 衬底可以耦合到另一衬底。 在一个实施例中，另一衬底可以具有凸起的导电迹线，柱结构可以联接到该导电迹线上。
-
公开(公告)号：US07871860B1
公开(公告)日：2011-01-18
申请号：US12620321
申请日：2009-11-17
申请人： Han-Ping Pu , Tsung-Shu Lin , Chen-Shien Chen
发明人： Han-Ping Pu , Tsung-Shu Lin , Chen-Shien Chen
CPC分类号： H01L24/81 , H01L21/563 , H01L24/16 , H01L2224/73203 , H01L2224/81211 , H01L2224/81801 , H01L2924/01006 , H01L2924/01019 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/351 , H01L2924/00
摘要： The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a chip and a substrate. The method also includes bonding the chip to the substrate. The method also includes, after the bonding the chip, dispensing a sealing material between the chip and the substrate. In accordance with the method, the chip and the substrate are maintained within a temperature range from the bonding the chip to the dispensing the sealing material, and wherein a lower limit of the temperature range is approximately twice a room temperature.
摘要翻译： 本公开提供了制造半导体器件的方法。 该方法包括提供芯片和基板。 该方法还包括将芯片接合到衬底。 该方法还包括在粘合芯片之后，在芯片和基板之间分配密封材料。 根据该方法，将芯片和基板保持在从接合芯片到分配密封材料的温度范围内，并且其中温度范围的下限约为室温的两倍。
-
公开(公告)号：US08866285B2
公开(公告)日：2014-10-21
申请号：US13604239
申请日：2012-09-05
CPC分类号： H01L24/19 , H01L21/568 , H01L23/3128 , H01L23/49861 , H01L23/5389 , H01L24/97 , H01L25/105 , H01L2224/12105 , H01L2224/16227 , H01L2224/19 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/97 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/81 , H01L2224/83 , H01L2224/83005
摘要： A device includes a polymer, a device die in the polymer, and a plurality of Through Assembly Vias (TAVs) extending from a top surface to a bottom surface of the polymer. A bulk metal feature is located in the polymer and having a top-view size greater than a top-view size of each of the plurality of TAVs. The bulk metal feature is electrically floating. The polymer, the device die, the plurality of TAVs, and the bulk metal feature are portions of a package.
摘要翻译： 该装置包括聚合物，聚合物中的器件管芯，以及从聚合物的顶表面延伸到底表面的多个通孔组件通孔（TAV）。 散装金属特征位于聚合物中并且具有大于多个TAV中的每一个的顶视图尺寸的顶视图尺寸。 散装金属特征是电浮动的。 聚合物，器件芯片，多个TAV和体金属特征是封装的部分。
-
公开(公告)号：US20140061937A1
公开(公告)日：2014-03-06
申请号：US13604239
申请日：2012-09-05
CPC分类号： H01L24/19 , H01L21/568 , H01L23/3128 , H01L23/49861 , H01L23/5389 , H01L24/97 , H01L25/105 , H01L2224/12105 , H01L2224/16227 , H01L2224/19 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/97 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2224/81 , H01L2224/83 , H01L2224/83005
摘要： A device includes a polymer, a device die in the polymer, and a plurality of Through Assembly Vias (TAVs) extending from a top surface to a bottom surface of the polymer. A bulk metal feature is located in the polymer and having a top-view size greater than a top-view size of each of the plurality of TAVs. The bulk metal feature is electrically floating. The polymer, the device die, the plurality of TAVs, and the bulk metal feature are portions of a package.
摘要翻译： 该装置包括聚合物，聚合物中的器件管芯，以及从聚合物的顶表面延伸到底表面的多个通孔组件通孔（TAV）。 散装金属特征位于聚合物中并且具有大于多个TAV中的每一个的顶视图尺寸的顶视图尺寸。 散装金属特征是电浮动的。 聚合物，器件芯片，多个TAV和体金属特征是封装的部分。
-
-
-
-
-
-
-
-
-
搜索结果
171 条记录 (耗时 0.031 秒)
