公开(公告)号：US20160307815A1

公开(公告)日：2016-10-20

申请号：US15190809

申请日：2016-06-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Chih Huang ,  Chun-Cheng Lin ,  Kuei-Wei Huang ,  Yu-Feng Chen ,  Chen-Shien Chen

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC classification number: H01L23/3142 ,  H01L21/563 ,  H01L21/566 ,  H01L23/16 ,  H01L23/3157 ,  H01L23/3178 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/562 ,  H01L24/05 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10331 ,  H01L2924/10332 ,  H01L2924/10333 ,  H01L2924/10336 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00

Abstract: An embodiment method for forming a semiconductor device package comprises bonding a first die to a package substrate and forming a molding compound over the package substrate and around the first die. A surface of the first die opposing the package substrate is exposed after forming the molding compound. The method further comprises bonding a plurality of second dies to the surface of the first die opposing the package substrate after forming the molding compound.

Abstract translation: 用于形成半导体器件封装的实施例方法包括将第一管芯结合到封装衬底并在封装衬底上并围绕第一管芯形成模制化合物。 在形成模塑料之后，暴露出与封装基板相对的第一裸片的表面。 该方法还包括在形成模塑料之后，将多个第二模具结合到与封装基板相对的第一模具的表面。

公开(公告)号：US20160079135A1

公开(公告)日：2016-03-17

申请号：US14486813

申请日：2014-09-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Chih Huang ,  Chun-Cheng Lin ,  Kuei-Wei Huang ,  Yu-Feng Chen ,  Chen-Shien Chen

IPC: H01L23/16 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L25/00

CPC classification number: H01L23/3142 ,  H01L21/563 ,  H01L21/566 ,  H01L23/16 ,  H01L23/3157 ,  H01L23/3178 ,  H01L23/3737 ,  H01L23/42 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/562 ,  H01L24/05 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/10331 ,  H01L2924/10332 ,  H01L2924/10333 ,  H01L2924/10336 ,  H01L2924/1203 ,  H01L2924/1304 ,  H01L2924/14 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00

Abstract: An embodiment method for forming a semiconductor device package comprises bonding a first die to a package substrate and forming a molding compound over the package substrate and around the first die. A surface of the first die opposing the package substrate is exposed after forming the molding compound. The method further comprises bonding a plurality of second dies to the surface of the first die opposing the package substrate after forming the molding compound.

Abstract translation: 用于形成半导体器件封装的实施例方法包括将第一管芯结合到封装衬底并在封装衬底上并围绕第一管芯形成模制化合物。 在形成模塑料之后，暴露出与封装基板相对的第一裸片的表面。 该方法还包括在形成模塑料之后，将多个第二模具结合到与封装基板相对的第一模具的表面。

公开(公告)号：US09257321B2

公开(公告)日：2016-02-09

申请号：US13917318

申请日：2013-06-13

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chun-Cheng Lin ,  Yu-Peng Tsai ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/683 ,  H01L21/78 ,  H01L21/67

CPC classification number: H01L21/67092 ,  H01L21/6838 ,  H01L21/78 ,  H01L23/544 ,  H01L2223/5446 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A singulation apparatus includes a carrier having a plurality of singulation sites and a scribe line between each of the plurality of singulation sites and an adjacent singulation site. The carrier has a top surface configured to receive a semiconductor substrate thereon. Each of the plurality of singulation sites includes a deformable portion and at least one vacuum hole. The at least one vacuum hole and the deformable portion is configured to form a seal around the at least one vacuum holes when a force is applied. The present disclosure further includes a method of manufacturing semiconductor devices, especially for a singulation process.

Abstract translation: 分割装置包括具有多个切割位置的载体和在多个分割位置中的每一个之间的划线和相邻的分割位点。 载体具有被配置为在其上接收半导体衬底的顶表面。 多个分割位置中的每一个包括可变形部分和至少一个真空孔。 至少一个真空孔和可变形部分构造成当施加力时围绕所述至少一个真空孔形成密封。 本公开还包括一种制造半导体器件的方法，特别是用于切割工艺。

公开(公告)号：US20140264858A1

公开(公告)日：2014-09-18

申请号：US14159159

申请日：2014-01-20

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Meng-Tse Chen ,  Chun-Cheng Lin ,  Wei-Yu Chen ,  Ai-Tee Ang ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49811 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1134 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A device comprises a bottom package comprising a plurality of metal bumps formed on a first side of the bottom package and a plurality of first bumps formed on a second side of the bottom package, a top package bonded on the bottom package, wherein the top package comprises a plurality of second bumps, and wherein second bumps and respective metal bumps form a joint structure and an underfill layer formed between the top package and the bottom package, wherein the metal bumps are embedded in the underfill layer.

Abstract translation: 一种器件包括底部封装，其包括形成在底部封装的第一侧上的多个金属凸块和形成在底部封装的第二侧上的多个第一凸起，顶部封装接合在底部封装上，其中顶部封装 包括多个第二凸起，并且其中第二凸块和相应的金属凸块形成接头结构，以及形成在顶部封装和底部封装之间的底部填充层，其中金属凸块嵌入底部填充层中。

公开(公告)号：US20140231988A1

公开(公告)日：2014-08-21

申请号：US14265164

申请日：2014-04-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Meng-Tse Chen ,  Wei-Hung Lin ,  Yu-Peng Tsai ,  Chun-Cheng Lin ,  Chih-Wei Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/00

CPC classification number: H01L24/32 ,  B23K35/24 ,  B23K35/3612 ,  H01L23/49816 ,  H01L24/17 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81815 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0665 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00014 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Packaging methods and packaged semiconductor devices are disclosed. In one embodiment, a packaging method includes providing a first die, partially packaging the first die, and forming a plurality of solder balls on a surface of the partially packaged first die. An epoxy flux is disposed over the plurality of solder balls. A second die is provided, and the second die is partially packaged. The plurality of solder balls is coupled to the partially packaged second die.

Abstract translation: 公开了封装方法和封装的半导体器件。 在一个实施例中，包装方法包括提供第一模具，部分地包装第一模具，以及在部分封装的第一模具的表面上形成多个焊球。 环氧助焊剂设置在多个焊球上。 提供第二模具，并且第二模具被部分包装。 多个焊球与部分封装的第二管连接。

公开(公告)号：US20240071981A1

公开(公告)日：2024-02-29

申请号：US18499242

申请日：2023-11-01

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Mao-Yen Chang ,  Chih-Wei Lin ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Chun-Cheng Lin ,  Tin-Hao Kuo ,  Yu-Chia Lai ,  Chih-Hsuan Tai

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/538 ,  H01L25/00 ,  H01L25/18

CPC classification number: H01L24/73 ,  H01L21/568 ,  H01L23/5383 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/17179 ,  H01L2224/17517 ,  H01L2224/26145 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2224/83007 ,  H01L2224/92125

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

公开(公告)号：US20220384288A1

公开(公告)日：2022-12-01

申请号：US17884499

申请日：2022-08-09

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Cheng Lin ,  Ching-Hua Hsieh ,  Chen-Hua Yu ,  Chung-Shi Liu ,  Chih-Wei Lin

IPC: H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/367 ,  H01L23/29 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor package including a circuit substrate, an interposer structure, a plurality of dies, and an insulating encapsulant is provided. The interposer structure is disposed on the circuit substrate. The plurality of dies is disposed on the interposer structure, wherein the plurality of dies is electrically connected to the circuit substrate through the interposer structure. The insulating encapsulant is disposed on the circuit substrate, wherein the insulating encapsulant surrounds the plurality of dies and the interposer structure and encapsulates at least the interposer structure, the insulating encapsulant has a groove that surrounds the interposer structure and the plurality of dies, and the interposer structure and the plurality of dies are confined to be located within the groove.

公开(公告)号：US20200144171A1

公开(公告)日：2020-05-07

申请号：US16727126

申请日：2019-12-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Kuei-Wei Huang ,  Wei-Hung Lin ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Meng-Tse Chen ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L23/13

Abstract: Packaging methods for semiconductor devices are disclosed. A method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.

公开(公告)号：US20180047708A1

公开(公告)日：2018-02-15

申请号：US15791071

申请日：2017-10-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Cheng Lin ,  Chung-Shi Liu ,  Kuei-Wei Huang ,  Cheng-Ting Chen ,  Wei-Hung Lin ,  Ming-Da Cheng

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/027 ,  H01L25/10 ,  H01L25/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/0273 ,  H01L21/486 ,  H01L21/56 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0231 ,  H01L2224/0239 ,  H01L2224/03452 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/1131 ,  H01L2224/11424 ,  H01L2224/1152 ,  H01L2224/1162 ,  H01L2224/11825 ,  H01L2224/11849 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13611 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01048 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15747 ,  H01L2924/18161 ,  H01L2924/2064 ,  H01L2924/20641 ,  H01L2924/20642 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.

公开(公告)号：US09627369B2

公开(公告)日：2017-04-18

申请号：US14706541

申请日：2015-05-07

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/31 ,  H01L25/00 ,  H01L23/00 ,  H01L25/10 ,  H01L23/498 ,  H01L21/311 ,  H01L21/56 ,  H01L21/66 ,  H01L25/065

CPC classification number: H01L25/50 ,  H01L21/31105 ,  H01L21/565 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.