专利检索 ap:("Taiwan Semiconductor Manufacturing Company, Ltd.") AND inv:"Meng-Tse Chen" 第 1 页

1.

发明授权
Packaging methods for semiconductor devices comprising forming trenches in separation regions between adjacent packaging substrates 有权

公开(公告)号：US10832999B2

公开(公告)日：2020-11-10

申请号：US16727126

申请日：2019-12-26

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuei-Wei Huang , Wei-Hung Lin , Chih-Wei Lin , Chun-Cheng Lin , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu

IPC分类号： H01L23/498 , H01L21/56 , H01L23/13 , H01L23/00 , H01L23/31

摘要： Packaging methods for semiconductor devices are disclosed. A method of packaging a semiconductor device includes providing a workpiece including a plurality of packaging substrates. A portion of the workpiece is removed between the plurality of packaging substrates. A die is attached to each of the plurality of packaging substrates.

2.

发明授权
Advanced INFO POP and method of forming thereof 有权

公开(公告)号：US10797025B2

公开(公告)日：2020-10-06

申请号：US15157192

申请日：2016-05-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yi-Da Tsai , Meng-Tse Chen , Sheng-Feng Weng , Sheng-Hsiang Chiu , Wei-Hung Lin , Ming-Da Cheng , Ching-Hua Hsieh , Chung-Shi Liu

IPC分类号： H01L23/31 , H01L21/56 , H01L25/065 , H01L23/00 , H01L25/10 , H01L21/683 , H01L21/78 , H01L23/48 , H01L25/00

摘要： In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.

3.

发明申请
Methods of Packaging Semiconductor Devices and Packaged Semiconductor Devices 审中-公开

公开(公告)号：US20180342482A1

公开(公告)日：2018-11-29

申请号：US16055294

申请日：2018-08-06

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu , Chung-Shi Liu , Meng-Tse Chen , Hui-Min Huang , Chih-Fan Huang , Ming-Da Cheng

IPC分类号： H01L25/065 , H01L23/00 , H01L23/58 , H01L21/683 , H01L21/768 , H01L21/78 , H01L25/00 , H01L23/31 , H01L21/3105 , H01L23/498 , H01L23/528 , H01L23/538 , H01L21/56 , H01L23/15

CPC分类号： H01L25/0655 , H01L21/31053 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/768 , H01L21/78 , H01L23/15 , H01L23/3107 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49894 , H01L23/528 , H01L23/5389 , H01L23/564 , H01L23/585 , H01L24/02 , H01L24/19 , H01L24/20 , H01L24/96 , H01L24/97 , H01L25/50 , H01L2221/68327 , H01L2221/68359 , H01L2221/68372 , H01L2224/0231 , H01L2224/02379 , H01L2224/04105 , H01L2224/12105 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/18162

摘要： Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes forming a dam structure on dies proximate edge regions of the dies. A molding material is disposed around the dies, and a top portion of the molding material and a top portion of the dam structure are removed.

4.

发明授权
Package-on-package structure and method 有权

公开(公告)号：US09818729B1

公开(公告)日：2017-11-14

申请号：US15184843

申请日：2016-06-16

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Sheng-Hsiang Chiu , Meng-Tse Chen , Ching-Hua Hsieh , Chung-Shi Liu , Sheng-Feng Weng , Ming-Da Cheng

IPC分类号： H01L23/48 , H01L25/065 , H01L25/00 , H01L21/56 , H01L21/3105 , H01L23/00 , H01L21/768 , H01L21/683 , H01L23/528 , H01L23/522 , H01L21/78

CPC分类号： H01L25/0657 , H01L21/31053 , H01L21/561 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76877 , H01L21/78 , H01L23/3135 , H01L23/5226 , H01L23/528 , H01L23/5389 , H01L24/03 , H01L24/06 , H01L24/11 , H01L24/14 , H01L24/19 , H01L24/96 , H01L24/97 , H01L25/03 , H01L25/50 , H01L2224/0231 , H01L2224/02331 , H01L2224/02373 , H01L2224/03002 , H01L2224/0401 , H01L2224/04105 , H01L2224/11002 , H01L2224/12105 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2225/0651 , H01L2225/06548 , H01L2225/06568 , H01L2924/1531 , H01L2924/18162 , H01L2924/00

摘要： A method includes attaching a first semiconductor package on a carrier, wherein the first semiconductor package comprises a plurality of stacked semiconductor dies and a plurality of contact pads, depositing a first molding compound layer over the carrier, wherein the first semiconductor package is embedded in the first molding compound layer, forming a plurality of vias over the plurality of contact pads, attaching a semiconductor die on the first molding compound layer, depositing a second molding compound layer over the carrier, wherein the semiconductor die and the plurality of vias are embedded in the second molding compound layer, forming an interconnect structure over the second molding compound layer and forming a plurality of bumps over the interconnect structure.

5.

发明授权
Methods for forming fan-out package structure 有权

公开(公告)号：US09691726B2

公开(公告)日：2017-06-27

申请号：US14325810

申请日：2014-07-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Da Cheng , Hsien-Wei Chen , Cheng-Lin Huang , Meng-Tse Chen , Chung-Shi Liu

IPC分类号： H01L21/00 , H01L23/00 , H01L23/522 , H01L21/56 , H01L25/10 , H01L25/00

CPC分类号： H01L24/17 , H01L21/561 , H01L21/568 , H01L23/3135 , H01L23/5226 , H01L24/19 , H01L24/81 , H01L24/83 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/056 , H01L2224/06181 , H01L2224/11002 , H01L2224/12105 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16237 , H01L2224/17181 , H01L2224/32145 , H01L2224/73204 , H01L2224/73267 , H01L2224/81005 , H01L2224/81191 , H01L2224/83191 , H01L2224/92125 , H01L2224/96 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2924/1431 , H01L2924/1434 , H01L2924/014 , H01L2224/83 , H01L2224/81 , H01L2924/00014 , H01L2224/11 , H01L2924/00

摘要： A method includes forming a first composite wafer including molding a plurality of device dies and a plurality of through-vias in a first molding material, and forming redistribution lines on opposite sides of the first molding material. The redistribution lines are inter-coupled through the plurality of through-vias. The method further includes forming a second composite wafer including stacking a plurality of dies to form a plurality of die stacks, and molding the plurality of die stacks in a second molding material. The second molding material fills gaps between the plurality of die stacks. The first composite wafer is bonded to the second composite wafer to form a third composite wafer.

6.

发明授权
Singulation apparatus and method 有权

公开(公告)号：US09679790B2

公开(公告)日：2017-06-13

申请号：US14994689

申请日：2016-01-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chun-Cheng Lin , Yu-Peng Tsai , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu

IPC分类号： H01L21/78 , H01L21/67 , H01L21/683 , H01L23/544

CPC分类号： H01L21/67092 , H01L21/6838 , H01L21/78 , H01L23/544 , H01L2223/5446 , H01L2224/16225 , H01L2924/0002 , H01L2924/3511 , H01L2924/00

摘要： A singulation apparatus includes a carrier having a plurality of singulation sites and a scribe line between each of the plurality of singulation sites and an adjacent singulation site. The carrier has a top surface configured to receive a semiconductor substrate thereon. Each of the plurality of singulation sites includes a deformable portion and at least one vacuum hole. The at least one vacuum hole and the deformable portion is configured to form a seal around the at least one vacuum holes when a force is applied. The present disclosure further includes a method of manufacturing semiconductor devices, especially for a singulation process.

7.

发明授权
Package on-package joint structure with molding open bumps 有权
标题翻译：封装封装接头结构，具有成型露点

公开(公告)号：US09576888B2

公开(公告)日：2017-02-21

申请号：US14159159

申请日：2014-01-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Tse Chen , Chun-Cheng Lin , Wei-Yu Chen , Ai-Tee Ang , Ming-Da Cheng , Chung-Shi Liu

IPC分类号： H01L23/498 , H01L25/10 , H01L25/00 , H01L25/065 , H01L23/31 , H01L23/00

CPC分类号： H01L23/49811 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/32 , H01L24/73 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/1134 , H01L2224/13147 , H01L2224/1403 , H01L2224/14051 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73265 , H01L2224/81815 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/18161 , H01L2224/48227 , H01L2924/00012 , H01L2224/05552 , H01L2924/00

摘要： A device comprises a bottom package comprising a plurality of metal bumps formed on a first side of the bottom package and a plurality of first bumps formed on a second side of the bottom package, a top package bonded on the bottom package, wherein the top package comprises a plurality of second bumps, and wherein second bumps and respective metal bumps form a joint structure and an underfill layer formed between the top package and the bottom package, wherein the metal bumps are embedded in the underfill layer.

摘要翻译： 一种器件包括底部封装，其包括形成在底部封装的第一侧上的多个金属凸块和形成在底部封装的第二侧上的多个第一凸起，顶部封装接合在底部封装上，其中顶部封装包括多个第二凸起，并且其中第二凸块和相应的金属凸块形成接头结构，以及形成在顶部封装和底部封装之间的底部填充层，其中金属凸块嵌入底部填充层中。

8.

发明授权
Process for forming package-on-package structures 有权

公开(公告)号：US09373610B2

公开(公告)日：2016-06-21

申请号：US14825722

申请日：2015-08-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Wei Lin , Ming-Da Cheng , Meng-Tse Chen , Wen-Hsiung Lu , Kuei-Wei Huang , Chung-Shi Liu

IPC分类号： H01L21/00 , H01L25/00 , H01L21/56 , H01L25/065 , H01L21/786 , H01L21/311 , H01L23/00 , H01L21/3105 , H01L25/10 , H01L23/538 , H01L23/522 , H01L23/31 , H01L23/498

CPC分类号： H01L25/50 , H01L21/31051 , H01L21/31127 , H01L21/565 , H01L21/568 , H01L21/76885 , H01L21/786 , H01L23/3128 , H01L23/49805 , H01L23/49816 , H01L23/5226 , H01L23/5389 , H01L24/03 , H01L24/13 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/105 , H01L2224/02371 , H01L2224/02381 , H01L2224/03618 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/13144 , H01L2224/13147 , H01L2224/13164 , H01L2224/16225 , H01L2224/19 , H01L2224/27019 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/81005 , H01L2224/82005 , H01L2224/83005 , H01L2224/92125 , H01L2224/92244 , H01L2225/06513 , H01L2225/0652 , H01L2225/1035 , H01L2225/1041 , H01L2225/1047 , H01L2225/1058 , H01L2924/01029 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/00

摘要： A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material.

9.

发明授权
Singulation apparatus and method 有权
标题翻译：分割装置和方法

公开(公告)号：US09257321B2

公开(公告)日：2016-02-09

申请号：US13917318

申请日：2013-06-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chun-Cheng Lin , Yu-Peng Tsai , Meng-Tse Chen , Ming-Da Cheng , Chung-Shi Liu

IPC分类号： H01L21/683 , H01L21/78 , H01L21/67

CPC分类号： H01L21/67092 , H01L21/6838 , H01L21/78 , H01L23/544 , H01L2223/5446 , H01L2224/16225 , H01L2924/0002 , H01L2924/3511 , H01L2924/00

摘要： A singulation apparatus includes a carrier having a plurality of singulation sites and a scribe line between each of the plurality of singulation sites and an adjacent singulation site. The carrier has a top surface configured to receive a semiconductor substrate thereon. Each of the plurality of singulation sites includes a deformable portion and at least one vacuum hole. The at least one vacuum hole and the deformable portion is configured to form a seal around the at least one vacuum holes when a force is applied. The present disclosure further includes a method of manufacturing semiconductor devices, especially for a singulation process.

摘要翻译： 分割装置包括具有多个切割位置的载体和在多个分割位置中的每一个之间的划线和相邻的分割位点。载体具有被配置为在其上接收半导体衬底的顶表面。多个分割位置中的每一个包括可变形部分和至少一个真空孔。至少一个真空孔和可变形部分构造成当施加力时围绕所述至少一个真空孔形成密封。本公开还包括一种制造半导体器件的方法，特别是用于切割工艺。