公开(公告)号：US20090230560A1

公开(公告)日：2009-09-17

申请号：US12453715

申请日：2009-05-20

申请人： Hirohisa Matsuki ,  Jun Fukuda

发明人： Hirohisa Matsuki ,  Jun Fukuda

IPC分类号： H01L23/485 ,  H01L21/768

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L27/11502 ,  H01L28/57 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85051 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/15183 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device and manufacturing method thereof improving moisture resistance of a FeRAM. After a probe test using a pad, a metal film is formed to cover the pad in an opening of a protective film and a region from the pad to an opening outer periphery of the protective film. On the metal film, a metal bump is formed. The metal film is formed to have a two-layer structure of the first and second metal films. Materials of the lower and upper layers are selected mainly in consideration of adhesion to the protective film and adhesion to the metal bump, respectively. Film formation conditions thereof are set to provide metal films with a desired quality and thickness. Thus, penetration of moisture from the pad or the periphery into a ferroelectric capacitor can be prevented and therefore, occurrence of potential inversion abnormalities due to penetrated moisture can be effectively suppressed.

摘要翻译： 一种提高FeRAM耐湿性的半导体器件及其制造方法。 在使用垫的探针测试之后，形成金属膜以覆盖保护膜的开口中的衬垫和从衬垫到保护膜的开口外周的区域。 在金属膜上形成金属凸块。 金属膜形成为具有第一和第二金属膜的两层结构。 下层和上层的材料主要考虑到对保护膜的粘合性和与金属凸块的粘合性的选择。 其成膜条件被设定为提供具有期望质量和厚度的金属膜。 因此，可以防止水分从焊盘或周围渗透到铁电电容器中，因此可以有效地抑制由于渗透水分导致的潜在的反转异常的发生。

公开(公告)号：US07556985B2

公开(公告)日：2009-07-07

申请号：US11249334

申请日：2005-10-14

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L21/00

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

摘要翻译： 半导体器件在半导体芯片的主表面上具有树脂封装层，其上形成有多个凸起电极，其中半导体器件具有倒角表面或顶部边缘部分上的台阶表面，使得外部冲击或 施加到这种边缘部分的应力由台阶表面的倒角表面消散。

公开(公告)号：US07550844B2

公开(公告)日：2009-06-23

申请号：US11529376

申请日：2006-09-29

申请人： Hirohisa Matsuki ,  Jun Fukuda

发明人： Hirohisa Matsuki ,  Jun Fukuda

IPC分类号： H01L21/00

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L27/11502 ,  H01L28/57 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/04073 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/1134 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/4807 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48477 ,  H01L2224/48644 ,  H01L2224/48647 ,  H01L2224/48655 ,  H01L2224/48664 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48855 ,  H01L2224/48864 ,  H01L2224/85051 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/15183 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device and manufacturing method thereof improving moisture resistance of a FeRAM. After a probe test using a pad, a metal film is formed to cover the pad in an opening of a protective film and a region from the pad to an opening outer periphery of the protective film. On the metal film, a metal bump is formed. The metal film is formed to have a two-layer structure of the first and second metal films. Materials of the lower and upper layers are selected mainly in consideration of adhesion to the protective film and adhesion to the metal bump, respectively. Film formation conditions thereof are set to provide metal films with a desired quality and thickness. Thus, penetration of moisture from the pad or the periphery into a ferroelectric capacitor can be prevented and therefore, occurrence of potential inversion abnormalities due to penetrated moisture can be effectively suppressed.

公开(公告)号：US20060246623A1

公开(公告)日：2006-11-02

申请号：US11477550

申请日：2006-06-30

申请人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

发明人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

IPC分类号： H01L21/00

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/03

摘要： A semiconductor device includes a first semiconductor chip (5) having a first terminal (7) on one surface, a second semiconductor chip (1a) which is larger than the first semiconductor chip (5) and on which the first semiconductor chip (5) is stacked and which has a second terminal (3) on one surface, an insulating layer (10) formed on a second semiconductor chip (1a) to cover the first semiconductor chip (5), a plurality of holes (10a) formed in the insulating layer (10) on at least a peripheral area of the first semiconductor chip (5), a via (11a) formed like a film on inner peripheral surfaces and bottom surfaces of the holes (10a) and connected electrically to the second terminal (3) of the second semiconductor chip (1a), a wiring pattern (11b) formed on an upper surface of the insulating layer (10), and an external terminal (14) formed on the wiring pattern (11b).

公开(公告)号：US20060223234A1

公开(公告)日：2006-10-05

申请号：US11157855

申请日：2005-06-22

申请人： Satoshi Terayama ,  Hirohisa Matsuki

发明人： Satoshi Terayama ,  Hirohisa Matsuki

IPC分类号： H01L21/00

CPC分类号： H01L21/6836 ,  H01L21/78 ,  H01L23/585 ,  H01L2221/68327 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a manufacturing method of a semiconductor device, a semiconductor substrate having a plurality of semiconductor chips formed on one of principal surfaces of the substrate is cut into the plurality of semiconductor chips through dicing. A first cutting process is formed on one of the principal surfaces of the substrate to produce two cutting grooves between two neighboring ones of the plurality of semiconductor chips, each cutting groove being adjacent to one of the neighboring ones of the plurality of semiconductor chips. A second cutting process is performed on the other of the principal surfaces of the substrate to produce a cutting groove overlapping the two cutting grooves produced by the first cutting process.

摘要翻译： 在半导体器件的制造方法中，通过切割将具有形成在基板的主表面之一上的多个半导体芯片的半导体基板切割成多个半导体芯片。 第一切割工艺形成在基板的一个主表面上，以在多个半导体芯片中的两个相邻的半导体芯片之间产生两个切割槽，每个切割凹槽与多个半导体芯片中的相邻半导体芯片中的一个相邻。 在基板的另一个主表面上执行第二切割工艺，以产生与通过第一切割工艺制造的两个切割槽重叠的切割凹槽。

公开(公告)号：US07064047B2

公开(公告)日：2006-06-20

申请号：US10893297

申请日：2004-07-19

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L23/04

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06909181B2

公开(公告)日：2005-06-21

申请号：US10097815

申请日：2002-03-15

申请人： Yoshitaka Aiba ,  Hirohisa Matsuki ,  Mitsutaka Sato

发明人： Yoshitaka Aiba ,  Hirohisa Matsuki ,  Mitsutaka Sato

IPC分类号： H01L23/29 ,  H01L21/56 ,  H01L21/60 ,  H01L23/28 ,  H01L23/31 ,  H01L23/485 ,  H05K3/28 ,  H05K3/32 ,  H05K3/34 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H05K3/3436 ,  H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05023 ,  H01L2224/05568 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2224/73104 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K2201/0129 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00015 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： There are provided a sealing insulating film that is formed on a substrate and melted at a first heating temperature to have a flowability, and external terminals that are formed on the substrate, and connected to other electronic device at a second heating temperature higher than the first heating temperature, and surrounded by the sealing insulating film.

摘要翻译： 提供了一种形成在基板上并在第一加热温度下熔化以具有流动性的密封绝缘膜，以及形成在基板上的外部端子，并且在比第一加热温度高的第二加热温度下连接到其它电子器件 加热温度，并被密封绝缘膜包围。

公开(公告)号：US20050001329A1

公开(公告)日：2005-01-06

申请号：US10860657

申请日：2004-06-04

申请人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

发明人： Hirohisa Matsuki ,  Yoshitaka Aiba ,  Mitsutaka Sato ,  Tadahiro Okamato

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L23/3114 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82039 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06586 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00011 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/03

摘要： A semiconductor device includes a first semiconductor chip (5) having a first terminal (7) on one surface, a second semiconductor chip (1a) which is larger than the first semiconductor chip (5) and on which the first semiconductor chip (5) is stacked and which has a second terminal (3) on one surface, an insulating layer (10) formed on a second semiconductor chip (1a) to cover the first semiconductor chip (5), a plurality of holes (10a) formed in the insulating layer (10) on at least a peripheral area of the first semiconductor chip (5), a via (11a) formed like a film on inner peripheral surfaces and bottom surfaces of the holes (10a) and connected electrically to the second terminal (3) of the second semiconductor chip (1a), a wiring pattern (11b) formed on an upper surface of the insulating layer (10), and an external terminal (14) formed on the wiring pattern (11b).

摘要翻译： 一种半导体器件包括在一个表面上具有第一端子（7）的第一半导体芯片（5），大于第一半导体芯片（5）的第二半导体芯片（1a），并且第一半导体芯片（5） 并且在一个表面上具有第二端子（3），形成在第二半导体芯片（1a）上以覆盖第一半导体芯片（5）的绝缘层（10），形成在第二半导体芯片 在所述第一半导体芯片（5）的至少周边区域上具有绝缘层（10），在所述孔（10a）的内周面和底面上形成为膜状的通路（11a），并且与所述第二端子 3），形成在绝缘层（10）的上表面上的布线图案（11b）和形成在布线图案（11b）上的外部端子（14）。

公开(公告)号：US06784542B2

公开(公告)日：2004-08-31

申请号：US10618721

申请日：2003-07-15

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L2304

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06666369B2

公开(公告)日：2003-12-23

申请号：US10013506

申请日：2001-12-13

申请人： Hirohisa Matsuki ,  Hiroyuki Matsui

发明人： Hirohisa Matsuki ,  Hiroyuki Matsui

IPC分类号： B23K2800

CPC分类号： B23K35/38 ,  B23K35/262 ,  B23K35/268 ,  B23K35/3618 ,  B23K2101/40 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/15787 ,  H05K3/3489 ,  H01L2924/00 ,  H01L2224/05655 ,  H01L2924/00014 ,  H01L2224/05166

摘要： There is provided a semiconductor device manufacturing method which comprising the steps of forming solder bumps on an underlying metal film of a semiconductor device, and placing the semiconductor device and the solder layer in a reduced pressure atmosphere containing a formic acid to heat the solder bumps. Accordingly, the solder bumps can be formed without the use of flux not to generate voids in the solder layer, and also the cleaning required after the solder bumps are formed can be omitted.