公开(公告)号：US20080176418A1

公开(公告)日：2008-07-24

申请号：US11865396

申请日：2007-10-01

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

Abstract translation: 包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入器的表面布置并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机 还提供了一种制造焊盘栅格阵列中介层结构的方法。

公开(公告)号：US20080136033A1

公开(公告)日：2008-06-12

申请号：US11937208

申请日：2007-11-08

Applicant: Masayuki Nagamatsu ,  Ryosuke Usui

Inventor： Masayuki Nagamatsu ,  Ryosuke Usui

IPC: H01L23/485 ,  H05K3/06 ,  H05K1/09

CPC classification number: H05K1/111 ,  H01L23/295 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48464 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01083 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/181 ,  H05K3/243 ,  H05K3/3452 ,  H05K3/383 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/0542 ,  Y02P70/611 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/05599 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region. A solder resist is formed in such a manner as to cover part of the gold plating layer and the wiring pattern corresponding to the boundary region and the wiring region, and the solder resist has a predetermined opening through which to connect to the semiconductor device. A conductive member is connected to the gold plating layer in the electrode region, and a molded resin layer seals the entire semiconductor module.

Abstract translation: 本发明的优点是抑制从焊盘电极部分渗透的湿气在布线图案的表面上扩散，并提高包装板的可靠性。 包装板的布线图案形成在绝缘基板上，并且包括布线区域，与半导体器件连接的电极区域（焊盘电极）以及设置在布线区域和电极区域之间的边界区域。 在布线图案的电极区域的表面上设置镀金层。 布线图案的边界区域的顶表面被形成为从布线图案的布线区域的顶表面凹陷，并且在边界区域中设置有台阶部分。 形成阻焊层，以覆盖与边界区域和布线区域相对应的金镀层和布线图案的一部分，阻焊剂具有与半导体器件连接的预定开口。 导电构件连接到电极区域中的镀金层，并且模制树脂层密封整个半导体模块。

公开(公告)号：US20080131996A1

公开(公告)日：2008-06-05

申请号：US11633718

申请日：2006-12-05

Applicant: Gene Wu

Inventor： Gene Wu

IPC: H01L21/00

CPC classification number: H01L21/6835 ,  H01L21/4846 ,  H01L23/49827 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2224/81801 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30107 ,  H05K3/205 ,  H05K3/3473 ,  H05K2201/09745 ,  H05K2201/10674 ,  H01L2224/0401

Abstract: A reverse build-up method for forming a package substrate includes forming bumps; forming an interconnect structure connected to the bumps; and forming ball grid array (BGA) balls on the interconnect structure. The BGA balls are electrically connected to the bumps through the interconnect structure. The step of forming the bumps are performed before the steps of forming the interconnect structure and forming the BGA balls.

Abstract translation: 用于形成封装衬底的反向堆叠方法包括形成凸块; 形成连接到所述凸块的互连结构; 并在互连结构上形成球栅阵列（BGA）球。 BGA球通过互连结构电连接到凸块。 形成凸块的步骤在形成互连结构并形成BGA球的步骤之前进行。

公开(公告)号：US07377790B2

公开(公告)日：2008-05-27

申请号：US11865231

申请日：2007-10-01

Applicant: Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

Inventor： Gareth G. Hougham ,  Brian S. Beaman ,  Evan G. Colgan ,  Paul W. Coteus ,  Stefano S. Oggioni ,  Enrique Vargas

IPC: H01R12/00

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

Abstract translation: 包括电绝缘载体平面的平面栅格阵列（LGA）插入器结构以及安装在所述载体平面的第一表面上的至少一个插入器。 插入件在横截面中具有半环形结构，并由介电弹性体材料构成。 多个导电元件围绕至少一个半环形插入件的表面布置，并且从其最上端向内和向下自由地延伸至与位于电绝缘载体的相对侧上的至少一个部件的电接触 飞机 还提供了一种制造焊盘栅格阵列中介层结构的方法。

公开(公告)号：US07375974B2

公开(公告)日：2008-05-20

申请号：US11073621

申请日：2005-03-08

Applicant: Masato Kirigaya

Inventor： Masato Kirigaya

IPC: H05K7/02

CPC classification number: H05K1/0203 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15322 ,  H01L2924/16251 ,  H01L2924/19106 ,  H05K3/0061 ,  H05K7/20436 ,  H05K7/20854 ,  H05K2201/09745 ,  H05K2201/1056

Abstract: A circuit board is disposed on a support plate, with electronic components mounted on this circuit board being accommodated in recessed portions of the support plate. Thermal adhesive members intervene between rear surfaces of the electronic components and bottom surfaces of the recessed portions of the support plate. The support plate has degassing grooves. Furthermore, the support plate has raised portions provided on its upper surface for supporting the circuit board in a floated condition with a gap between them.

Abstract translation: 电路板设置在支撑板上，安装在该电路板上的电子部件容纳在支撑板的凹部中。 热粘合构件介于电子部件的后表面和支撑板的凹部的底表面之间。 支撑板具有脱气槽。 此外，支撑板具有设置在其上表面上的凸起部分，用于将电路板支撑在浮动状态，并在它们之间具有间隙。

公开(公告)号：US20080105458A1

公开(公告)日：2008-05-08

申请号：US11976762

申请日：2007-10-26

Applicant: Myung-Sam Kang ,  Jung-Hyun Park ,  Sang-Duck Kim ,  Ji-Eun Kim ,  Jong-Gyu Choi

Inventor： Myung-Sam Kang ,  Jung-Hyun Park ,  Sang-Duck Kim ,  Ji-Eun Kim ,  Jong-Gyu Choi

IPC: H05K1/09 ,  H05K3/00

CPC classification number: H01L23/13 ,  H01L21/4853 ,  H01L23/3114 ,  H01L23/49816 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/107 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y02P70/611 ,  Y10T29/49147 ,  H01L2224/29099 ,  H01L2924/00

Abstract: A substrate for mounting a flip chip and a method of manufacturing the substrate method of manufacturing the substrate are disclosed. Using a method of manufacturing a substrate for flip chip mounting that includes providing an insulating layer, in which a circuit pattern is buried, and forming at least one bump pad shaped as an indentation by removing at least one portion of the circuit pattern, the bumps pads can be formed by removing portions of a circuit pattern in the shape of indentations, to prevent solder bumps from flowing to the insulating layer portions and reduce the pitch between bumps.

Abstract translation: 公开了一种用于安装倒装芯片的基板和制造基板的制造方法的方法。 使用制造用于倒装芯片安装的衬底的方法，其包括提供绝缘层，其中埋置电路图案，并且通过去除电路图案的至少一部分形成形成凹陷的至少一个凸块焊盘，所述凸块 可以通过去除凹陷形状的电路图案的部分来形成焊盘，以防止焊料凸块流到绝缘层部分并降低凸块之间的间距。

公开(公告)号：US07355853B2

公开(公告)日：2008-04-08

申请号：US10496005

申请日：2002-11-08

Applicant: Hideyuki Emoto ,  Masahiro Ibukiyama ,  Isao Sugimoto ,  Manabu Uto

Inventor： Hideyuki Emoto ,  Masahiro Ibukiyama ,  Isao Sugimoto ,  Manabu Uto

IPC: H05K7/20

CPC classification number: H05K3/0061 ,  H01L23/367 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0306 ,  H05K3/341 ,  H05K2201/09663 ,  H05K2201/0969 ,  H05K2201/09745 ,  H01L2924/00

Abstract: A module is provided that has high reliability in the junction between a ceramic circuit board and a heat sink, undergoes small changes in shape and warp of a module structure comprising a ceramic circuit board and a metal heat sink event under a temperature history during power module assembly and power module actual use, eliminates an unfavorableness during power module assembly, and maintains high reliability over a long period of time. A module structure characterized in that in a module member formed by bonding the ceramic circuit board to the metal heat sink via a metal plate (A) the main component of which is aluminum, the metal plate (A) has a thickness of 400 μm or more and 1,200 μm or less.

Abstract translation: 提供了在陶瓷电路板和散热片之间的接合处具有高可靠性的模块，在功率模块的温度历史下，在包括陶瓷电路板和金属散热器事件的模块结构的形状和翘曲方面经历小的变化 组装和电源模块实际使用，消除了电源模块组装过程中的不利影响，并在长时间内保持高可靠性。 一种模块结构，其特征在于，在通过其主要成分为铝的金属板（A）将陶瓷电路板与金属散热器接合而形成的模块构件中，金属板（A）的厚度为400μm或 更多和1200个妈妈或更少。

公开(公告)号：US07351096B2

公开(公告)日：2008-04-01

申请号：US11478691

申请日：2006-07-03

Applicant: Takahiro Kondou ,  Kiyoshi Sato ,  Mitsuru Kobayashi ,  Satoshi Moriyama

Inventor： Takahiro Kondou ,  Kiyoshi Sato ,  Mitsuru Kobayashi ,  Satoshi Moriyama

IPC: H01R12/24

CPC classification number: H01R24/44 ,  H01R9/0515 ,  H01R13/6658 ,  H01R2103/00 ,  H05K3/3405 ,  H05K3/3484 ,  H05K2201/09745 ,  H05K2201/099 ,  H05K2201/09909 ,  H05K2201/10287 ,  H05K2201/10356 ,  H05K2203/0191 ,  H05K2203/0195 ,  H05K2203/043 ,  H05K2203/0545

Abstract: A cable connector includes a contact assembly including an electrical insulating block part which is configured to incorporate plural signal contacts; and a relay wiring substrate mounted to a back of the contact assembly. The relay wiring substrate includes, on a surface, a contact connecting pad electrically connected to one of the signal contacts, a wiring connecting pad, and a wiring pattern connecting the contact connecting pad and the wiring connecting pad. The relay wiring substrate further includes a ground layer inside the relay wiring substrate. The cable connector further includes a cable connected to the relay wiring substrate by electrically connecting an end of a wiring with the wiring connecting pad. The relay wiring substrate further includes a ground pattern for matching impedance inside the relay wiring substrate.

Abstract translation: 电缆连接器包括接触组件，其包括电绝缘块部分，其被配置成结合多个信号触头; 以及安装到所述接触组件的背面的中继布线基板。 所述中继布线基板在表面上包括电连接到所述信号触点之一的接触连接焊盘，布线连接焊盘和连接所述接触连接焊盘和所述布线连接焊盘的布线图案。 继电器配线基板还包括在中继布线基板内的接地层。 电缆连接器还包括通过将布线的端部与布线连接垫电连接而连接到中继布线基板的电缆。 继电器布线基板还包括用于匹配中继布线基板内的阻抗的接地图案。

公开(公告)号：US20080032520A1

公开(公告)日：2008-02-07

申请号：US11865305

申请日：2007-10-01

Applicant: Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

Inventor： Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

IPC: H01R12/16

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.

公开(公告)号：US20080023845A1

公开(公告)日：2008-01-31

申请号：US11865395

申请日：2007-10-01

Applicant: Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

Inventor： Gareth Hougham ,  Brian Beaman ,  Evan Colgan ,  Paul Coteus ,  Stefano Oggioni ,  Enrique Vargas

IPC: H01L23/48

CPC classification number: H01R12/714 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01R12/52 ,  H05K3/326 ,  H05K3/4007 ,  H05K7/1061 ,  H05K2201/0133 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09745 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49002 ,  Y10T29/49121 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49151 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/49208 ,  Y10T29/49213 ,  Y10T29/49218 ,  Y10T29/49222 ,  H01L2924/00

Abstract: A land grid array (LGA) interposer structure, including an electrically insulating carrier plane, and at least one interposer mounted on a first surface of said carrier plane. The interposer possesses a hemi-toroidal configuration in transverse cross-section and is constituted of a dielectric elastomeric material. A plurality of electrically-conductive elements are arranged about the surface of the at least one hemi-toroidal interposer and extend radically inwardly and downwardly from an uppermost end thereof into electrical contact with at least one component located on an opposite side of the electrically insulating carrier plane. Provided is also a method of producing the land grid array interposer structure.