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    Circuit Board and Method for Manufacturing Semiconductor Modules and Circuit Boards
    51.
    发明申请
    Circuit Board and Method for Manufacturing Semiconductor Modules and Circuit Boards 失效
    电路板和制造半导体模块和电路板的方法

    公开(公告)号：US20100246140A1

    公开(公告)日：2010-09-30

    申请号：US12813978

    申请日：2010-06-11

    申请人： Mayumi Nakasato ,  Hideki Mizuhara

    发明人： Mayumi Nakasato ,  Hideki Mizuhara

    IPC分类号： H05K7/00 ,  H05K1/11 ,  H05K3/10

    CPC分类号： H01L23/142 ,  H01L21/486 ,  H01L23/49827 ,  H01L2224/16225 ,  H05K3/427 ,  H05K3/445 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/09827 ,  H05K2203/0143 ,  H05K2203/068 ,  Y10T29/49155

    摘要： The deterioration of dielectric breakdown strength arising from an opening of a metal plate is prevented and the reliability as a circuit board is enhanced. A circuit board is provided with a metal plate, having openings, as core material. The opening is provided in a manner that the size of the opening gradually increases from a lower surface side toward an upper surface side of the metal plate. On both surface sides of the metal plate there are provided wiring patterns, respectively, via insulating layers. The insulating layer provided on an upper region of the opening and the corresponding wiring pattern are provided such that they have a recess on the upper surface of them. To electrically connect each wiring pattern, the circuit board further includes a conductor which penetrates the metal plate via the opening and which connects the wiring patterns with each other. An LSI chip is directly coupled to the upper surface side of the metal plate via a solder ball.

    摘要翻译： 防止由金属板的开口引起的介电击穿强度的劣化，并提高作为电路板的可靠性。 电路板设置有具有作为芯材料的开口的金属板。 开口以从金属板的下表面侧向上表面侧逐渐增大的方式设置。 在金属板的两个表面侧，分别经由绝缘层设置布线图案。 设置在开口的上部区域上的绝缘层和相应的布线图案设置成使得它们在其上表面上具有凹部。 为了电连接每个布线图案，电路板还包括经由开口穿过金属板并将布线图案彼此连接的导体。 LSI芯片通过焊球直接耦合到金属板的上表面侧。

    Semiconductor device comprising an interconnect structure with a modified low dielectric insulation layer
    58.
    发明授权
    Semiconductor device comprising an interconnect structure with a modified low dielectric insulation layer 有权
    半导体器件包括具有改性的低介电绝缘层的互连结构

    公开(公告)号：US06917110B2

    公开(公告)日：2005-07-12

    申请号：US10310138

    申请日：2002-12-05

    申请人： Naoteru Matsubara ,  Hideki Mizuhara ,  Takashi Goto

    发明人： Naoteru Matsubara ,  Hideki Mizuhara ,  Takashi Goto

    IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532

    CPC分类号： H01L23/5226 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

    摘要： A semiconductor device capable of inhibiting a conductive plug from increase of resistance or disconnection resulting from moisture discharged from a first insulator film while reducing the capacitance between adjacent first interconnection layers is obtained. This semiconductor device comprises a plurality of first interconnection layers formed on a semiconductor substrate at a prescribed interval, a first insulator film, formed to fill up the clearance between the plurality of first interconnection layers, having an opening reaching the first interconnection layers and a conductive plug charged in the opening of the first insulator film and formed to be in contact with the first interconnection layers. An impurity is selectively introduced into a first region of the first insulator film in the vicinity of contact surfaces between the first interconnection layers and the conductive plug, thereby selectively modifying the first region of the first insulator film.

    摘要翻译： 可以获得能够抑制导电插头在降低相邻的第一互连层之间的电容的同时增加从第一绝缘膜释放的湿气引起的电阻或断开的半导体装置。 该半导体器件包括以规定间隔形成在半导体衬底上的多个第一互连层，形成为填充多个第一互连层之间的间隙的第一绝缘膜，具有到达第一互连层的开口和导电 充电在第一绝缘膜的开口中并形成为与第一互连层接触的插头。 在第一互连层和导电插塞之间的接触表面附近，选择性地将杂质引入到第一绝缘膜的第一区域中，从而选择性地改变第一绝缘膜的第一区域。