公开(公告)号：US20150288085A1

公开(公告)日：2015-10-08

申请号：US14679892

申请日：2015-04-06

Applicant: Mindspeed Technologies, Inc.

Inventor： Alfredo Moncayo ,  Brian Hostetter ,  Luis F. Armenta

IPC: H01R12/57 ,  H05K1/02 ,  H05K1/11

CPC classification number: H05K1/025 ,  H01R24/50 ,  H05K1/0221 ,  H05K1/115 ,  H05K1/117 ,  H05K2201/0195 ,  H05K2201/10015 ,  H05K2201/10189 ,  H05K2201/10356 ,  H05K2201/10446

Abstract: An electrical interface on a circuit board is disclosed for electrically connecting the circuit board to a connector to reduce reflections and impedance mismatch and increase power transfer from the connector to the signal path of the circuit board. The signal interface includes a signal conductor including a signal pad configured to connect to a connector pin and a waveguide section extending from the signal pad. The waveguide narrows from a signal pad width to connect to a microstrip conductor. A first ground section is spaced rightward from the signal conductor such that the inner edge of the first ground section, angles in correspondence with the narrowing of the waveguide to generally track an outer right edge of the waveguide. A second ground section is spaced leftward from the signal conductor and configured generally similarly to the first ground section.

Abstract translation: 公开了电路板上的电接口，用于将电路板电连接到连接器以减少反射和阻抗失配，并增加从连接器到电路板的信号路径的功率传递。 信号接口包括信号导体，该信号导体包括被配置为连接到连接器引脚的信号焊盘和从信号焊盘延伸的波导部分。 波导从信号焊盘宽度变窄以连接到微带导体。 第一接地部分从信号导体向右间隔开，使得第一接地部分的内边缘与波导的变窄相对应，以大致跟踪波导的外右边缘。 第二接地部分与信号导体向左隔开，并且大致与第一接地部分类似地配置。

公开(公告)号：US09148960B2

公开(公告)日：2015-09-29

申请号：US14060138

申请日：2013-10-22

Applicant: Corning Cable Systems LLC

Inventor： Brian Jeffrey Galloway

IPC: G02B6/28 ,  H05K3/30 ,  H04B10/69 ,  H05K1/02 ,  G02B6/42

CPC classification number: H05K3/30 ,  G02B6/4279 ,  G02B6/4284 ,  H04B10/69 ,  H05K1/0245 ,  H05K1/025 ,  H05K2201/10121 ,  Y10T29/49128

Abstract: Embodiments disclosed herein include receiver optical assemblies (ROAs) having a photo-detector remotely located from a differential transimpedance amplifier (TIA). Related components, circuits, and methods are also disclosed. By providing the photo-detector remotely located from a TIA, additional costs associated with design constraints of providing the photo-detector intimate with a TIA may be avoided, thereby reducing cost of the ROA. In this regard as a non-limiting example, the ROAs according to the embodiments disclosed herein allow shorter haul active optical cable applications for use in consumer applications from a cost standpoint with the added benefits of increased bandwidth and low noise performance of optical fiber. In this regard, the ROAs disclosed herein provide higher input impedance differential TIA circuits and transmission circuits inhibiting or reducing ringing effects and maintain a sufficiently low resistance-capacitance (RC) time constant for differential TIA circuit to allow for higher bandwidth operation of the ROA.

Abstract translation: 本文公开的实施例包括具有远离位置差分跨阻抗放大器（TIA）的光电检测器的接收器光学组件（ROAs）。 还公开了相关组件，电路和方法。 通过提供远离TIA的光电检测器，可以避免与提供光电检测器的设计约束相关的附加成本与TIA紧密相连，从而降低ROA的成本。 在这方面作为非限制性示例，根据本文公开的实施例的ROA允许从成本的角度使用在消费者应用中的较短的有源光缆应用，具有增加的带宽和低光纤的低噪声性能的附加益处。 在这方面，本文公开的ROA提供了更高的输入阻抗差分TIA电路和抑制或减少振铃效应的传输电路，并且为差分TIA电路保持足够低的电阻 - 电容（RC）时间常数以允许ROA的更高带宽操作。

公开(公告)号：US20150201499A1

公开(公告)日：2015-07-16

申请号：US14153071

申请日：2014-01-12

Applicant: Zohar SHINAR ,  Joel VIDAL

Inventor： Zohar SHINAR ,  Joel VIDAL

IPC: H05K3/12 ,  B29C67/00

CPC classification number: H05K3/125 ,  B29C64/112 ,  B29C64/135 ,  B29C64/386 ,  B29C70/882 ,  B29K2105/0058 ,  B29K2995/0005 ,  B29K2995/0006 ,  B29K2995/0007 ,  B29L2031/3406 ,  B29L2031/3425 ,  B33Y30/00 ,  B33Y50/02 ,  B33Y80/00 ,  H05K1/0206 ,  H05K1/025 ,  H05K1/0253 ,  H05K1/0268 ,  H05K1/0269 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0284 ,  H05K1/092 ,  H05K1/165 ,  H05K1/167 ,  H05K1/186 ,  H05K3/0005 ,  H05K3/1283 ,  H05K3/225 ,  H05K3/284 ,  H05K3/4007 ,  H05K3/4069 ,  H05K3/4664 ,  H05K3/4685 ,  H05K3/4688 ,  H05K2201/0367 ,  H05K2201/037 ,  H05K2201/0391 ,  H05K2201/09509 ,  H05K2201/09518 ,  H05K2201/098 ,  H05K2201/09836 ,  H05K2201/09845 ,  H05K2201/09872 ,  H05K2201/10098 ,  H05K2203/013 ,  H05K2203/107 ,  H05K2203/163 ,  H05K2203/166

Abstract: Device, system, and method of three-dimensional printing. A device includes: a first 3D-printing head to selectively discharge conductive 3D-printing material; a second 3D-printing head to selectively discharge insulating 3D-printing material; and a processor to control operations of the first and second 3D-printing heads based on a computer-aided design (CAD) scheme describing a printed circuit board (PCB) intended for 3D-printing. A 3D-printer device utilizes 3D-printing methods, in order to 3D-print: (a) a functional multi-layer PCB; or (b) a functional stand-alone electric component; or (c) a functional PCB having an embedded or integrated electric component, both of them 3D-printed in a unified 3D-printing process.

Abstract translation: 三维打印的设备，系统和方法。 一种装置包括：第一3D打印头，用于选择性地排放导电3D打印材料; 第二3D打印头，用于选择性地放电绝缘3D打印材料; 以及基于描述用于3D打印的印刷电路板（PCB）的计算机辅助设计（CAD）方案来控制第一和第二3D打印头的操作的处理器。 3D打印机设备利用3D打印方法，以便3D打印：（a）功能性多层PCB; 或（b）功能独立电气部件; 或（c）具有嵌入或集成电气部件的功能PCB，它们都以统一的3D打印过程3D打印。

公开(公告)号：US09072187B2

公开(公告)日：2015-06-30

申请号：US13601704

申请日：2012-08-31

Applicant: Chuan Hu

Inventor： Chuan Hu

IPC: H05K1/11 ,  H05K3/10

CPC classification number: H05K1/11 ,  H01L23/66 ,  H01L2924/0002 ,  H05K1/0216 ,  H05K1/024 ,  H05K1/025 ,  H05K3/002 ,  H05K3/0029 ,  H05K3/10 ,  H05K3/107 ,  H05K3/465 ,  H05K2201/0352 ,  H05K2201/09036 ,  H05K2203/058 ,  Y10T29/49162 ,  H01L2924/00

Abstract: Off-plane conductive line interconnects may be formed in microelectronic devices. In one example, such as device includes a first set of metal conductive lines in a dielectric substrate at a first horizontal layer of the substrate, a second set of metal conductive lines in the substrate at the first horizontal layer of the substrate and vertically offset from the first set of metal lines, and a dielectric material insulating the metal lines from each other and the first horizontal layer from other horizontal layers. Vias in the dielectric material to connect both the first and second set of metal lines to metal lines at a second horizontal layer of the substrate.

Abstract translation: 离平面导线互连可以形成在微电子器件中。 在一个示例中，例如器件包括在衬底的第一水平层处的电介质衬底中的第一组金属导电线，在衬底的第一水平层处的第二组金属导电线，并且垂直偏离 第一组金属线，以及电介质材料，使金属线彼此绝缘，并且第一水平层与其他水平层绝缘。 电介质材料中的通孔将第一和第二组金属线连接到衬底的第二水平层处的金属线。

公开(公告)号：US20150131246A1

公开(公告)日：2015-05-14

申请号：US14603548

申请日：2015-01-23

Applicant: COVIDIEN LP

Inventor： WAYNE L. MOUL ,  ROBERT J. BEHNKE, II ,  SCOTT E.M. FRUSHOUR ,  JEFFREY L. JENSEN

IPC: H05K1/18 ,  H05K1/02

CPC classification number: H05K1/0218 ,  H01P3/088 ,  H01P11/003 ,  H05K1/0225 ,  H05K1/0231 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/0298 ,  H05K1/183 ,  H05K1/186 ,  H05K3/4611 ,  H05K2201/066 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/0969 ,  H05K2203/063

Abstract: A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area. The device is electrically-coupled to one or more of the one or more electrically-conductive traces disposed on the first surface of the second electrically-insulating layer.

Abstract translation: 印刷电路板包括第一层堆叠和耦合到第一层堆叠的第二层堆叠。 第一层堆叠包括第一电绝缘层，第一导电层和限定从其延伸的空隙的切除区域。 第一电绝缘层包括第一表面和相对的第二表面。 第一导电层设置在第一电绝缘层的第一表面上。 第二层堆叠包括第二电绝缘层。 第二电绝缘层包括第一表面和相对的第二表面。 一个或多个导电迹线设置在第二电绝缘层的第一表面上。 印刷电路板还包括至少部分地设置在切除区域内的装置。 该器件电耦合到布置在第二电绝缘层的第一表面上的一个或多个导电迹线中的一个或多个。

公开(公告)号：US20150102874A1

公开(公告)日：2015-04-16

申请号：US14478322

申请日：2014-09-05

Applicant: Advanced Flexible Circuits Co., Ltd.

Inventor： CHIH-HENG CHUO ,  KUO-FU SU ,  GWUN-JIN LIN

IPC: H05K1/02 ,  H05K1/03

CPC classification number: H05K1/118 ,  H05K1/024 ,  H05K1/025 ,  H05K1/117 ,  H05K2201/0191

Abstract: An attenuation reduction structure of a circuit board includes an expanded thickness formed between high frequency signal contact pads and a grounding layer of the circuit board. The expanded thickness is greater than a reference thickness between the grounding layer and high frequency signal lines. The circuit board is made of polyethylene terephthalate (PET) or polyimide (PI). Alternatively, a rigid board including resin and fibrous material or a rigid-flex board is used. The circuit board can be a single-layer circuit board or a multi-layer board formed by combining at least two single-layer circuit boards. A thickness-expanding pad is mounted between the high frequency signal contact pads and the grounding layer or the thickness of a portion of a bonding layer of the circuit board is increased to provide an expanded thickness.

Abstract translation: 电路板的衰减减小结构包括在高频信号接触焊盘和电路板的接地层之间形成的膨胀厚度。 膨胀的厚度大于接地层和高频信号线之间的参考厚度。 电路板由聚对苯二甲酸乙二醇酯（PET）或聚酰亚胺（PI）制成。 或者，使用包括树脂和纤维材料的刚性板或刚挠板。 电路板可以是通过组合至少两个单层电路板而形成的单层电路板或多层板。 在高频信号接触焊盘和接地层之间安装厚度扩大的焊盘，或者增加电路板的接合层的一部分的厚度以提供膨胀的厚度。

公开(公告)号：US08981864B2

公开(公告)日：2015-03-17

申请号：US13460243

申请日：2012-04-30

Applicant: Daniel L. Gerlach ,  Ashley Rebelo

Inventor： Daniel L. Gerlach ,  Ashley Rebelo

IPC: H01P3/08

CPC classification number: H01P3/082 ,  H01P3/088 ,  H05K1/024 ,  H05K1/025 ,  H05K2201/0191 ,  Y10T29/49155

Abstract: Multi-layer in integrated transmission line circuits are provided having improved signal loss characteristics. A multi-layer integrated transmission line circuit, such as a stripline circuit or a microstrip circuit, comprises at least one reference layer; at least one conducting layer having one or more conducting strips, wherein the at least one conducting layer is separated from the at least one reference layer by a substrate; and at least one additional layer positioned between the at least one conducting layer and the at least one reference layer. The multi-layer integrated transmission line circuit may also comprise a dielectric insulating material, such as an organic material or a ceramic material. The additional layers increase a dielectric thickness of the multi-layer integrated transmission line circuit to reduce dielectric losses.

Abstract translation: 提供集成传输线路电路中的多层具有改善的信号损耗特性。 诸如带状线电路或微带电路的多层集成传输线路电路包括至少一个参考层; 至少一个导电层具有一个或多个导电条，其中所述至少一个导电层通过基底与所述至少一个参考层分离; 以及位于所述至少一个导电层和所述至少一个参考层之间的至少一个附加层。 多层集成传输线路电路还可以包括介电绝缘材料，例如有机材料或陶瓷材料。 附加层增加了多层集成传输线电路的介电厚度，以减少介电损耗。

公开(公告)号：US20150060118A1

公开(公告)日：2015-03-05

申请号：US14466611

申请日：2014-08-22

Applicant: DENSO CORPORATION

Inventor： Toshikazu HARADA ,  Yoshichika ISHIKAWA

IPC: H05K3/46 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K3/4617 ,  H01L2224/16225 ,  H05K1/025 ,  H05K1/186 ,  H05K3/4697

Abstract: When laminating two resin films so that sides where the conductive patterns are not formed face each other, and when laminating other resin films so that sides where the conductive patterns are formed and the sides where the conductive patterns are not formed to face each other, a plurality of resin films each of which has the same resin thickness are used for the other resin films, and two resin films having a sum of resin thickness that is the same as the resin thickness of the other single resin film are used for the two resin films. Accordingly, dielectric thicknesses between the conductive patterns formed in the adjoining resin films can be made even so that an impedance can be calculated easily, and it becomes possible to ease the circuit design.

Abstract translation: 当层叠两个树脂膜使得不形成导电图案的侧面彼此面对时，并且当层压其它树脂膜使得形成导电图案的侧面和不形成导电图案的侧面彼此面对时， 对于其他树脂膜使用多个具有相同树脂厚度的树脂膜，并且使用具有与另一个单一树脂膜的树脂厚度相同的树脂厚度之和的两个树脂膜用于两个树脂 电影。 因此，可以使邻接的树脂膜中形成的导电图案之间的电介质厚度均匀，从而可以容易地计算阻抗，并且可以简化电路设计。

公开(公告)号：US20150027751A1

公开(公告)日：2015-01-29

申请号：US14068029

申请日：2013-10-31

Applicant: ADVANCED FLEXIBLE CIRCUITS CO., LTD.

Inventor： KUO-FU SU ,  GWUN-JIN LIN

IPC: H05K1/02

CPC classification number: H05K1/024 ,  H01B7/0838 ,  H01B7/0861 ,  H05K1/0242 ,  H05K1/025 ,  H05K3/28 ,  H05K3/281 ,  H05K2201/0323 ,  H05K2201/09236 ,  H05K2201/098 ,  H05K2201/09881

Abstract: A planarized cover layer structure of a flexible circuit board includes an insulation layer bonded through a first adhesive layer to a surface of each one of conductive signal lines laid on a substrate of a flexible circuit board. Separation areas respectively formed between adjacent ones of the conductive signal lines are each formed with a filling layer, so that the filling layer provides the first adhesive layer with a planarization height in the separation areas and the planarization height is substantially equal to the height of the conductive signal lines. The filling layer can alternatively be of a height that is higher than the surface of the conductor layer by a covering height so that the first adhesive layer has a planarization height in the separation areas and the planarization height is substantially equal to the sum of the height of the conductive signal lines and the covering height.

Abstract translation: 柔性电路板的平面化覆盖层结构包括通过第一粘合剂层粘合到布置在柔性电路板的基板上的每个导电信号线的表面的绝缘层。 分别在相邻的导电信号线之间形成的分离区域各自形成有填充层，使得填充层在分离区域中为第一粘合剂层提供平坦化高度，并且平坦化高度基本上等于 导电信号线。 填充层可以替代地具有比导体层的表面高一个覆盖高度的高度，使得第一粘合剂层在分离区域中具有平坦化高度，并且平坦化高度基本上等于高度 的导电信号线和覆盖高度。

公开(公告)号：US08935644B2

公开(公告)日：2015-01-13

申请号：US14234550

申请日：2012-07-27

Applicant: Masashi Ogawa ,  Ken Morishita

Inventor： Masashi Ogawa ,  Ken Morishita

IPC: G06F9/455 ,  G06F17/50 ,  H05K3/00 ,  H05K1/02

CPC classification number: G06F17/5081 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/82 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/025 ,  H05K3/0005

Abstract: A printed substrate design system includes: an EMI condition determination unit that compares an EMI characteristic derived by an EMI characteristic derivation unit with an EMI allowable condition, and determines whether the EMI characteristic of a printed substrate satisfies the EMI allowable condition; a substrate configuration change unit that changes an internal configuration of the printed substrate to obtain a changed configuration of the printed substrate in a case where the EMI condition determination unit has determined that the EMI allowable condition is not satisfied, and sets design information of the changed configuration of the printed substrate to design information for deriving the EMI characteristic in the EMI characteristic derivation unit; and an output unit that outputs a printed substrate configuration in a case where the EMI condition determination unit has determined the EMI allowable condition is satisfied.

Abstract translation: 印刷基板设计系统包括：EMI条件确定单元，其将由EMI特性导出单元导出的EMI特性与EMI可允许条件进行比较，并且确定印刷基板的EMI特性是否满足EMI允许条件; 基板配置改变单元，其在EMI条件确定单元已经确定不允许EMI可允许条件的情况下改变印刷基板的内部配置以获得印刷基板的改变的配置，并且设置改变的设计信息 印刷基板的结构，以设计用于导出EMI特性导出单元中的EMI特性的信息; 以及输出单元，其在EMI条件确定单元已经确定了EMI允许条件的情况下输出打印的基板结构。