公开(公告)号：US07877871B2

公开(公告)日：2011-02-01

申请号：US12230280

申请日：2008-08-27

申请人： Hideo Aoki ,  Naoko Yamaguchi ,  Chiaki Takubo ,  Toshiaki Yamauchi ,  Koji Imamiya ,  Hiroshi Hashizume

发明人： Hideo Aoki ,  Naoko Yamaguchi ,  Chiaki Takubo ,  Toshiaki Yamauchi ,  Koji Imamiya ,  Hiroshi Hashizume

IPC分类号： H05K3/02 ,  G03G15/16

CPC分类号： H05K3/207 ,  G03G15/6591 ,  G03G2215/00523 ,  H05K1/095 ,  H05K3/1266 ,  H05K3/246 ,  H05K2201/0347 ,  H05K2201/09781 ,  H05K2203/0517 ,  H05K2203/105 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165

摘要： An image forming apparatus comprises an exposure unit forming an electrostatic latent image on a photo conductor based on image information, a developing unit developing the electrostatic latent image by toner made of formation material of a circuitry layer, and an electrostatic transferring unit transferring a toner image on the photo conductor onto a substrate. The toner image is transferred so as to cover at least a part of a conductor layer formed on the substrate. At this time, excessive charges caused in the conductor layer accompanying the start of the transfer of the toner image are removed. Alternatively, charges of which polarity is reverse to that of the toner are added to the conductor layer. These allow the circuitry layer to be formed to have a desired pattern favorably and securely on the conductor layer.

摘要翻译： 图像形成装置包括基于图像信息在光导体上形成静电潜像的曝光单元，通过电路层的形成材料制成的调色剂来显影静电潜像的显影单元和传送调色剂图像的静电转印单元 在光导体上的基片上。 转印调色剂图像以覆盖形成在基板上的导体层的至少一部分。 此时，伴随着调色剂图像的转印开始导致的导体层中引起的过多的电荷被去除。 或者，将与该调色剂相反极性的电荷加到导体层中。 这些允许电路层形成为在导体层上有利地并且牢固地具有期望的图案。

公开(公告)号：US20100025860A1

公开(公告)日：2010-02-04

申请号：US12533492

申请日：2009-07-31

申请人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Mie Matsuo ,  Masahiro Sekiguchi ,  Chiaki Takubo

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L23/481 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05548 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/01014 ,  H01L2924/01029

摘要： In one aspect of the present invention, a semiconductor device, may include a semiconductor substrate having a first surface and a second surface opposite to the first surface; a through hole in the semiconductor substrate, including an expansion portion which is provided in a vicinity of the first surface so that an opening area of the first opening is greater than an opening area of a lowermost portion of the expansion portion; a first insulating layer on the first surface of the semiconductor substrate; a first wiring layer on the first insulating layer to close the opening of the first insulating layer; a second insulating layer provided on the expansion portion of the through hole; and a second wiring layer on the second insulating layer to extend from inside of the through hole to the second surface of the semiconductor substrate.

摘要翻译： 在本发明的一个方面中，半导体器件可以包括具有第一表面和与第一表面相对的第二表面的半导体衬底; 半导体衬底中的通孔，包括设置在第一表面附近的膨胀部分，使得第一开口的开口面积大于膨胀部分的最下部分的开口面积; 在所述半导体衬底的第一表面上的第一绝缘层; 第一绝缘层上的第一布线层，用于封闭第一绝缘层的开口; 设置在通孔的膨胀部分上的第二绝缘层; 以及在所述第二绝缘层上的从所述通孔的内部延伸到所述半导体衬底的所述第二表面的第二布线层。

公开(公告)号：US20100000083A1

公开(公告)日：2010-01-07

申请号：US12541568

申请日：2009-08-14

申请人： Naoko Yamaguchi ,  Hideo Aoki ,  Chiaki Takubo

发明人： Naoko Yamaguchi ,  Hideo Aoki ,  Chiaki Takubo

IPC分类号： H05K3/10 ,  H05K3/20

CPC分类号： H05K3/246 ,  G03G15/6585 ,  H01L23/49883 ,  H01L2924/0002 ,  H05K1/095 ,  H05K3/1266 ,  H05K3/4664 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2203/0517 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/4916 ,  Y10T428/12097 ,  Y10T428/12104 ,  Y10T428/12111 ,  Y10T428/24917 ,  H01L2924/00

摘要： According to one mode of the present invention, metal-containing resin particles comprising a resin containing a thermosetting resin at 50 wt % or more and having a rate of moisture absorption from 500 to 14500 ppm, and fine metal particles contained in the resin, is provided.

摘要翻译： 根据本发明的一种模式，含有含有50重量％以上的热固性树脂的树脂含水率为500〜14500ppm的含金属的树脂粒子和树脂中含有的微细金属粒子是 提供。

公开(公告)号：US20090096051A1

公开(公告)日：2009-04-16

申请号：US12249438

申请日：2008-10-10

申请人： Hitoshi SUGIYAMA ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

发明人： Hitoshi SUGIYAMA ,  Atsuko Yamashita ,  Kazutaka Akiyama ,  Susumu Harada ,  Masahiro Sekiguchi ,  Masayuki Dohi ,  Kazumasa Tanida ,  Chiaki Takubo ,  Hiroshi Yoshikawa ,  Akihiro Hori

IPC分类号： H01L31/0216 ,  H01L31/18

CPC分类号： H01L27/14634 ,  H01L27/14618 ,  H01L27/14623 ,  H01L27/14636 ,  H01L27/14685 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05147 ,  H01L2224/0557 ,  H01L2224/05624 ,  H01L2224/05666 ,  H01L2224/05684 ,  H01L2224/13 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2924/00014

摘要： A solid state imaging device includes: an imaging device substrate with an imaging device section formed on a first major surface side thereof; a backside interconnect electrode provided on a second major surface side of the imaging device substrate and electrically connected to the imaging device section, the second major surface being on the opposite side of the first major surface; a circuit substrate provided with a circuit substrate electrode opposed to the second major surface; a connecting portion electrically connecting the backside interconnect electrode to the circuit substrate electrode; and a light shielding layer provided coplanar with the backside interconnect electrode or on the circuit substrate side of the backside interconnect electrode.

摘要翻译： 固态成像装置包括：具有形成在其第一主表面侧的成像装置部分的成像装置基板; 设置在成像器件基板的第二主表面侧并电连接到成像器件部分的背面互连电极，第二主表面在第一主表面的相对侧上; 电路基板，设置有与第二主表面相对的电路基板电极; 连接部，其将所述背面侧配线电极与所述电路基板电极电连接; 以及与背面配线电极共同设置的遮光层，或背面配线电极的电路基板侧。

公开(公告)号：US20080265443A1

公开(公告)日：2008-10-30

申请号：US12213766

申请日：2008-06-24

申请人： Takashi Imoto ,  Chiaki Takubo ,  Ryuji Hosokawa ,  Yoshihisa Imori ,  Takao Sato ,  Tetsuya Kurosawa ,  Mika Kiritani

发明人： Takashi Imoto ,  Chiaki Takubo ,  Ryuji Hosokawa ,  Yoshihisa Imori ,  Takao Sato ,  Tetsuya Kurosawa ,  Mika Kiritani

IPC分类号： H01L23/28

CPC分类号： H01L23/3142 ,  H01L23/3121 ,  H01L23/3178 ,  H01L23/5222 ,  H01L23/5329 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10155 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a semiconductor substrate, and a portion of the laminated film is removed from the surface of the semiconductor substrate so that the semiconductor substrate is exposed at the portion, a mounting substrate on which the semiconductor element is mounted, and a resin layer which seals at least a surface side of the semiconductor element with resin.

摘要翻译： 公开了一种半导体器件，其包括半导体元件，其中在半导体衬底的表面上形成由包括绝缘膜的多个层组成的层叠膜，并且将层压膜的一部分从 半导体衬底，使得半导体衬底在该部分处露出，其上安装有半导体元件的安装衬底和用树脂密封半导体元件的至少表面侧的树脂层。

公开(公告)号：US07405159B2

公开(公告)日：2008-07-29

申请号：US11712373

申请日：2007-03-01

申请人： Takashi Imoto ,  Chiaki Takubo ,  Ryuji Hosokawa ,  Yoshihisa Imori ,  Takao Sato ,  Tetsuya Kurosawa ,  Mika Kiritani

发明人： Takashi Imoto ,  Chiaki Takubo ,  Ryuji Hosokawa ,  Yoshihisa Imori ,  Takao Sato ,  Tetsuya Kurosawa ,  Mika Kiritani

IPC分类号： H01L21/302

CPC分类号： H01L23/3142 ,  H01L23/3121 ,  H01L23/3178 ,  H01L23/5222 ,  H01L23/5329 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/10155 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device is disclosed, which comprises a semiconductor element in which a laminated film composed of a plurality of layers including an insulating film is formed on a surface of a semiconductor substrate, and a portion of the laminated film is removed from the surface of the semiconductor substrate so that the semiconductor substrate is exposed at the portion, a mounting substrate on which the semiconductor element is mounted, and a resin layer which seals at least a surface side of the semiconductor element with resin.

摘要翻译： 公开了一种半导体器件，其包括半导体元件，其中在半导体衬底的表面上形成由包括绝缘膜的多个层组成的层叠膜，并且将层压膜的一部分从 半导体衬底，使得半导体衬底在该部分处露出，其上安装有半导体元件的安装衬底和用树脂密封半导体元件的至少表面侧的树脂层。

公开(公告)号：US20070212001A1

公开(公告)日：2007-09-13

申请号：US11711862

申请日：2007-02-28

申请人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

发明人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

IPC分类号： G02B6/36

CPC分类号： G02B6/43 ,  G02B6/4202 ,  H01L2924/0002 ,  H01L2924/00

摘要： When a resin 59 to form a molded body 20 is poured and a lead frame 30 is attached to a front end face 21 of the molded body 20 by insert molding, protective leads 32 provided on both outsides of a lead pattern 31 of the lead frame 30 moderate the flow of the resin 59 and the force acting on the lead pattern 31 is decreased, so that misregistration of the lead pattern 31 can be prevented. Accordingly, the inserted and molded lead frame 30 can be wired on the front end face 21 of the molded body 20 for easily accomplishing three-dimensional electric wiring.

摘要翻译： 当浇铸形成模制体20的树脂59并且通过嵌件模制将引线框架30附接到模制体20的前端面21时，设置在引线框架的引线图案31的外侧的保护引线32 30使树脂59的流动缓和，并且作用在引线图案31上的力减小，从而可以防止引线图案31的不对准。 因此，插入成型的引线框架30可以布线在成型体20的前端面21上，以便于实现三维电线。

公开(公告)号：US20070165986A1

公开(公告)日：2007-07-19

申请号：US11640861

申请日：2006-12-19

申请人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

发明人： Wataru Sakurai ,  Kazuhito Saito ,  Hideo Numata ,  Chiaki Takubo ,  Hideto Furuyama ,  Hiroshi Hamasaki

IPC分类号： G02B6/36

CPC分类号： G02B6/3644 ,  G02B6/3652 ,  G02B6/3696 ,  G02B6/4202

摘要： After a wiring plate 30 having a plurality of leads 31 been insert-molded to an edge face 21 of a molded article 20, unwanted portions of the wiring plate 30 are cut, thereby enabling easy three-dimensional wiring. As a result, an electrode terminal section 43 of a photoelectric conversion element 41 disposed opposite an end face 11b of an optical fiber 11 can be electrically coupled to an electrical wiring section 23 of an optical coupling part 10.

摘要翻译： 在具有多根引线31的布线板30嵌入成型到成形品20的边缘面21之后，切断布线板30的不希望的部分，从而能够容易地进行三维布线。 结果，与光纤11的端面11b相对设置的光电转换元件41的电极端子部43可以电耦合到光耦合部10的电配线部23。

公开(公告)号：US07235425B2

公开(公告)日：2007-06-26

申请号：US11062664

申请日：2005-02-23

申请人： Hideo Numata ,  Chiaki Takubo

发明人： Hideo Numata ,  Chiaki Takubo

IPC分类号： H01L21/00

CPC分类号： H01L21/6835 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68368 ,  H01L2224/27005 ,  H01L2224/2732 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83194 ,  H01L2224/8385 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01057 ,  H01L2924/01067 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512

摘要： A method for fabricating a semiconductor device includes mountain a first semiconductor chip on a wiring substrate, bonding a spacer having a first main surface and a second main surface opposing the first main surface such that the first main surface is in contact with the first semiconductor chip. The method further includes bonding a second semiconductor chip having a surface, onto the second main surface via a layer of a die bonding material selectively formed on a part of a third main surface.

摘要翻译： 一种制造半导体器件的方法包括：在布线基板上形成第一半导体芯片，将具有第一主表面和与第一主表面相对的第二主表面的间隔物接合，使得第一主表面与第一半导体芯片接触 。 该方法还包括通过选择性地形成在第三主表面的一部分上的芯片接合材料层将具有表面的第二半导体芯片接合到第二主表面上。

公开(公告)号：US20060071271A1

公开(公告)日：2006-04-06

申请号：US11230624

申请日：2005-09-21

申请人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

发明人： Ichiro Omura ,  Kenji Takahashi ,  Chiaki Takubo ,  Hideo Aoki ,  Hideo Numata ,  Mie Matsuo ,  Hirokazu Ezawa ,  Susumu Harada ,  Hisashi Kaneko ,  Hiroshi Ikenoue ,  Kenichi Matsushita

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/41766 ,  H01L23/481 ,  H01L24/14 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L29/7809 ,  H01L29/7811 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05005 ,  H01L2224/05541 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device which is compact and thin in size, low in resistance of a current path and parasitic inductance and excellent in reliability is provided. This semiconductor device comprises a semiconductor substrate, a first main electrode which is formed on a front surface of the semiconductor substrate, a second main electrode which is formed on a rear surface of the semiconductor substrate, and a conducting portion which is formed in a direction to pierce through the semiconductor substrate, wherein the second main electrode is extracted to the front surface of the semiconductor substrate via the conducting portion. And, the conducting portion is a through via which has a through hole formed through the semiconductor substrate in its thickness direction and a conductive portion which is formed in the through hole and connected to the second main electrode.

摘要翻译： 提供了一种尺寸小型化，电流通路电阻低，寄生电感小，可靠性优异的半导体装置。 该半导体器件包括半导体衬底，形成在半导体衬底的前表面上的第一主电极，形成在半导体衬底的后表面上的第二主电极和形成在半导体衬底的背面上的导电部分 穿过半导体衬底，其中第二主电极经由导电部分被提取到半导体衬底的前表面。 并且，导电部是贯通通孔，该通孔在其厚度方向上形成有通过半导体基板的通孔，以及形成在通孔中并连接到第二主电极的导电部。